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[/] [nova/] [trunk/] [src/] [IQIT.v] - Blame information for rev 11

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1 2 eexuke
//--------------------------------------------------------------------------------------------------
2
// Design    : nova
3
// Author(s) : Ke Xu
4
// Email           : eexuke@yahoo.com
5
// File      : IQIT.v
6
// Generated : June 18, 2005
7
// Copyright (C) 2008 Ke Xu                
8
//-------------------------------------------------------------------------------------------------
9
// Description 
10
// Decoding the residual information
11
// 1.The res_mb_bypass | DConly | allzero signals should be decoded first
12
// 2.For DC coefficients,IDCT    --> rescale
13
// 3.For AC coefficients,rescale --> IDCT   --> rounding
14
// 4.coeffLevel:zig-zag order
15
//   OneD_output,TwoD_output,DC_output,rescale_output,rounding_output:raster-scan order
16
// 5.Input coeffLevel_ext_0 ~ 15 are 2's complement,but with zig-zag order
17
//-------------------------------------------------------------------------------------------------
18
// Revise log 
19
// 1.March 27,2006
20
// DC_output: 0 ~ 15:for luma DC, 0 ~ 3:for Chroma Cb DC, 4 ~ 7:for Chroma Cr DC
21
// 2.March 28,2006
22
// 1)For Intra16x16ACLevel and chroma AC,the first coeff of IDCT is DC value, the following coeffLevel_ext_0 ~ 14 should be moved backward 1 space and coeffLevel_ext_15 is abandoned
23
// 2)There are some blocks which have zero DC coeff but non-zero AC coeff. Additional signals as res_LumaDCBlk_IsZero,res_ChromaDCBlk_Cb_IsZero,res_ChromaDCBlk_Cr_IsZero are added to deal with such special case  
24
//-------------------------------------------------------------------------------------------------
25
 
26
// synopsys translate_off
27
`include "timescale.v"
28
// synopsys translate_on
29
`include "nova_defines.v"
30
 
31
module IQIT (clk,reset_n,TotalCoeff,blk4x4_rec_counter,
32
        gclk_1D,gclk_2D,gclk_rescale,gclk_rounding,
33
        residual_state,cavlc_decoder_state,
34
        end_of_one_residual_block,end_of_NonZeroCoeff_CAVLC,
35
        QPy,QPc,i4x4_CbCr,
36
        coeffLevel_ext_0, coeffLevel_ext_1, coeffLevel_ext_2, coeffLevel_ext_3,
37
        coeffLevel_ext_4, coeffLevel_ext_5, coeffLevel_ext_6, coeffLevel_ext_7,
38
        coeffLevel_ext_8, coeffLevel_ext_9, coeffLevel_ext_10,coeffLevel_ext_11,
39
        coeffLevel_ext_12,coeffLevel_ext_13,coeffLevel_ext_14,coeffLevel_ext_15,
40
 
41
        OneD_counter,TwoD_counter,rescale_counter,rounding_counter,
42
        curr_DC_IsZero,curr_DC_scaled,
43
        rounding_output_0,rounding_output_1,rounding_output_2,rounding_output_3,
44
        rounding_output_4,rounding_output_5,rounding_output_6,rounding_output_7,
45
        rounding_output_8,rounding_output_9,rounding_output_10,rounding_output_11,
46
        rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15,
47
        end_of_ACBlk4x4_IQIT,end_of_DCBlk_IQIT
48
        );
49
        input clk,reset_n;
50
        input [4:0] TotalCoeff;
51
        input [4:0] blk4x4_rec_counter;
52
        input gclk_1D;
53
        input gclk_2D;
54
        input gclk_rescale;
55
        input gclk_rounding;
56
        input [3:0] residual_state;
57
        input [3:0] cavlc_decoder_state;
58
        input end_of_one_residual_block;
59
        input end_of_NonZeroCoeff_CAVLC;
60
        input [5:0] QPy;
61
        input [5:0] QPc;
62
        input [1:0] i4x4_CbCr;
63
        input [15:0] coeffLevel_ext_0, coeffLevel_ext_1, coeffLevel_ext_2, coeffLevel_ext_3;
64
        input [15:0] coeffLevel_ext_4, coeffLevel_ext_5, coeffLevel_ext_6, coeffLevel_ext_7;
65
        input [15:0] coeffLevel_ext_8, coeffLevel_ext_9, coeffLevel_ext_10,coeffLevel_ext_11;
66
        input [15:0] coeffLevel_ext_12,coeffLevel_ext_13,coeffLevel_ext_14,coeffLevel_ext_15;
67
 
68
 
69
        output [2:0] OneD_counter;
70
        output [2:0] TwoD_counter;
71
        output [2:0] rescale_counter;
72
        output [2:0] rounding_counter;
73
        output curr_DC_IsZero;
74
        output [8:0] curr_DC_scaled;
75
        output [8:0] rounding_output_0, rounding_output_1, rounding_output_2, rounding_output_3;
76
        output [8:0] rounding_output_4, rounding_output_5, rounding_output_6, rounding_output_7;
77
        output [8:0] rounding_output_8, rounding_output_9, rounding_output_10,rounding_output_11;
78
        output [8:0] rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15;
79
        output end_of_ACBlk4x4_IQIT;    //end of IQIT of one blk4x4 AC
80
        output end_of_DCBlk_IQIT;               //end of IQIT of one blk4x4/blk2x2 DC
81
 
82
        reg [8:0] rounding_output_0, rounding_output_1, rounding_output_2, rounding_output_3;
83
        reg [8:0] rounding_output_4, rounding_output_5, rounding_output_6, rounding_output_7;
84
        reg [8:0] rounding_output_8, rounding_output_9, rounding_output_10,rounding_output_11;
85
        reg [8:0] rounding_output_12,rounding_output_13,rounding_output_14,rounding_output_15;
86
 
87
        reg [2:0] OneD_counter;
88
        reg [2:0] TwoD_counter;
89
        reg [2:0] rescale_counter;
90
        reg [2:0] rounding_counter;
91
        reg [4:0] LevelScale_DC;
92
        reg [4:0] LevelScale_AC [3:0];
93
        reg [15:0] butterfly_D0,butterfly_D1,butterfly_D2,butterfly_D3;
94
        reg [15:0] mult0_a,mult1_a,mult2_a,mult3_a;
95
        reg IsLeftShift;
96
        reg [3:0] shift_len;
97
        reg [15:0] OneD_output [15:0];
98
        reg [15:0] TwoD_output [3:0];
99
        reg [15:0] rescale_output [3:0];
100
        reg [15:0] DC_output [15:0];
101
 
102
        wire IsHadamard;
103
        wire [5:0] QP;
104
        wire [2:0] QPmod6;
105
        wire [3:0] QPdiv6;
106
        wire [15:0] butterfly_F0,butterfly_F1,butterfly_F2,butterfly_F3;
107
        wire [4:0] LevelScale [3:0];
108
        wire [15:0] product0,product1,product2,product3;
109
        wire [15:0] shift_output0,shift_output1,shift_output2,shift_output3;
110
        wire [15:0] before_rounding0,before_rounding1,before_rounding2,before_rounding3;
111
        wire [9:0] rounding_sum0,rounding_sum1,rounding_sum2,rounding_sum3;
112
 
113
        //-----------------------------------------------------------------------------------
114
        // Zero-block-aware decoding
115
        //-----------------------------------------------------------------------------------
116
        //Whether DC block is zero
117
        reg res_LumaDCBlk_IsZero;
118
        reg res_ChromaDCBlk_Cb_IsZero;
119
        reg res_ChromaDCBlk_Cr_IsZero;
120
 
121
        always @ (posedge clk)
122
                if (reset_n == 1'b0)
123
                        begin
124
                        res_LumaDCBlk_IsZero      <= 1'b0;
125
                        res_ChromaDCBlk_Cb_IsZero <= 1'b0;
126
                        res_ChromaDCBlk_Cr_IsZero <= 1'b0;
127
                        end
128
                else if (cavlc_decoder_state == `NumCoeffTrailingOnes_LUT)
129
                begin
130
                                if (residual_state == `Intra16x16DCLevel_s)
131
                                        res_LumaDCBlk_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
132
              if (residual_state == `ChromaDCLevel_Cb_s)
133
                                        res_ChromaDCBlk_Cb_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
134
                                if (residual_state == `ChromaDCLevel_Cr_s)
135
                                        res_ChromaDCBlk_Cr_IsZero <= (TotalCoeff == 0)? 1'b1:1'b0;
136
                end
137
 
138
        //Whether current DC from DC_output[15:0] is zero
139
        //If whole DC block are all zeros or current single DC is zero,curr_DC is assigned 0
140
        //If current blk4x4 doesn't need DC (e.g. LumaLevel_s), curr_DC is also assigned 0
141
        reg [15:0] curr_DC;
142
        reg [15:0] curr_DC_reg;
143
        always @ (posedge clk)
144
                if (reset_n == 1'b0)
145
                        curr_DC_reg <= 0;
146
                else
147
                        curr_DC_reg <= curr_DC;
148
 
149
        always @ (residual_state or TotalCoeff or blk4x4_rec_counter or end_of_one_residual_block
150
                or res_LumaDCBlk_IsZero or res_ChromaDCBlk_Cb_IsZero or res_ChromaDCBlk_Cr_IsZero or curr_DC_reg
151
                or DC_output[0]  or DC_output[1]  or DC_output[2]  or DC_output[3]
152
                or DC_output[4]  or DC_output[5]  or DC_output[6]  or DC_output[7]
153
                or DC_output[8]  or DC_output[9]  or DC_output[10] or DC_output[11]
154
                or DC_output[12] or DC_output[13] or DC_output[14] or DC_output[15])
155
                if (residual_state == `Intra16x16ACLevel_0_s || (residual_state == `Intra16x16ACLevel_s && (end_of_one_residual_block && TotalCoeff == 0)))
156
                        begin
157
                                if (res_LumaDCBlk_IsZero == 1)
158
                                        curr_DC <= 0;
159
                                else
160
                                        case (blk4x4_rec_counter)
161
 
162
                                                2 :curr_DC <= DC_output[2];     3 :curr_DC <= DC_output[3];
163
                                                4 :curr_DC <= DC_output[4];     5 :curr_DC <= DC_output[5];
164
                                                6 :curr_DC <= DC_output[6];     7 :curr_DC <= DC_output[7];
165
                                                8 :curr_DC <= DC_output[8];     9 :curr_DC <= DC_output[9];
166
                                                10:curr_DC <= DC_output[10];11:curr_DC <= DC_output[11];
167
                                                12:curr_DC <= DC_output[12];13:curr_DC <= DC_output[13];
168
                                                14:curr_DC <= DC_output[14];15:curr_DC <= DC_output[15];
169
                                                default:curr_DC <= curr_DC_reg;
170
                                        endcase
171
                        end
172
                else if (residual_state == `ChromaACLevel_0_s || ((residual_state == `ChromaACLevel_Cb_s
173
                        || residual_state == `ChromaACLevel_Cr_s) && (end_of_one_residual_block && TotalCoeff == 0)))
174
                        begin
175
                                if (blk4x4_rec_counter < 20)    //Cb
176
                                        begin
177
                                                if (res_ChromaDCBlk_Cb_IsZero == 1'b1)
178
                                                        curr_DC <= 0;
179
                                                else
180
                                                        case (blk4x4_rec_counter)
181
                                                                16:curr_DC <= DC_output[0];17:curr_DC <= DC_output[1];
182
                                                                18:curr_DC <= DC_output[2];19:curr_DC <= DC_output[3];
183
                                                                default:curr_DC <= curr_DC_reg;
184
                                                        endcase
185
                                        end
186
                                else                                                    //Cr
187
                                        begin
188
                                                if (res_ChromaDCBlk_Cr_IsZero == 1'b1)
189
                                                        curr_DC <= 0;
190
                                                else
191
                                                        case (blk4x4_rec_counter)
192
                                                                20:curr_DC <= DC_output[4];21:curr_DC <= DC_output[5];
193
                                                                22:curr_DC <= DC_output[6];23:curr_DC <= DC_output[7];
194
                                                                default:curr_DC <= curr_DC_reg;
195
                                                        endcase
196
                                        end
197
                        end
198
                else
199
                        curr_DC <= curr_DC_reg;
200
 
201
        wire curr_DC_IsZero;
202
        assign curr_DC_IsZero = (curr_DC == 0);
203
 
204
        wire [15:0] curr_DC_tmp;
205
        wire [8:0]  curr_DC_scaled;
206
        assign curr_DC_tmp = curr_DC + 32;
207
        assign curr_DC_scaled = curr_DC_tmp[14:6];
208
 
209
        //-----------------------------------------------------------------------------------
210
        //residual type indicator
211
        //-----------------------------------------------------------------------------------
212
        wire res_DC;
213
        wire res_AC;
214
        wire res_luma;
215
 
216
        assign res_DC = (residual_state == `Intra16x16DCLevel_s || residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s);
217
        assign res_AC = (residual_state != `rst_residual && !res_DC);
218
        assign res_luma   =     (residual_state == `Intra16x16DCLevel_s   || residual_state == `Intra16x16ACLevel_s ||
219
                       residual_state == `Intra16x16ACLevel_0_s || residual_state == `LumaLevel_s || residual_state == `LumaLevel_0_s);
220
 
221
        //1.OneD_counter:control the step of 1D in IDCT,4 cycles
222
        //      For ChromaDC IDCT,we combine the original 2x2 2D IDCT into a 4x4-like 1D IDCT
223
        //      ChromaDC: 1 cycle
224
        //      Others  : 4 cycles
225
        always @ (posedge gclk_1D or negedge reset_n)
226
                if (reset_n == 0)
227
                        OneD_counter <= 0;
228
                else if (OneD_counter == 0)
229
                        OneD_counter <= (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)? 3'b001:3'b100;
230
                else
231
                        OneD_counter <= OneD_counter - 1;
232
 
233
        //2.TwoD_counter:control the step of 2D in IDCT,4 cycles
234
        //      ChromaDC: 0 cycle (All ChromDC transform done at 1D-DCT)
235
        //      Others  : 4 cycles
236
        always @ (posedge gclk_2D or negedge reset_n)
237
                if (reset_n == 0)
238
                        TwoD_counter <= 0;
239
                else
240
                        TwoD_counter <= (TwoD_counter == 0)? 3'b100:TwoD_counter - 1;
241
 
242
        //3.rescale_counter:control the step of rescale
243
        //      ChromaDC: 1 cycle (only 4 ChromDC coefficients)
244
        //      Others  : 4 cycles(16 coefficients)
245
        always @ (posedge gclk_rescale or negedge reset_n)
246
                if (reset_n == 0)
247
                        rescale_counter <= 0;
248
                else if (rescale_counter != 0)
249
                   rescale_counter <= rescale_counter - 1;
250
                else if (end_of_NonZeroCoeff_CAVLC == 1'b1)     //      AC
251
                        rescale_counter <= 3'b100;
252
                else if (OneD_counter == 3'b001 && (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s))  //ChromaDC
253
                   rescale_counter <= 3'b001;
254
                else if (TwoD_counter == 3'b100 && residual_state == `Intra16x16DCLevel_s)               //LumaDC
255
                   rescale_counter <= 3'b100;
256
 
257
        //4.rounding_counter
258
        always @ (posedge gclk_rounding or negedge reset_n)
259
                if (reset_n == 0)
260
                        rounding_counter <= 0;
261
                else
262
                        rounding_counter <= (rounding_counter == 0)? 3'b100:(rounding_counter - 1);
263
 
264
        //-----------------------------------------------------------------------------------
265
        //rescale
266
        //-----------------------------------------------------------------------------------
267
 
268
        //butterfly IDCT
269
        //1D    DC:from coeffLevel
270
        //              Intra16x16 :(0,0) :from DC_output
271
        //                                      others:from rescale_output
272
        //              ChromaAC_Cb:(0,0) :from DC_output
273
        //                                      others:from rescale_output
274
        //              ChromaAC_Cr:(0,0) :from DC_output
275
        //                                      others:from rescale_output
276
        //              others     :from rescale_output
277
        //
278
        //2D    All from OneD_output
279
        assign IsHadamard = (res_DC == 1'b1 && (OneD_counter != 0 || TwoD_counter != 0))? 1'b1:1'b0;
280
 
281
        butterfly butterfly (
282
                .D0(butterfly_D0),
283
                .D1(butterfly_D1),
284
                .D2(butterfly_D2),
285
                .D3(butterfly_D3),
286
                .F0(butterfly_F0),
287
                .F1(butterfly_F1),
288
                .F2(butterfly_F2),
289
                .F3(butterfly_F3),
290
                .IsHadamard(IsHadamard)
291
                );
292
 
293
        always @ (i4x4_CbCr or OneD_counter or TwoD_counter or blk4x4_rec_counter[3:0] or residual_state or res_AC
294
                or res_LumaDCBlk_IsZero or res_ChromaDCBlk_Cb_IsZero or res_ChromaDCBlk_Cr_IsZero
295
                or DC_output[0]  or DC_output[1]  or DC_output[2]  or DC_output[3]
296
                or DC_output[4]  or DC_output[5]  or DC_output[6]  or DC_output[7]
297
                or DC_output[8]  or DC_output[9]  or DC_output[10] or DC_output[11]
298
                or DC_output[12] or DC_output[13] or DC_output[14] or DC_output[15]
299
                or coeffLevel_ext_0  or coeffLevel_ext_1  or coeffLevel_ext_2  or coeffLevel_ext_3
300
                or coeffLevel_ext_4  or coeffLevel_ext_5  or coeffLevel_ext_6  or coeffLevel_ext_7
301
                or coeffLevel_ext_8  or coeffLevel_ext_9  or coeffLevel_ext_10 or coeffLevel_ext_11
302
                or coeffLevel_ext_12 or coeffLevel_ext_13 or coeffLevel_ext_14 or coeffLevel_ext_15
303
                or OneD_output[0]  or OneD_output[1]  or OneD_output[2]  or OneD_output[3]
304
                or OneD_output[4]  or OneD_output[5]  or OneD_output[6]  or OneD_output[7]
305
                or OneD_output[8]  or OneD_output[9]  or OneD_output[10] or OneD_output[11]
306
                or OneD_output[12] or OneD_output[13] or OneD_output[14] or OneD_output[15]
307
                or rescale_output[0]  or rescale_output[1]  or rescale_output[2]  or rescale_output[3])
308
                if (OneD_counter != 0)
309
                        case (OneD_counter)
310
                                3'b100:
311
                                begin
312
                                        case (residual_state)
313
                                                `Intra16x16ACLevel_s:
314
                                                if (res_LumaDCBlk_IsZero == 1'b1)
315
              butterfly_D0 <= 0;
316
                                          else
317
                                                  case (blk4x4_rec_counter[3:0])
318
                                                          4'b0000: butterfly_D0 <= DC_output[0];
319
                4'b0001: butterfly_D0 <= DC_output[1];
320
                4'b0010: butterfly_D0 <= DC_output[2];
321
                4'b0011: butterfly_D0 <= DC_output[3];
322
                4'b0100: butterfly_D0 <= DC_output[4];
323
                4'b0101: butterfly_D0 <= DC_output[5];
324
                4'b0110: butterfly_D0 <= DC_output[6];
325
                4'b0111: butterfly_D0 <= DC_output[7];
326
                4'b1000: butterfly_D0 <= DC_output[8];
327
                4'b1001: butterfly_D0 <= DC_output[9];
328
                4'b1010: butterfly_D0 <= DC_output[10];
329
                4'b1011: butterfly_D0 <= DC_output[11];
330
                4'b1100: butterfly_D0 <= DC_output[12];
331
                4'b1101: butterfly_D0 <= DC_output[13];
332
                4'b1110: butterfly_D0 <= DC_output[14];
333
                4'b1111: butterfly_D0 <= DC_output[15];
334
              endcase
335
            `ChromaACLevel_Cb_s:
336
                                                if(res_ChromaDCBlk_Cb_IsZero)
337
              butterfly_D0 <= 0;
338
            else
339
              case (i4x4_CbCr)
340
                2'b00:butterfly_D0 <= DC_output[0];
341
                2'b01:butterfly_D0 <= DC_output[1];
342
                2'b10:butterfly_D0 <= DC_output[2];
343
                2'b11:butterfly_D0 <= DC_output[3];
344
              endcase
345
                                                `ChromaACLevel_Cr_s:
346
                                                if(res_ChromaDCBlk_Cr_IsZero)
347
              butterfly_D0 <= 0;
348
                                          else
349
                                                case (i4x4_CbCr)
350
                                                                2'b00:butterfly_D0 <= DC_output[4];
351
                                                    2'b01:butterfly_D0 <= DC_output[5];
352
                                                    2'b10:butterfly_D0 <= DC_output[6];
353
                                                    2'b11:butterfly_D0 <= DC_output[7];
354
                                            endcase
355
                                                default:        //luma DC,chroma DC,luma4x4 AC
356
                                                butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_0;
357
                                        endcase
358
                                        butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_1;
359
                                        butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_5;
360
                                        butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_6;
361
                                end
362
                                3'b011:
363
                                begin
364
                                        butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_2;
365
                                        butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_4;
366
                                        butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_7;
367
                                        butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_12;
368
                                end
369
                                3'b010:
370
                                begin
371
                                        butterfly_D0 <= (res_AC == 1'b1)? rescale_output[0]:coeffLevel_ext_3;
372
                                        butterfly_D1 <= (res_AC == 1'b1)? rescale_output[1]:coeffLevel_ext_8;
373
                                        butterfly_D2 <= (res_AC == 1'b1)? rescale_output[2]:coeffLevel_ext_11;
374
                                        butterfly_D3 <= (res_AC == 1'b1)? rescale_output[3]:coeffLevel_ext_13;
375
                                end
376
                                3'b001:
377
                                begin
378
                                   //luma DC
379
                                   if (residual_state == `Intra16x16DCLevel_s)
380
                                      begin
381
                                         butterfly_D0 <= coeffLevel_ext_9;  butterfly_D1 <= coeffLevel_ext_10;
382
                                         butterfly_D2 <= coeffLevel_ext_14; butterfly_D3 <= coeffLevel_ext_15;
383
                                      end
384
                                   //chroma DC
385
                                        else if (residual_state == `ChromaDCLevel_Cb_s || residual_state == `ChromaDCLevel_Cr_s)
386
                                           begin
387
                                         butterfly_D0 <= coeffLevel_ext_0; butterfly_D1 <= coeffLevel_ext_1;
388
                                         butterfly_D2 <= coeffLevel_ext_2; butterfly_D3 <= coeffLevel_ext_3;
389
                                      end
390
                                   //AC
391
                                   else
392
                                      begin
393
                                         butterfly_D0 <= rescale_output[0]; butterfly_D1 <= rescale_output[1];
394
                                         butterfly_D2 <= rescale_output[2]; butterfly_D3 <= rescale_output[3];
395
                                      end
396
                                end
397
                                default:
398
                                   begin
399
                                           butterfly_D0 <= 0; butterfly_D1 <= 0;
400
                                           butterfly_D2 <= 0; butterfly_D3 <= 0;
401
                                   end
402
                        endcase
403
                else if (TwoD_counter != 0)
404
                        case (TwoD_counter)
405
                                3'b100:
406
                                begin
407
                                        butterfly_D0 <= OneD_output[0];butterfly_D1 <= OneD_output[4];
408
                                        butterfly_D2 <= OneD_output[8];butterfly_D3 <= OneD_output[12];
409
                                end
410
                                3'b011:
411
                                begin
412
                                        butterfly_D0 <= OneD_output[1];butterfly_D1 <= OneD_output[5];
413
                                        butterfly_D2 <= OneD_output[9];butterfly_D3 <= OneD_output[13];
414
                                end
415
                                3'b010:
416
                                begin
417
                                        butterfly_D0 <= OneD_output[2]; butterfly_D1 <= OneD_output[6];
418
                                        butterfly_D2 <= OneD_output[10];butterfly_D3 <= OneD_output[14];
419
                                end
420
                                3'b001:
421
                                begin
422
                                        butterfly_D0 <= OneD_output[3]; butterfly_D1 <= OneD_output[7];
423
                                        butterfly_D2 <= OneD_output[11];butterfly_D3 <= OneD_output[15];
424
                                end
425
                                default:
426
                                begin
427
                                        butterfly_D0 <= 0; butterfly_D1 <= 0;
428
                                        butterfly_D2 <= 0; butterfly_D3 <= 0;
429
                                end
430
                        endcase
431
                else
432
                        begin
433
                                butterfly_D0 <= 0; butterfly_D1 <= 0;
434
                                butterfly_D2 <= 0; butterfly_D3 <= 0;
435
                        end
436
 
437
        assign QP = (res_luma == 1'b1)? QPy:QPc;
438
        mod6 mod6 (
439
                .qp(QP),
440
                .mod(QPmod6)
441
                );
442
 
443
        //      Specify LevelScale parameter: LevelScale_DC & LevelScale_AC 
444
        always @ (rescale_counter or res_DC or QPmod6)
445
                if (rescale_counter != 0 && res_DC == 1'b1)
446
                        case (QPmod6)
447
                                0:LevelScale_DC <= 10;
448
                                1:LevelScale_DC <= 11;
449
                                2:LevelScale_DC <= 13;
450
                                3:LevelScale_DC <= 14;
451
                                4:LevelScale_DC <= 16;
452
                                5:LevelScale_DC <= 18;
453
                                default:LevelScale_DC <= 0;
454
                        endcase
455
                else
456
                        LevelScale_DC <= 0;
457
 
458
        always @ (rescale_counter or res_AC or QPmod6)
459
                if (rescale_counter != 0 && res_AC == 1'b1)
460
                        case (rescale_counter)
461
        3'b100,3'b010:  //1 & 3 row
462
                                case (QPmod6)
463
                                        3'b000:begin    LevelScale_AC[0] <= 10; LevelScale_AC[1] <= 13; LevelScale_AC[2] <= 10; LevelScale_AC[3] <= 13;  end
464
                                        3'b001:begin    LevelScale_AC[0] <= 11; LevelScale_AC[1] <= 14; LevelScale_AC[2] <= 11; LevelScale_AC[3] <= 14;  end
465
                                        3'b010:begin    LevelScale_AC[0] <= 13; LevelScale_AC[1] <= 16; LevelScale_AC[2] <= 13; LevelScale_AC[3] <= 16;  end
466
                                        3'b011:begin    LevelScale_AC[0] <= 14; LevelScale_AC[1] <= 18; LevelScale_AC[2] <= 14; LevelScale_AC[3] <= 18;  end
467
                                        3'b100:begin    LevelScale_AC[0] <= 16; LevelScale_AC[1] <= 20; LevelScale_AC[2] <= 16; LevelScale_AC[3] <= 20;  end
468
                                        3'b101:begin    LevelScale_AC[0] <= 18; LevelScale_AC[1] <= 23; LevelScale_AC[2] <= 18; LevelScale_AC[3] <= 23;  end
469
                                        default:begin   LevelScale_AC[0] <= 0;  LevelScale_AC[1] <= 0;  LevelScale_AC[2] <= 0;  LevelScale_AC[3] <= 0;        end
470
                                endcase
471
        3'b011,3'b001:  //2 & 4 row
472
                                case (QPmod6)
473
                                        3'b000:begin    LevelScale_AC[0] <= 13; LevelScale_AC[1] <= 16; LevelScale_AC[2] <= 13; LevelScale_AC[3] <= 16;  end
474
                                        3'b001:begin    LevelScale_AC[0] <= 14; LevelScale_AC[1] <= 18; LevelScale_AC[2] <= 14; LevelScale_AC[3] <= 18;  end
475
                                        3'b010:begin    LevelScale_AC[0] <= 16; LevelScale_AC[1] <= 20; LevelScale_AC[2] <= 16; LevelScale_AC[3] <= 20;  end
476
                                        3'b011:begin    LevelScale_AC[0] <= 18; LevelScale_AC[1] <= 23; LevelScale_AC[2] <= 18; LevelScale_AC[3] <= 23;  end
477
                                        3'b100:begin    LevelScale_AC[0] <= 20; LevelScale_AC[1] <= 25; LevelScale_AC[2] <= 20; LevelScale_AC[3] <= 25;  end
478
                                        3'b101:begin    LevelScale_AC[0] <= 23; LevelScale_AC[1] <= 29; LevelScale_AC[2] <= 23; LevelScale_AC[3] <= 29;  end
479
                                        default:begin   LevelScale_AC[0] <= 0;  LevelScale_AC[1] <= 0;  LevelScale_AC[2] <= 0;  LevelScale_AC[3] <= 0;       end
480
                                endcase
481
                                default:begin   LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0; LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0;  end
482
      endcase
483
                else
484
                        begin
485
                                LevelScale_AC[0] <= 0; LevelScale_AC[1] <= 0;
486
                                LevelScale_AC[2] <= 0; LevelScale_AC[3] <= 0;
487
                        end
488
 
489
        assign LevelScale[0] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[0]:LevelScale_DC);
490
        assign LevelScale[1] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[1]:LevelScale_DC);
491
        assign LevelScale[2] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[2]:LevelScale_DC);
492
        assign LevelScale[3] = (rescale_counter == 0)? 0:((res_AC == 1)? LevelScale_AC[3]:LevelScale_DC);
493
 
494
        //      Specify rescale multiplier input 
495
        always @ (residual_state or res_DC or rescale_counter
496
                or OneD_output[0]  or OneD_output[1]  or OneD_output[2]  or OneD_output[3]
497
                or OneD_output[4]  or OneD_output[5]  or OneD_output[6]  or OneD_output[7]
498
                or OneD_output[8]  or OneD_output[9]  or OneD_output[10] or OneD_output[11]
499
                or OneD_output[12] or OneD_output[13] or OneD_output[14] or OneD_output[15]
500
                or TwoD_output[0]  or TwoD_output[1]  or TwoD_output[2]  or TwoD_output[3]
501
                or coeffLevel_ext_0  or coeffLevel_ext_1  or coeffLevel_ext_2  or coeffLevel_ext_3
502
                or coeffLevel_ext_4  or coeffLevel_ext_5  or coeffLevel_ext_6  or coeffLevel_ext_7
503
                or coeffLevel_ext_8  or coeffLevel_ext_9  or coeffLevel_ext_10 or coeffLevel_ext_11
504
                or coeffLevel_ext_12 or coeffLevel_ext_13 or coeffLevel_ext_14 or coeffLevel_ext_15)
505
                if (residual_state == `Intra16x16DCLevel_s && rescale_counter != 0)      //Intra16x16DC
506
                   begin
507
                                mult0_a <= TwoD_output[0]; mult1_a <= TwoD_output[1];
508
                                mult2_a <= TwoD_output[2]; mult3_a <= TwoD_output[3];
509
                        end
510
                else if (res_DC == 1'b1 && rescale_counter != 0) //ChromaDC
511
                        begin
512
                                mult0_a <= OneD_output[12]; mult1_a <= OneD_output[15];
513
                                mult2_a <= OneD_output[13]; mult3_a <= OneD_output[14];
514
                        end
515
                else if (rescale_counter != 0)                                                        //AC
516
                        case (rescale_counter)
517
                                3'b100:
518
                                begin
519
                                        mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_0:0;
520
                                        mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_1:coeffLevel_ext_0;
521
                                        mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_5:coeffLevel_ext_4;
522
                                        mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_6:coeffLevel_ext_5;
523
                                end
524
                                3'b011:
525
                                begin
526
                                        mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_2:coeffLevel_ext_1;
527
                                        mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_4:coeffLevel_ext_3;
528
                                        mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_7:coeffLevel_ext_6;
529
                                        mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_12:coeffLevel_ext_11;
530
                                end
531
                                3'b010:
532
                                begin
533
                                        mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_3:coeffLevel_ext_2;
534
                                        mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_8:coeffLevel_ext_7;
535
                                        mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_11:coeffLevel_ext_10;
536
                                        mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_13:coeffLevel_ext_12;
537
                                end
538
                                3'b001:
539
                                begin
540
                                        mult0_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_9:coeffLevel_ext_8;
541
                                        mult1_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_10:coeffLevel_ext_9;
542
                                        mult2_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_14:coeffLevel_ext_13;
543
                                        mult3_a <= (residual_state == `LumaLevel_s)? coeffLevel_ext_15:coeffLevel_ext_14;
544
                                end
545
                                default:
546
                                begin
547
                                        mult0_a <= 0; mult1_a <= 0;
548
                                        mult2_a <= 0; mult3_a <= 0;
549
                                end
550
                        endcase
551
                else
552
                        begin
553
                                mult0_a <= 0; mult1_a <= 0;
554
                                mult2_a <= 0; mult3_a <= 0;
555
                        end
556
 
557
        //rescale multiplier 
558
        assign product0 = (rescale_counter == 0)? 0:mult0_a * {1'b0,LevelScale[0]};
559
        assign product1 = (rescale_counter == 0)? 0:mult1_a * {1'b0,LevelScale[1]};
560
        assign product2 = (rescale_counter == 0)? 0:mult2_a * {1'b0,LevelScale[2]};
561
        assign product3 = (rescale_counter == 0)? 0:mult3_a * {1'b0,LevelScale[3]};
562
 
563
        always @ (res_AC or res_luma or QPy or QPc)
564
                if (res_AC == 1'b1)
565
                        IsLeftShift <= 1'b1;
566
                else if (res_luma == 1'b1)
567
                        IsLeftShift <= (QPy < 12)? 1'b0:1'b1;
568
                else
569
                        IsLeftShift <= (QPc < 6)? 1'b0:1'b1;
570
 
571
        div6 div6 (
572
                .qp(QP),
573
                .div(QPdiv6)
574
                );
575
 
576
        always @ (residual_state or res_DC or QPdiv6)
577
                if (residual_state == `Intra16x16DCLevel_s) //Intra16x16DC
578
                        case (QPdiv6)
579
                                4'b0000:shift_len <= 2;
580
                                4'b0001:shift_len <= 1;
581
                                default:shift_len <= QPdiv6 - 2;
582
                        endcase
583
                else if (res_DC)                                                //ChromaDC
584
                        case (QPdiv6)
585
                                4'b0000:shift_len <= 1;
586
                                default:shift_len <= QPdiv6 - 1;
587
                        endcase
588
                else                             //AC
589
                        shift_len <= QPdiv6;
590
 
591
        rescale_shift rescale_shift0 (
592
                .IsLeftShift(IsLeftShift),
593
                .shift_input(product0),
594
                .shift_len(shift_len),
595
                .shift_output(shift_output0)
596
                );
597
        rescale_shift rescale_shift1 (
598
                .IsLeftShift(IsLeftShift),
599
                .shift_input(product1),
600
                .shift_len(shift_len),
601
                .shift_output(shift_output1)
602
                );
603
        rescale_shift rescale_shift2 (
604
                .IsLeftShift(IsLeftShift),
605
                .shift_input(product2),
606
                .shift_len(shift_len),
607
                .shift_output(shift_output2)
608
                );
609
        rescale_shift rescale_shift3 (
610
                .IsLeftShift(IsLeftShift),
611
                .shift_input(product3),
612
                .shift_len(shift_len),
613
                .shift_output(shift_output3)
614
                );
615
        //-----------------------------------------------------------------------
616
        //rounding 
617
        //-----------------------------------------------------------------------
618
        assign before_rounding0 = (rounding_counter != 0)? TwoD_output[0]:0;
619
        assign before_rounding1 = (rounding_counter != 0)? TwoD_output[1]:0;
620
        assign before_rounding2 = (rounding_counter != 0)? TwoD_output[2]:0;
621
        assign before_rounding3 = (rounding_counter != 0)? TwoD_output[3]:0;
622
 
623
        assign rounding_sum0 = before_rounding0[14:5] + 1;
624
        assign rounding_sum1 = before_rounding1[14:5] + 1;
625
        assign rounding_sum2 = before_rounding2[14:5] + 1;
626
        assign rounding_sum3 = before_rounding3[14:5] + 1;
627
 
628
        //-----------------------------------------------------------------------
629
        // Strore results 
630
        //-----------------------------------------------------------------------
631
        //1.    Store OneD_output
632
        integer i;
633
        always @ (posedge gclk_1D or negedge reset_n)
634
                if (reset_n == 0)
635
                        for (i=0;i<16;i=i+1)
636
                                OneD_output[i] <= 0;
637
                else if (OneD_counter != 0)
638
                        case (OneD_counter)
639
                                3'b100:
640
                                begin
641
                                        OneD_output[0] <= butterfly_F0;OneD_output[1] <= butterfly_F1;
642
                                        OneD_output[2] <= butterfly_F2;OneD_output[3] <= butterfly_F3;
643
                                end
644
                                3'b011:
645
                                begin
646
                                        OneD_output[4] <= butterfly_F0;OneD_output[5] <= butterfly_F1;
647
                                        OneD_output[6] <= butterfly_F2;OneD_output[7] <= butterfly_F3;
648
                                end
649
                                3'b010:
650
                                begin
651
                                        OneD_output[8]  <= butterfly_F0;OneD_output[9]  <= butterfly_F1;
652
                                        OneD_output[10] <= butterfly_F2;OneD_output[11] <= butterfly_F3;
653
                                end
654
                                3'b001:
655
                                begin
656
                                        OneD_output[12] <= butterfly_F0;OneD_output[13] <= butterfly_F1;
657
                                        OneD_output[14] <= butterfly_F2;OneD_output[15] <= butterfly_F3;
658
                                end
659
                        endcase
660
 
661
        //2.    Store TwoD_output
662
        integer j;
663
        always @ (posedge gclk_2D or negedge reset_n)
664
                if (reset_n == 0)
665
                        for (j=0;j<4;j=j+1)
666
                                TwoD_output[j] <= 0;
667
                else if (TwoD_counter != 0)
668
                   begin
669
                                TwoD_output[0] <= butterfly_F0; TwoD_output[1] <= butterfly_F1;
670
                                TwoD_output[2] <= butterfly_F2; TwoD_output[3] <= butterfly_F3;
671
                        end
672
 
673
        //3.1   Store rescale_output as DC_output
674
        integer m;
675
        always @ (posedge gclk_rescale or negedge reset_n)
676
                if (reset_n == 1'b0)
677
                        for (m=0;m<16;m=m+1)
678
                                DC_output[m] <= 0;
679
                else if (res_DC == 1'b1)
680
                        case (rescale_counter)
681
                                3'b100:
682
                                begin
683
                                        DC_output[0] <= shift_output0;   DC_output[2]  <= shift_output1;
684
                                        DC_output[8] <= shift_output2;  DC_output[10] <= shift_output3;
685
                                end
686
                                3'b011:
687
                                begin
688
                                        DC_output[1] <= shift_output0;  DC_output[3]  <= shift_output1;
689
                                        DC_output[9] <= shift_output2;  DC_output[11] <= shift_output3;
690
                                end
691
                                3'b010:
692
                                begin
693
                                        DC_output[4]  <= shift_output0; DC_output[6]  <= shift_output1;
694
                                        DC_output[12] <= shift_output2; DC_output[14] <= shift_output3;
695
                                end
696
                                3'b001:
697
                                if (residual_state == `ChromaDCLevel_Cb_s)
698
                                   begin
699
                                           DC_output[0] <= shift_output0;        DC_output[1] <= shift_output1;
700
                                           DC_output[2] <= shift_output2;       DC_output[3] <= shift_output3;
701
                                   end
702
                                else if (residual_state == `ChromaDCLevel_Cr_s)
703
                                   begin
704
                                           DC_output[4] <= shift_output0;       DC_output[5] <= shift_output1;
705
                                           DC_output[6] <= shift_output2;       DC_output[7] <= shift_output3;
706
                                   end
707
                                else
708
                                   begin
709
                                           DC_output[5]  <= shift_output0;      DC_output[7]  <= shift_output1;
710
                                           DC_output[13] <= shift_output2;      DC_output[15] <= shift_output3;
711
                                   end
712
                        endcase
713
 
714
        //3.2   Store rescale_output as AC_output
715
        integer n;
716
        always @ (posedge gclk_rescale or negedge reset_n)
717
                if (reset_n == 1'b0)
718
                        for (n=0;n<4;n=n+1)
719
                                rescale_output[n] <= 0;
720
                else if (res_AC == 1'b1 && rescale_counter != 0)
721
                   begin
722
                                rescale_output[0] <= shift_output0;      rescale_output[1] <= shift_output1;
723
                                rescale_output[2] <= shift_output2;     rescale_output[3] <= shift_output3;
724
                        end
725
 
726
        //4.    Store rounding_output
727
        always @ (posedge gclk_rounding or negedge reset_n)
728
                if (reset_n == 1'b0)
729
                        begin
730
                                rounding_output_0  <= 0;rounding_output_1  <= 0;rounding_output_2  <= 0;rounding_output_3  <= 0;
731
                                rounding_output_4  <= 0;rounding_output_5  <= 0;rounding_output_6  <= 0;rounding_output_7  <= 0;
732
                                rounding_output_8  <= 0;rounding_output_9  <= 0;rounding_output_10 <= 0;rounding_output_11 <= 0;
733
                                rounding_output_12 <= 0;rounding_output_13 <= 0;rounding_output_14 <= 0;rounding_output_15 <= 0;
734
                        end
735
                else
736
                        case (rounding_counter)
737
                                3'b100:
738
                                begin
739
                                        rounding_output_0  <= rounding_sum0[9:1];
740
                                        rounding_output_4  <= rounding_sum1[9:1];
741
                                        rounding_output_8  <= rounding_sum2[9:1];
742
                                        rounding_output_12 <= rounding_sum3[9:1];
743
                                end
744
                                3'b011:
745
                                begin
746
                                        rounding_output_1  <= rounding_sum0[9:1];
747
                                        rounding_output_5  <= rounding_sum1[9:1];
748
                                        rounding_output_9  <= rounding_sum2[9:1];
749
                                        rounding_output_13 <= rounding_sum3[9:1];
750
                                end
751
                                3'b010:
752
                                begin
753
                                        rounding_output_2  <= rounding_sum0[9:1];
754
                                        rounding_output_6  <= rounding_sum1[9:1];
755
                                        rounding_output_10 <= rounding_sum2[9:1];
756
                                        rounding_output_14 <= rounding_sum3[9:1];
757
                                end
758
                                3'b001:
759
                                begin
760
                                        rounding_output_3  <= rounding_sum0[9:1];
761
                                        rounding_output_7  <= rounding_sum1[9:1];
762
                                        rounding_output_11 <= rounding_sum2[9:1];
763
                                        rounding_output_15 <= rounding_sum3[9:1];
764
                                end
765
                        endcase
766
        assign end_of_ACBlk4x4_IQIT = (rounding_counter == 3'b001)? 1'b1:1'b0;
767
        assign end_of_DCBlk_IQIT  = ((residual_state == `Intra16x16DCLevel_s || residual_state == `ChromaDCLevel_Cb_s ||
768
                                residual_state == `ChromaDCLevel_Cr_s) && rescale_counter == 3'b001)? 1'b1:1'b0;
769
endmodule
770
 
771
module butterfly (D0,D1,D2,D3,F0,F1,F2,F3,IsHadamard);
772
        input [15:0] D0,D1,D2,D3;
773
        input IsHadamard;
774
        output [15:0] F0,F1,F2,F3;
775
 
776
        wire [15:0] T0,T1,T2,T3;
777
        wire [15:0] D1_scale,D3_scale;
778
 
779
        assign D1_scale = (IsHadamard == 1'b1)? D1:{D1[15],D1[15:1]};
780
        assign D3_scale = (IsHadamard == 1'b1)? D3:{D3[15],D3[15:1]};
781
 
782
        assign T0 = D0 + D2;
783
        assign T1 = D0 - D2;
784
        assign T2 = D1_scale - D3;
785
        assign T3 = D1 + D3_scale;
786
 
787
        assign F0 = T0 + T3;
788
        assign F1 = T1 + T2;
789
        assign F2 = T1 - T2;
790
        assign F3 = T0 - T3;
791
endmodule
792
 
793
module mod6 (qp,mod);
794
        input [5:0] qp;
795
        output [2:0] mod;
796
        reg [2:0] mod;
797
        always @ (qp)
798
                case (qp)
799
                        0, 6,12,18,24,30,36,42,48:mod <= 3'b000;
800
                        1, 7,13,19,25,31,37,43,49:mod <= 3'b001;
801
                        2, 8,14,20,26,32,38,44,50:mod <= 3'b010;
802
                        3, 9,15,21,27,33,39,45,51:mod <= 3'b011;
803
                        4,10,16,22,28,34,40,46   :mod <= 3'b100;
804
                        5,11,17,23,29,35,41,47   :mod <= 3'b101;
805
                        default                  :mod <= 3'b000;
806
                endcase
807
endmodule
808
 
809
module div6 (qp,div);
810
        input [5:0] qp;
811
        output [3:0] div;
812
        reg [3:0] div;
813
        always @ (qp)
814
                case (qp)
815
                        0, 1, 2, 3, 4, 5 :div <= 4'b0000;
816
                        6, 7, 8, 9, 10,11:div <= 4'b0001;
817
                        12,13,14,15,16,17:div <= 4'b0010;
818
                        18,19,20,21,22,23:div <= 4'b0011;
819
                        24,25,26,27,28,29:div <= 4'b0100;
820
                        30,31,32,33,34,35:div <= 4'b0101;
821
                        36,37,38,39,40,41:div <= 4'b0110;
822
                        42,43,44,45,46,47:div <= 4'b0111;
823
                        48,49,50,51      :div <= 4'b1000;
824
                        default          :div <= 0;
825
                endcase
826
endmodule
827
 
828
module rescale_shift (IsLeftShift,shift_input,shift_len,shift_output);
829
        input IsLeftShift;
830
        input signed [15:0] shift_input;
831
        input [3:0] shift_len;
832
        output signed [15:0] shift_output;
833
 
834
        assign shift_output = (IsLeftShift == 1'b1)? (shift_input <<< shift_len):(shift_input >>> shift_len);
835
endmodule
836
 
837
 
838
 
839
 
840
 
841
 
842
 
843
 
844
 
845
 
846
 
847
 
848
 
849
 
850
 

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