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[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [cpu/] [ChangeLog] - Blame information for rev 161

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Line No. Rev Author Line
1 161 khays
2011-08-22  Nick Clifton  
2
 
3
        * fr30.cpu: Newly contributed file.
4
        * fr30.opc: Likewise.
5
        * ip2k.cpu: Likewise.
6
        * ip2k.opc: Likewise.
7
        * mep-avc.cpu: Likewise.
8
        * mep-avc2.cpu: Likewise.
9
        * mep-c5.cpu: Likewise.
10
        * mep-core.cpu: Likewise.
11
        * mep-default.cpu: Likewise.
12
        * mep-ext-cop.cpu: Likewise.
13
        * mep-fmax.cpu: Likewise.
14
        * mep-h1.cpu: Likewise.
15
        * mep-ivc2.cpu: Likewise.
16
        * mep-rhcop.cpu: Likewise.
17
        * mep-sample-ucidsp.cpu: Likewise.
18
        * mep.cpu: Likewise.
19
        * mep.opc: Likewise.
20
        * openrisc.cpu: Likewise.
21
        * openrisc.opc: Likewise.
22
        * xstormy16.cpu: Likewise.
23
        * xstormy16.opc: Likewise.
24
 
25 24 khays
2010-10-08  Pierre Muller  
26
 
27
        * frv.opc: #undef DEBUG.
28
 
29
2010-07-03  DJ Delorie  
30
 
31
        * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
32
 
33
2010-02-11  Doug Evans  
34
 
35
        * m32r.cpu (HASH-PREFIX): Delete.
36
        (duhpo, dshpo): New pmacros.
37
        (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
38
        (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
39
        attribute, define with dshpo.
40
        (uimm24): Delete HASH-PREFIX attribute.
41
        * m32r.opc (CGEN_PRINT_NORMAL): Delete.
42
        (print_signed_with_hash_prefix): New function.
43
        (print_unsigned_with_hash_prefix): New function.
44
        * xc16x.cpu (dowh): New pmacro.
45
        (upof16): Define with dowh, specify print handler.
46
        (qbit, qlobit, qhibit): Ditto.
47
        (upag16): Ditto.
48
        * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
49
        (print_with_dot_prefix): New functions.
50
        (print_with_pof_prefix, print_with_pag_prefix): New functions.
51
 
52
2010-01-24  Doug Evans  
53
 
54
        * frv.cpu (floating-point-conversion): Update call to fp conv op.
55
        (floating-point-dual-conversion, ne-floating-point-dual-conversion,
56
        conditional-floating-point-conversion, ne-floating-point-conversion,
57
        float-parallel-mul-add-double-semantics): Ditto.
58
 
59
2010-01-05  Doug Evans  
60
 
61
        * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
62
        (f-dsp-40-u20, f-dsp-40-u24): Ditto.
63
 
64
2010-01-02  Doug Evans  
65
 
66
        * m32c.opc (parse_signed16): Fix typo.
67
 
68
2009-12-11  Nick Clifton  
69
 
70
        * frv.opc: Fix shadowed variable warnings.
71
        * m32c.opc: Fix shadowed variable warnings.
72
 
73
2009-11-14  Doug Evans  
74
 
75
        Must use VOID expression in VOID context.
76
        * xc16x.cpu (mov4): Fix mode of `sequence'.
77
        (mov9, mov10): Ditto.
78
        (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
79
        (callr, callseg, calls, trap, rets, reti): Ditto.
80
        (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
81
        (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
82
        (exts, exts1, extsr, extsr1, prior): Ditto.
83
 
84
2009-10-23  Doug Evans  
85
 
86
        * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
87
        cgen-ops.h -> cgen/basic-ops.h.
88
 
89
2009-09-25  Alan Modra  
90
 
91
        * m32r.cpu (stb-plus): Typo fix.
92
 
93
2009-09-23  Doug Evans  
94
 
95
        * m32r.cpu (sth-plus): Fix address mode and calculation.
96
        (stb-plus): Ditto.
97
        (clrpsw): Fix mask calculation.
98
        (bset, bclr, btst): Make mode in bit calculation match expression.
99
 
100
        * xc16x.cpu (rtl-version): Set to 0.8.
101
        (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
102
        make uppercase.  Remove unnecessary name-prefix spec.
103
        (grb-names, conditioncode-names, extconditioncode-names): Ditto.
104
        (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
105
        (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
106
        (h-cr): New hardware.
107
        (muls): Comment out parts that won't compile, add fixme.
108
        (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
109
        (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
110
        (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
111
 
112
2009-07-16  Doug Evans  
113
 
114
        * cpu/simplify.inc (*): One line doc strings don't need \n.
115
        (df): Invoke define-full-ifield instead of claiming it's an alias.
116
        (dno): Define.
117
        (dnop): Mark as deprecated.
118
 
119
2009-06-22  Alan Modra  
120
 
121
        * m32c.opc (parse_lab_5_3): Use correct enum.
122
 
123
2009-01-07  Hans-Peter Nilsson  
124
 
125
        * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
126
        (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
127
        (media-arith-sat-semantics): Explicitly sign- or zero-extend
128
        arguments of "operation" to DI using "mode" and the new pmacros.
129
 
130
2009-01-03  Hans-Peter Nilsson  
131
 
132
        * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
133
        of number 2, PID.
134
 
135
2008-12-23  Jon Beniston 
136
 
137
        * lm32.cpu: New file.
138
        * lm32.opc: New file.
139
 
140
2008-01-29  Alan Modra  
141
 
142
        * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
143
        to source.
144
 
145
2007-10-22  Hans-Peter Nilsson  
146
 
147
        * cris.cpu (movs, movu): Use result of extension operation when
148
        updating flags.
149
 
150
2007-07-04  Nick Clifton  
151
 
152
        * cris.cpu: Update copyright notice to refer to GPLv3.
153
        * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
154
        m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
155
        sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
156
        xc16x.opc: Likewise.
157
        * iq2000.cpu: Fix copyright notice to refer to FSF.
158
 
159
2007-04-30  Mark Salter  
160
 
161
        * frv.cpu (spr-names): Support new coprocessor SPR registers.
162
 
163
2007-04-20  Nick Clifton  
164
 
165
        * xc16x.cpu: Restore after accidentally overwriting this file with
166
        xc16x.opc.
167
 
168
2007-03-29  DJ Delorie  
169
 
170
        * m32c.cpu (Imm-8-s4n): Fix print hook.
171
        (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
172
        (arith-jnz-imm4-dst-defn): Make relaxable.
173
        (arith-jnz16-imm4-dst-defn): Fix encodings.
174
 
175
2007-03-20  DJ Delorie  
176
 
177
        * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
178
        mem20): New.
179
        (src16-16-20-An-relative-*): New.
180
        (dst16-*-20-An-relative-*): New.
181
        (dst16-16-16sa-*): New
182
        (dst16-16-16ar-*): New
183
        (dst32-16-16sa-Unprefixed-*): New
184
        (jsri): Fix operands.
185
        (setzx): Fix encoding.
186
 
187
2007-03-08  Alan Modra  
188
 
189
        * m32r.opc: Formatting.
190
 
191
2006-05-22  Nick Clifton  
192
 
193
        * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
194
 
195
2006-04-10  DJ Delorie  
196
 
197
        * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
198
        decides if this function accepts symbolic constants or not.
199
        (parse_signed_bitbase): Likewise.
200
        (parse_unsigned_bitbase8): Pass the new parameter.
201
        (parse_unsigned_bitbase11): Likewise.
202
        (parse_unsigned_bitbase16): Likewise.
203
        (parse_unsigned_bitbase19): Likewise.
204
        (parse_unsigned_bitbase27): Likewise.
205
        (parse_signed_bitbase8): Likewise.
206
        (parse_signed_bitbase11): Likewise.
207
        (parse_signed_bitbase19): Likewise.
208
 
209
2006-03-13  DJ Delorie  
210
 
211
        * m32c.cpu (Bit3-S): New.
212
        (btst:s): New.
213
        * m32c.opc (parse_bit3_S): New.
214
 
215
        * m32c.cpu (decimal-subtraction16-insn): Add second operand.
216
        (btst): Add optional :G suffix for MACH32.
217
        (or.b:S): New.
218
        (pop.w:G): Add optional :G suffix for MACH16.
219
        (push.b.imm): Fix syntax.
220
 
221
2006-03-10  DJ Delorie  
222
 
223
        * m32c.cpu (mul.l): New.
224
        (mulu.l): New.
225
 
226
2006-03-03 Shrirang Khisti 
227
 
228
        * xc16x.opc (parse_hash): Return NULL if the input was parsed or
229
        an error message otherwise.
230
        (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
231
        Fix up comments to correctly describe the functions.
232
 
233
2006-02-24  DJ Delorie  
234
 
235
        * m32c.cpu (RL_TYPE): New attribute, with macros.
236
        (Lab-8-24): Add RELAX.
237
        (unary-insn-defn-g, binary-arith-imm-dst-defn,
238
        binary-arith-imm4-dst-defn): Add 1ADDR attribute.
239
        (binary-arith-src-dst-defn): Add 2ADDR attribute.
240
        (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
241
        jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
242
        attribute.
243
        (jsri16, jsri32): Add 1ADDR attribute.
244
        (jsr32.w, jsr32.a): Add JUMP attribute.
245
 
246
2006-02-17  Shrirang Khisti  
247
            Anil Paranjape   
248
            Shilin Shakti    
249
 
250
        * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
251
        description.
252
        * xc16x.opc: New file containing supporting XC16C routines.
253
 
254
2006-02-10  Nick Clifton  
255
 
256
        * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
257
 
258
2006-01-06  DJ Delorie  
259
 
260
        * m32c.cpu (mov.w:q): Fix mode.
261
        (push32.b.imm): Likewise, for the comment.
262
 
263
2005-12-16  Nathan Sidwell  
264
 
265
        Second part of ms1 to mt renaming.
266
        * mt.cpu (define-arch, define-isa): Set name to mt.
267
        (define-mach): Adjust.
268
        * mt.opc (CGEN_ASM_HASH): Update.
269
        (mt_asm_hash, mt_cgen_insn_supported): Renamed.
270
        (parse_loopsize, parse_imm16): Adjust.
271
 
272
2005-12-13  DJ Delorie  
273
 
274
        * m32c.cpu (jsri): Fix order so register names aren't treated as
275
        symbols.
276
        (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
277
        indexwd, indexws): Fix encodings.
278
 
279
2005-12-12  Nathan Sidwell  
280
 
281
        * mt.cpu: Rename from ms1.cpu.
282
        * mt.opc: Rename from ms1.opc.
283
 
284
2005-12-06  Hans-Peter Nilsson  
285
 
286
        * cris.cpu (simplecris-common-writable-specregs)
287
        (simplecris-common-readable-specregs): Split from
288
        simplecris-common-specregs.  All users changed.
289
        (cris-implemented-writable-specregs-v0)
290
        (cris-implemented-readable-specregs-v0): Similar from
291
        cris-implemented-specregs-v0.
292
        (cris-implemented-writable-specregs-v3)
293
        (cris-implemented-readable-specregs-v3)
294
        (cris-implemented-writable-specregs-v8)
295
        (cris-implemented-readable-specregs-v8)
296
        (cris-implemented-writable-specregs-v10)
297
        (cris-implemented-readable-specregs-v10)
298
        (cris-implemented-writable-specregs-v32)
299
        (cris-implemented-readable-specregs-v32): Similar.
300
        (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
301
        insns and specializations.
302
 
303
2005-11-08  Nathan Sidwell  
304
 
305
        Add ms2
306
        * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
307
        model.
308
        (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
309
        f-cb2incr, f-rc3): New fields.
310
        (LOOP): New instruction.
311
        (JAL-HAZARD): New hazard.
312
        (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
313
        New operands.
314
        (mul, muli, dbnz, iflush): Enable for ms2
315
        (jal, reti): Has JAL-HAZARD.
316
        (ldctxt, ldfb, stfb): Only ms1.
317
        (fbcb): Only ms1,ms1-003.
318
        (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
319
        fbcbincrs, mfbcbincrs): Enable for ms2.
320
        (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
321
        * ms1.opc (parse_loopsize): New.
322
        (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
323
        (print_pcrel): New.
324
 
325
2005-10-28  Dave Brolley  
326
 
327
        Contribute the following change:
328
        2003-09-24  Dave Brolley  
329
 
330
        * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
331
        CGEN_ATTR_VALUE_TYPE.
332
        * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
333
        Use cgen_bitset_intersect_p.
334
 
335
2005-10-27  DJ Delorie  
336
 
337
        * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
338
        (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
339
        arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
340
        imm operand is needed.
341
        (adjnz, sbjnz): Pass the right operands.
342
        (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
343
        unary-insn): Add -g variants for opcodes that need to support :G.
344
        (not.BW:G, push.BW:G): Call it.
345
        (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
346
        stzx16-imm8-imm8-abs16): Fix operand typos.
347
        * m32c.opc (m32c_asm_hash): Support bnCND.
348
        (parse_signed4n, print_signed4n): New.
349
 
350
2005-10-26  DJ Delorie  
351
 
352
        * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
353
        (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
354
        mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
355
        dsp8[sp] is signed.
356
        (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
357
        (mov.BW:S r0,r1): Fix typo r1l->r1.
358
        (tst): Allow :G suffix.
359
        * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
360
 
361
2005-10-26  Kazuhiro Inaoka 
362
 
363
        * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
364
 
365
2005-10-25  DJ Delorie  
366
 
367
        * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
368
        making one a macro of the other.
369
 
370
2005-10-21  DJ Delorie  
371
 
372
        * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
373
        (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
374
        indexld, indexls): .w variants have `1' bit.
375
        (rot32.b): QI, not SI.
376
        (rot32.w): HI, not SI.
377
        (xchg16): HI for .w variant.
378
 
379
2005-10-19  Nick Clifton  
380
 
381
        * m32r.opc (parse_slo16): Fix bad application of previous patch.
382
 
383
2005-10-18  Andreas Schwab  
384
 
385
        * m32r.opc (parse_slo16): Better version of previous patch.
386
 
387
2005-10-14  Kazuhiro Inaoka 
388
 
389
        * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
390
        size.
391
 
392
2005-07-25  DJ Delorie  
393
 
394
        * m32c.opc (parse_unsigned8): Add %dsp8().
395
        (parse_signed8): Add %hi8().
396
        (parse_unsigned16): Add %dsp16().
397
        (parse_signed16): Add %lo16() and %hi16().
398
        (parse_lab_5_3): Make valuep a bfd_vma *.
399
 
400
2005-07-18  Nick Clifton  
401
 
402
        * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
403
        components.
404
        (f-lab32-jmp-s): Fix insertion sequence.
405
        (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
406
        (Dsp-40-s8): Make parameter be signed.
407
        (Dsp-40-s16): Likewise.
408
        (Dsp-48-s8): Likewise.
409
        (Dsp-48-s16): Likewise.
410
        (Imm-13-u3): Likewise. (Despite its name!)
411
        (BitBase16-16-s8): Make the parameter be unsigned.
412
        (BitBase16-8-u11-S): Likewise.
413
        (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
414
        jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
415
        relaxation.
416
 
417
        * m32c.opc: Fix formatting.
418
        Use safe-ctype.h instead of ctype.h
419
        Move duplicated code sequences into a macro.
420
        Fix compile time warnings about signedness mismatches.
421
        Remove dead code.
422
        (parse_lab_5_3): New parser function.
423
 
424
2005-07-16  Jim Blandy  
425
 
426
        * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
427
        to represent isa sets.
428
 
429
2005-07-15  Jim Blandy  
430
 
431
        * m32c.cpu, m32c.opc: Fix copyright.
432
 
433
2005-07-14  Jim Blandy  
434
 
435
        * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
436
 
437
2005-07-14  Alan Modra  
438
 
439
        * ms1.opc (print_dollarhex): Correct format string.
440
 
441
2005-07-06  Alan Modra  
442
 
443
        * iq2000.cpu: Include from binutils cpu dir.
444
 
445
2005-07-05  Nick Clifton  
446
 
447
        * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
448
        unsigned in order to avoid compile time warnings about sign
449
        conflicts.
450
 
451
        * ms1.opc (parse_*): Likewise.
452
        (parse_imm16): Use a "void *" as it is passed both signed and
453
        unsigned arguments.
454
 
455
2005-07-01  Nick Clifton  
456
 
457
        * frv.opc: Update to ISO C90 function declaration style.
458
        * iq2000.opc: Likewise.
459
        * m32r.opc: Likewise.
460
        * sh.opc: Likewise.
461
 
462
2005-06-15  Dave Brolley  
463
 
464
        Contributed by Red Hat.
465
        * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
466
        * ms1.opc: New file.  Written by Stan Cox.
467
 
468
2005-05-10  Nick Clifton  
469
 
470
        * Update the address and phone number of the FSF organization in
471
        the GPL notices in the following files:
472
        cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
473
        m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
474
        sh64-media.cpu, simplify.inc
475
 
476
2005-02-24  Alan Modra  
477
 
478
        * frv.opc (parse_A): Warning fix.
479
 
480
2005-02-23  Nick Clifton  
481
 
482
        * frv.opc: Fixed compile time warnings about differing signed'ness
483
        of pointers passed to functions.
484
        * m32r.opc: Likewise.
485
 
486
2005-02-11  Nick Clifton  
487
 
488
        * iq2000.opc (parse_jtargq10): Change type of valuep argument to
489
        'bfd_vma *' in order avoid compile time warning message.
490
 
491
2005-01-28  Hans-Peter Nilsson  
492
 
493
        * cris.cpu (mstep): Add missing insn.
494
 
495
2005-01-25  Alexandre Oliva  
496
 
497
        2004-11-10  Alexandre Oliva  
498
        * frv.cpu: Add support for TLS annotations in loads and calll.
499
        * frv.opc (parse_symbolic_address): New.
500
        (parse_ldd_annotation): New.
501
        (parse_call_annotation): New.
502
        (parse_ld_annotation): New.
503
        (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
504
        Introduce TLS relocations.
505
        (parse_d12, parse_s12, parse_u12): Likewise.
506
        (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
507
        (parse_call_label, print_at): New.
508
 
509
2004-12-21  Mikael Starvik  
510
 
511
        * cris.cpu (cris-set-mem): Correct integral write semantics.
512
 
513
2004-11-29  Hans-Peter Nilsson  
514
 
515
        * cris.cpu: New file.
516
 
517
2004-11-15  Michael K. Lechner 
518
 
519
        * iq2000.cpu: Added quotes around macro arguments so that they
520
        will work with newer versions of guile.
521
 
522
2004-10-27  Nick Clifton  
523
 
524
        * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
525
        wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
526
        operand.
527
        * iq2000.cpu (dnop index): Rename to _index to avoid complications
528
        with guile.
529
 
530
2004-08-27  Richard Sandiford  
531
 
532
        * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
533
 
534
2004-05-15  Nick Clifton  
535
 
536
        * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
537
 
538
2004-03-30  Kazuhiro Inaoka  
539
 
540
        * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
541
 
542
2004-03-01  Richard Sandiford  
543
 
544
        * frv.cpu (define-arch frv): Add fr450 mach.
545
        (define-mach fr450): New.
546
        (define-model fr450): New.  Add profile units to every fr450 insn.
547
        (define-attr UNIT): Add MDCUTSSI.
548
        (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
549
        (define-attr AUDIO): New boolean.
550
        (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
551
        (f-LRA-null, f-TLBPR-null): New fields.
552
        (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
553
        (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
554
        (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
555
        (LRA-null, TLBPR-null): New macros.
556
        (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
557
        (load-real-address): New macro.
558
        (lrai, lrad, tlbpr): New instructions.
559
        (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
560
        (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
561
        (mdcutssi): Change UNIT attribute to MDCUTSSI.
562
        (media-low-clear-semantics, media-scope-limit-semantics)
563
        (media-quad-limit, media-quad-shift): New macros.
564
        (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
565
        * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
566
        (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
567
        (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
568
        (fr450_unit_mapping): New array.
569
        (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
570
        for new MDCUTSSI unit.
571
        (fr450_check_insn_major_constraints): New function.
572
        (check_insn_major_constraints): Use it.
573
 
574
2004-03-01  Richard Sandiford  
575
 
576
        * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
577
        (scutss): Change unit to I0.
578
        (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
579
        (mqsaths): Fix FR400-MAJOR categorization.
580
        (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
581
        (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
582
        * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
583
        combinations.
584
 
585
2004-03-01  Richard Sandiford  
586
 
587
        * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
588
        (rstb, rsth, rst, rstd, rstq): Delete.
589
        (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
590
 
591
2004-02-23  Nick Clifton  
592
 
593
        * Apply these patches from Renesas:
594
 
595
        2004-02-10  Kazuhiro Inaoka  
596
 
597
        * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
598
        disassembling codes for 0x*2 addresses.
599
 
600
        2003-12-15  Kazuhiro Inaoka  
601
 
602
        * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
603
 
604
        2003-12-03  Kazuhiro Inaoka  
605
 
606
        * cpu/m32r.cpu : Add new model m32r2.
607
        Add new instructions.
608
        Replace occurrances of 'Mitsubishi' with 'Renesas'.
609
        Changed PIPE attr of push from O to OS.
610
        Care for Little-endian of M32R.
611
        * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
612
        Care for Little-endian of M32R.
613
        (parse_slo16): signed extension for value.
614
 
615
2004-02-20  Andrew Cagney  
616
 
617
        * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
618
        Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
619
 
620
        * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
621
        written by Ben Elliston.
622
 
623
2004-01-14  Richard Sandiford  
624
 
625
        * frv.cpu (UNIT): Add IACC.
626
        (iacc-multiply-r-r): Use it.
627
        * frv.opc (fr400_unit_mapping): Add entry for IACC.
628
        (fr500_unit_mapping, fr550_unit_mapping): Likewise.
629
 
630
2004-01-06  Alexandre Oliva  
631
 
632
        2003-12-19  Alexandre Oliva  
633
        * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
634
        cut&paste errors in shifting/truncating numerical operands.
635
        2003-08-08  Alexandre Oliva  
636
        * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
637
        (parse_uslo16): Likewise.
638
        (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
639
        (parse_d12): Parse gotoff12 and gotofffuncdesc12.
640
        (parse_s12): Likewise.
641
        2003-08-04  Alexandre Oliva  
642
        * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
643
        (parse_uslo16): Likewise.
644
        (parse_uhi16): Parse gothi and gotfuncdeschi.
645
        (parse_d12): Parse got12 and gotfuncdesc12.
646
        (parse_s12): Likewise.
647
 
648
2003-10-10  Dave Brolley  
649
 
650
        * frv.cpu (dnpmop): New p-macro.
651
        (GRdoublek): Use dnpmop.
652
        (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
653
        (store-double-r-r): Use (.sym regtype doublek).
654
        (r-store-double): Ditto.
655
        (store-double-r-r-u): Ditto.
656
        (conditional-store-double): Ditto.
657
        (conditional-store-double-u): Ditto.
658
        (store-double-r-simm): Ditto.
659
        (fmovs): Assign to UNIT FMALL.
660
 
661
2003-10-06  Dave Brolley  
662
 
663
        * frv.cpu, frv.opc: Add support for fr550.
664
 
665
2003-09-24  Dave Brolley  
666
 
667
        * frv.cpu (u-commit): New modelling unit for fr500.
668
        (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
669
        (commit-r): Use u-commit model for fr500.
670
        (commit): Ditto.
671
        (conditional-float-binary-op): Take profiling data as an argument.
672
        Update callers.
673
        (ne-float-binary-op): Ditto.
674
 
675
2003-09-19  Michael Snyder  
676
 
677
        * frv.cpu (nldqi): Delete unimplemented instruction.
678
 
679
2003-09-12  Dave Brolley  
680
 
681
        * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
682
        (clear-ne-flag-r): Pass insn profiling in as an argument. Call
683
        frv_ref_SI to get input register referenced for profiling.
684
        (clear-ne-flag-all): Pass insn profiling in as an argument.
685
        (clrgr,clrfr,clrga,clrfa): Add profiling information.
686
 
687
2003-09-11  Michael Snyder  
688
 
689
        * frv.cpu: Typographical corrections.
690
 
691
2003-09-09  Dave Brolley  
692
 
693
        * frv.cpu (media-dual-complex): Change UNIT to FMALL.
694
        (conditional-media-dual-complex, media-quad-complex): Likewise.
695
 
696
2003-09-04  Dave Brolley  
697
 
698
        * frv.cpu (register-transfer): Pass in all attributes in on argument.
699
        Update all callers.
700
        (conditional-register-transfer): Ditto.
701
        (cache-preload): Ditto.
702
        (floating-point-conversion): Ditto.
703
        (floating-point-neg): Ditto.
704
        (float-abs): Ditto.
705
        (float-binary-op-s): Ditto.
706
        (conditional-float-binary-op): Ditto.
707
        (ne-float-binary-op): Ditto.
708
        (float-dual-arith): Ditto.
709
        (ne-float-dual-arith): Ditto.
710
 
711
2003-09-03  Dave Brolley  
712
 
713
        * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
714
        * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
715
        MCLRACC-1.
716
        (A): Removed operand.
717
        (A0,A1): New operands replace operand A.
718
        (mnop): Now a real insn
719
        (mclracc): Removed insn.
720
        (mclracc-0, mclracc-1): New insns replace mclracc.
721
        (all insns): Use new UNIT attributes.
722
 
723
2003-08-21  Nick Clifton  
724
 
725
        * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
726
        and u-media-dual-btoh with output parameter.
727
        (cmbtoh): Add profiling hack.
728
 
729
2003-08-19  Michael Snyder  
730
 
731
        * frv.cpu: Fix typo, Frintkeven -> FRintkeven
732
 
733
2003-06-10  Doug Evans  
734
 
735
        * frv.cpu: Add IDOC attribute.
736
 
737
2003-06-06  Andrew Cagney  
738
 
739
        Contributed by Red Hat.
740
        * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
741
        Stan Cox, and Frank Ch. Eigler.
742
        * iq2000.opc: New file.  Written by Ben Elliston, Frank
743
        Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
744
        * iq2000m.cpu: New file.  Written by Jeff Johnston.
745
        * iq10.cpu: New file.  Written by Jeff Johnston.
746
 
747
2003-06-05  Nick Clifton  
748
 
749
        * frv.cpu (FRintieven): New operand.  An even-numbered only
750
        version of the FRinti operand.
751
        (FRintjeven): Likewise for FRintj.
752
        (FRintkeven): Likewise for FRintk.
753
        (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
754
        media-quad-arith-sat-semantics, media-quad-arith-sat,
755
        conditional-media-quad-arith-sat, mdunpackh,
756
        media-quad-multiply-semantics, media-quad-multiply,
757
        conditional-media-quad-multiply, media-quad-complex-i,
758
        media-quad-multiply-acc-semantics, media-quad-multiply-acc,
759
        conditional-media-quad-multiply-acc, munpackh,
760
        media-quad-multiply-cross-acc-semantics, mdpackh,
761
        media-quad-multiply-cross-acc, mbtoh-semantics,
762
        media-quad-cross-multiply-cross-acc-semantics,
763
        media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
764
        media-quad-cross-multiply-acc-semantics, cmbtoh,
765
        media-quad-cross-multiply-acc, media-quad-complex, mhtob,
766
        media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
767
        cmhtob): Use new operands.
768
        * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
769
        (parse_even_register): New function.
770
 
771
2003-06-03  Nick Clifton  
772
 
773
        * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
774
        immediate value not unsigned.
775
 
776
2003-06-03  Andrew Cagney  
777
 
778
        Contributed by Red Hat.
779
        * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
780
        and Eric Christopher.
781
        * frv.opc: New file.  Written by Catherine Moore, and Dave
782
        Brolley.
783
        * simplify.inc: New file.  Written by Doug Evans.
784
 
785
2003-05-02  Andrew Cagney  
786
 
787
        * New file.
788
 
789
 
790
Local Variables:
791
mode: change-log
792
left-margin: 8
793
fill-column: 74
794
version-control: never
795
End:

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