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[/] [openmsp430/] [trunk/] [core/] [bench/] [verilog/] [tb_openMSP430.v] - Blame information for rev 151

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1 2 olivier.gi
//----------------------------------------------------------------------------
2
// Copyright (C) 2001 Authors
3
//
4
// This source file may be used and distributed without restriction provided
5
// that this copyright statement is not removed from the file and that any
6
// derivative work contains the original copyright notice and the associated
7
// disclaimer.
8
//
9
// This source file is free software; you can redistribute it and/or modify
10
// it under the terms of the GNU Lesser General Public License as published
11
// by the Free Software Foundation; either version 2.1 of the License, or
12
// (at your option) any later version.
13
//
14
// This source is distributed in the hope that it will be useful, but WITHOUT
15
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
17
// License for more details.
18
//
19
// You should have received a copy of the GNU Lesser General Public License
20
// along with this source; if not, write to the Free Software Foundation,
21
// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
22
//
23
//----------------------------------------------------------------------------
24
// 
25
// *File Name: tb_openMSP430.v
26
// 
27
// *Module Description:
28
//                      openMSP430 testbench
29
//
30
// *Author(s):
31
//              - Olivier Girard,    olgirard@gmail.com
32
//
33
//----------------------------------------------------------------------------
34 17 olivier.gi
// $Rev: 151 $
35
// $LastChangedBy: olivier.girard $
36
// $LastChangedDate: 2012-07-23 00:24:11 +0200 (Mon, 23 Jul 2012) $
37
//----------------------------------------------------------------------------
38 23 olivier.gi
`include "timescale.v"
39 103 olivier.gi
`ifdef OMSP_NO_INCLUDE
40
`else
41 23 olivier.gi
`include "openMSP430_defines.v"
42 103 olivier.gi
`endif
43 2 olivier.gi
 
44
module  tb_openMSP430;
45
 
46
//
47
// Wire & Register definition
48
//------------------------------
49
 
50 33 olivier.gi
// Data Memory interface
51
wire [`DMEM_MSB:0] dmem_addr;
52
wire               dmem_cen;
53
wire        [15:0] dmem_din;
54
wire         [1:0] dmem_wen;
55
wire        [15:0] dmem_dout;
56 2 olivier.gi
 
57 33 olivier.gi
// Program Memory interface
58
wire [`PMEM_MSB:0] pmem_addr;
59
wire               pmem_cen;
60
wire        [15:0] pmem_din;
61
wire         [1:0] pmem_wen;
62
wire        [15:0] pmem_dout;
63 2 olivier.gi
 
64
// Peripherals interface
65 111 olivier.gi
wire        [13:0] per_addr;
66 33 olivier.gi
wire        [15:0] per_din;
67
wire        [15:0] per_dout;
68 106 olivier.gi
wire         [1:0] per_we;
69 33 olivier.gi
wire               per_en;
70 2 olivier.gi
 
71
// Digital I/O
72 33 olivier.gi
wire               irq_port1;
73
wire               irq_port2;
74
wire        [15:0] per_dout_dio;
75
wire         [7:0] p1_dout;
76
wire         [7:0] p1_dout_en;
77
wire         [7:0] p1_sel;
78
wire         [7:0] p2_dout;
79
wire         [7:0] p2_dout_en;
80
wire         [7:0] p2_sel;
81
wire         [7:0] p3_dout;
82
wire         [7:0] p3_dout_en;
83
wire         [7:0] p3_sel;
84
wire         [7:0] p4_dout;
85
wire         [7:0] p4_dout_en;
86
wire         [7:0] p4_sel;
87
wire         [7:0] p5_dout;
88
wire         [7:0] p5_dout_en;
89
wire         [7:0] p5_sel;
90
wire         [7:0] p6_dout;
91
wire         [7:0] p6_dout_en;
92
wire         [7:0] p6_sel;
93
reg          [7:0] p1_din;
94
reg          [7:0] p2_din;
95
reg          [7:0] p3_din;
96
reg          [7:0] p4_din;
97
reg          [7:0] p5_din;
98
reg          [7:0] p6_din;
99 2 olivier.gi
 
100
// Peripheral templates
101 33 olivier.gi
wire        [15:0] per_dout_temp_8b;
102
wire        [15:0] per_dout_temp_16b;
103 2 olivier.gi
 
104 134 olivier.gi
// Simple full duplex UART
105
wire        [15:0] per_dout_uart;
106
wire               irq_uart_rx;
107
wire               irq_uart_tx;
108
wire               uart_txd;
109
reg                uart_rxd;
110
 
111 2 olivier.gi
// Timer A
112 33 olivier.gi
wire               irq_ta0;
113
wire               irq_ta1;
114
wire        [15:0] per_dout_timerA;
115
reg                inclk;
116
reg                taclk;
117
reg                ta_cci0a;
118
reg                ta_cci0b;
119
reg                ta_cci1a;
120
reg                ta_cci1b;
121
reg                ta_cci2a;
122
reg                ta_cci2b;
123
wire               ta_out0;
124
wire               ta_out0_en;
125
wire               ta_out1;
126
wire               ta_out1_en;
127
wire               ta_out2;
128
wire               ta_out2_en;
129 2 olivier.gi
 
130
// Clock / Reset & Interrupts
131 33 olivier.gi
reg                dco_clk;
132 134 olivier.gi
wire               dco_enable;
133
wire               dco_wkup;
134
reg                dco_local_enable;
135 33 olivier.gi
reg                lfxt_clk;
136 134 olivier.gi
wire               lfxt_enable;
137
wire               lfxt_wkup;
138
reg                lfxt_local_enable;
139 33 olivier.gi
wire               mclk;
140 134 olivier.gi
wire               aclk;
141 33 olivier.gi
wire               aclk_en;
142 134 olivier.gi
wire               smclk;
143 33 olivier.gi
wire               smclk_en;
144
reg                reset_n;
145 111 olivier.gi
wire               puc_rst;
146 33 olivier.gi
reg                nmi;
147
reg         [13:0] irq;
148
wire        [13:0] irq_acc;
149
wire        [13:0] irq_in;
150 106 olivier.gi
reg                cpu_en;
151 134 olivier.gi
reg         [13:0] wkup;
152
wire        [13:0] wkup_in;
153 106 olivier.gi
 
154 134 olivier.gi
// Scan (ASIC version only)
155
reg                scan_enable;
156
reg                scan_mode;
157
 
158 2 olivier.gi
// Debug interface
159 106 olivier.gi
reg                dbg_en;
160 33 olivier.gi
wire               dbg_freeze;
161
wire               dbg_uart_txd;
162 134 olivier.gi
wire               dbg_uart_rxd;
163
reg                dbg_uart_rxd_sel;
164
reg                dbg_uart_rxd_dly;
165
reg                dbg_uart_rxd_pre;
166
reg                dbg_uart_rxd_meta;
167 33 olivier.gi
reg         [15:0] dbg_uart_buf;
168 134 olivier.gi
reg                dbg_uart_rx_busy;
169
reg                dbg_uart_tx_busy;
170 2 olivier.gi
 
171
// Core testbench debuging signals
172 33 olivier.gi
wire    [8*32-1:0] i_state;
173
wire    [8*32-1:0] e_state;
174
wire        [31:0] inst_cycle;
175
wire    [8*32-1:0] inst_full;
176
wire        [31:0] inst_number;
177
wire        [15:0] inst_pc;
178
wire    [8*32-1:0] inst_short;
179 2 olivier.gi
 
180
// Testbench variables
181 33 olivier.gi
integer            error;
182
reg                stimulus_done;
183 2 olivier.gi
 
184
 
185
//
186
// Include files
187
//------------------------------
188
 
189
// CPU & Memory registers
190
`include "registers.v"
191
 
192
// Debug interface tasks
193
`include "dbg_uart_tasks.v"
194
 
195 134 olivier.gi
// Simple uart tasks
196
//`include "uart_tasks.v"
197
 
198 2 olivier.gi
// Verilog stimulus
199
`include "stimulus.v"
200
 
201
 
202
//
203
// Initialize ROM
204
//------------------------------
205
initial
206
  begin
207 94 olivier.gi
     #10 $readmemh("./pmem.mem", pmem_0.mem);
208 2 olivier.gi
  end
209
 
210
//
211
// Generate Clock & Reset
212
//------------------------------
213
initial
214
  begin
215 134 olivier.gi
     dco_clk          = 1'b0;
216
     dco_local_enable = 1'b0;
217
     forever
218
       begin
219
          #25;   // 20 MHz
220
          dco_local_enable = (dco_enable===1) ? dco_enable : (dco_wkup===1);
221
          if (dco_local_enable)
222
            dco_clk = ~dco_clk;
223
       end
224 2 olivier.gi
  end
225 134 olivier.gi
 
226 2 olivier.gi
initial
227
  begin
228 134 olivier.gi
     lfxt_clk          = 1'b0;
229
     lfxt_local_enable = 1'b0;
230
     forever
231
       begin
232
          #763;  // 655 kHz
233
          lfxt_local_enable = (lfxt_enable===1) ? lfxt_enable : (lfxt_wkup===1);
234
          if (lfxt_local_enable)
235
            lfxt_clk = ~lfxt_clk;
236
       end
237 2 olivier.gi
  end
238
 
239
initial
240
  begin
241
     reset_n       = 1'b1;
242 106 olivier.gi
     #93;
243 2 olivier.gi
     reset_n       = 1'b0;
244 106 olivier.gi
     #593;
245 2 olivier.gi
     reset_n       = 1'b1;
246
  end
247
 
248
initial
249
  begin
250 134 olivier.gi
     error            = 0;
251
     stimulus_done    = 1;
252
     irq              = 14'h0000;
253
     nmi              = 1'b0;
254
     wkup             = 14'h0000;
255
     cpu_en           = 1'b1;
256
     dbg_en           = 1'b0;
257
     dbg_uart_rxd_sel = 1'b0;
258
     dbg_uart_rxd_dly = 1'b1;
259
     dbg_uart_rxd_pre = 1'b1;
260
     dbg_uart_rxd_meta= 1'b0;
261
     dbg_uart_buf     = 16'h0000;
262
     dbg_uart_rx_busy = 1'b0;
263
     dbg_uart_tx_busy = 1'b0;
264
     p1_din           = 8'h00;
265
     p2_din           = 8'h00;
266
     p3_din           = 8'h00;
267
     p4_din           = 8'h00;
268
     p5_din           = 8'h00;
269
     p6_din           = 8'h00;
270
     inclk            = 1'b0;
271
     taclk            = 1'b0;
272
     ta_cci0a         = 1'b0;
273
     ta_cci0b         = 1'b0;
274
     ta_cci1a         = 1'b0;
275
     ta_cci1b         = 1'b0;
276
     ta_cci2a         = 1'b0;
277
     ta_cci2b         = 1'b0;
278
     uart_rxd         = 1'b1;
279
     scan_enable      = 1'b0;
280
     scan_mode        = 1'b0;
281 2 olivier.gi
  end
282
 
283
 
284
//
285 33 olivier.gi
// Program Memory
286 2 olivier.gi
//----------------------------------
287
 
288 72 olivier.gi
ram #(`PMEM_MSB, `PMEM_SIZE) pmem_0 (
289 2 olivier.gi
 
290
// OUTPUTs
291 33 olivier.gi
    .ram_dout    (pmem_dout),          // Program Memory data output
292 2 olivier.gi
 
293
// INPUTs
294 33 olivier.gi
    .ram_addr    (pmem_addr),          // Program Memory address
295
    .ram_cen     (pmem_cen),           // Program Memory chip enable (low active)
296
    .ram_clk     (mclk),               // Program Memory clock
297
    .ram_din     (pmem_din),           // Program Memory data input
298
    .ram_wen     (pmem_wen)            // Program Memory write enable (low active)
299 2 olivier.gi
);
300
 
301
 
302
//
303 33 olivier.gi
// Data Memory
304 2 olivier.gi
//----------------------------------
305
 
306 72 olivier.gi
ram #(`DMEM_MSB, `DMEM_SIZE) dmem_0 (
307 2 olivier.gi
 
308
// OUTPUTs
309 33 olivier.gi
    .ram_dout    (dmem_dout),          // Data Memory data output
310 2 olivier.gi
 
311
// INPUTs
312 33 olivier.gi
    .ram_addr    (dmem_addr),          // Data Memory address
313
    .ram_cen     (dmem_cen),           // Data Memory chip enable (low active)
314
    .ram_clk     (mclk),               // Data Memory clock
315
    .ram_din     (dmem_din),           // Data Memory data input
316
    .ram_wen     (dmem_wen)            // Data Memory write enable (low active)
317 2 olivier.gi
);
318
 
319
 
320
//
321
// openMSP430 Instance
322
//----------------------------------
323
 
324
openMSP430 dut (
325
 
326
// OUTPUTs
327 134 olivier.gi
    .aclk         (aclk),              // ASIC ONLY: ACLK
328
    .aclk_en      (aclk_en),           // FPGA ONLY: ACLK enable
329 2 olivier.gi
    .dbg_freeze   (dbg_freeze),        // Freeze peripherals
330
    .dbg_uart_txd (dbg_uart_txd),      // Debug interface: UART TXD
331 134 olivier.gi
    .dco_enable   (dco_enable),        // ASIC ONLY: Fast oscillator enable
332
    .dco_wkup     (dco_wkup),          // ASIC ONLY: Fast oscillator wake-up (asynchronous)
333 33 olivier.gi
    .dmem_addr    (dmem_addr),         // Data Memory address
334
    .dmem_cen     (dmem_cen),          // Data Memory chip enable (low active)
335
    .dmem_din     (dmem_din),          // Data Memory data input
336
    .dmem_wen     (dmem_wen),          // Data Memory write enable (low active)
337 2 olivier.gi
    .irq_acc      (irq_acc),           // Interrupt request accepted (one-hot signal)
338 134 olivier.gi
    .lfxt_enable  (lfxt_enable),       // ASIC ONLY: Low frequency oscillator enable
339
    .lfxt_wkup    (lfxt_wkup),         // ASIC ONLY: Low frequency oscillator wake-up (asynchronous)
340 2 olivier.gi
    .mclk         (mclk),              // Main system clock
341
    .per_addr     (per_addr),          // Peripheral address
342
    .per_din      (per_din),           // Peripheral data input
343 106 olivier.gi
    .per_we       (per_we),            // Peripheral write enable (high active)
344 2 olivier.gi
    .per_en       (per_en),            // Peripheral enable (high active)
345 33 olivier.gi
    .pmem_addr    (pmem_addr),         // Program Memory address
346
    .pmem_cen     (pmem_cen),          // Program Memory chip enable (low active)
347
    .pmem_din     (pmem_din),          // Program Memory data input (optional)
348
    .pmem_wen     (pmem_wen),          // Program Memory write enable (low active) (optional)
349 111 olivier.gi
    .puc_rst      (puc_rst),           // Main system reset
350 134 olivier.gi
    .smclk        (smclk),             // ASIC ONLY: SMCLK
351
    .smclk_en     (smclk_en),          // FPGA ONLY: SMCLK enable
352 2 olivier.gi
 
353
// INPUTs
354 134 olivier.gi
    .cpu_en       (cpu_en),            // Enable CPU code execution (asynchronous)
355
    .dbg_en       (dbg_en),            // Debug interface enable (asynchronous)
356
    .dbg_uart_rxd (dbg_uart_rxd),      // Debug interface: UART RXD (asynchronous)
357 2 olivier.gi
    .dco_clk      (dco_clk),           // Fast oscillator (fast clock)
358 33 olivier.gi
    .dmem_dout    (dmem_dout),         // Data Memory data output
359 2 olivier.gi
    .irq          (irq_in),            // Maskable interrupts
360
    .lfxt_clk     (lfxt_clk),          // Low frequency oscillator (typ 32kHz)
361
    .nmi          (nmi),               // Non-maskable interrupt (asynchronous)
362
    .per_dout     (per_dout),          // Peripheral data output
363 33 olivier.gi
    .pmem_dout    (pmem_dout),         // Program Memory data output
364 134 olivier.gi
    .reset_n      (reset_n),           // Reset Pin (low active, asynchronous)
365
    .scan_enable  (scan_enable),       // ASIC ONLY: Scan enable (active during scan shifting)
366
    .scan_mode    (scan_mode),         // ASIC ONLY: Scan mode
367
    .wkup         (|wkup_in)           // ASIC ONLY: System Wake-up (asynchronous)
368 2 olivier.gi
);
369
 
370
//
371
// Digital I/O
372
//----------------------------------
373
 
374 99 olivier.gi
`ifdef CVER
375
omsp_gpio #(1,
376
            1,
377
            1,
378
            1,
379
            1,
380
            1)         gpio_0 (
381
`else
382 34 olivier.gi
omsp_gpio #(.P1_EN(1),
383
            .P2_EN(1),
384
            .P3_EN(1),
385
            .P4_EN(1),
386
            .P5_EN(1),
387
            .P6_EN(1)) gpio_0 (
388 99 olivier.gi
`endif
389 2 olivier.gi
 
390
// OUTPUTs
391
    .irq_port1    (irq_port1),         // Port 1 interrupt
392
    .irq_port2    (irq_port2),         // Port 2 interrupt
393
    .p1_dout      (p1_dout),           // Port 1 data output
394
    .p1_dout_en   (p1_dout_en),        // Port 1 data output enable
395
    .p1_sel       (p1_sel),            // Port 1 function select
396
    .p2_dout      (p2_dout),           // Port 2 data output
397
    .p2_dout_en   (p2_dout_en),        // Port 2 data output enable
398
    .p2_sel       (p2_sel),            // Port 2 function select
399
    .p3_dout      (p3_dout),           // Port 3 data output
400
    .p3_dout_en   (p3_dout_en),        // Port 3 data output enable
401
    .p3_sel       (p3_sel),            // Port 3 function select
402
    .p4_dout      (p4_dout),           // Port 4 data output
403
    .p4_dout_en   (p4_dout_en),        // Port 4 data output enable
404
    .p4_sel       (p4_sel),            // Port 4 function select
405
    .p5_dout      (p5_dout),           // Port 5 data output
406
    .p5_dout_en   (p5_dout_en),        // Port 5 data output enable
407
    .p5_sel       (p5_sel),            // Port 5 function select
408
    .p6_dout      (p6_dout),           // Port 6 data output
409
    .p6_dout_en   (p6_dout_en),        // Port 6 data output enable
410
    .p6_sel       (p6_sel),            // Port 6 function select
411
    .per_dout     (per_dout_dio),      // Peripheral data output
412
 
413
// INPUTs
414
    .mclk         (mclk),              // Main system clock
415
    .p1_din       (p1_din),            // Port 1 data input
416
    .p2_din       (p2_din),            // Port 2 data input
417
    .p3_din       (p3_din),            // Port 3 data input
418
    .p4_din       (p4_din),            // Port 4 data input
419
    .p5_din       (p5_din),            // Port 5 data input
420
    .p6_din       (p6_din),            // Port 6 data input
421
    .per_addr     (per_addr),          // Peripheral address
422
    .per_din      (per_din),           // Peripheral data input
423
    .per_en       (per_en),            // Peripheral enable (high active)
424 106 olivier.gi
    .per_we       (per_we),            // Peripheral write enable (high active)
425 111 olivier.gi
    .puc_rst      (puc_rst)            // Main system reset
426 2 olivier.gi
);
427
 
428
//
429
// Timers
430
//----------------------------------
431
 
432 34 olivier.gi
omsp_timerA timerA_0 (
433 2 olivier.gi
 
434
// OUTPUTs
435
    .irq_ta0      (irq_ta0),           // Timer A interrupt: TACCR0
436
    .irq_ta1      (irq_ta1),           // Timer A interrupt: TAIV, TACCR1, TACCR2
437
    .per_dout     (per_dout_timerA),   // Peripheral data output
438
    .ta_out0      (ta_out0),           // Timer A output 0
439
    .ta_out0_en   (ta_out0_en),        // Timer A output 0 enable
440
    .ta_out1      (ta_out1),           // Timer A output 1
441
    .ta_out1_en   (ta_out1_en),        // Timer A output 1 enable
442
    .ta_out2      (ta_out2),           // Timer A output 2
443
    .ta_out2_en   (ta_out2_en),        // Timer A output 2 enable
444
 
445
// INPUTs
446
    .aclk_en      (aclk_en),           // ACLK enable (from CPU)
447
    .dbg_freeze   (dbg_freeze),        // Freeze Timer A counter
448
    .inclk        (inclk),             // INCLK external timer clock (SLOW)
449
    .irq_ta0_acc  (irq_acc[9]),        // Interrupt request TACCR0 accepted
450
    .mclk         (mclk),              // Main system clock
451
    .per_addr     (per_addr),          // Peripheral address
452
    .per_din      (per_din),           // Peripheral data input
453
    .per_en       (per_en),            // Peripheral enable (high active)
454 106 olivier.gi
    .per_we       (per_we),            // Peripheral write enable (high active)
455 111 olivier.gi
    .puc_rst      (puc_rst),           // Main system reset
456 2 olivier.gi
    .smclk_en     (smclk_en),          // SMCLK enable (from CPU)
457
    .ta_cci0a     (ta_cci0a),          // Timer A compare 0 input A
458
    .ta_cci0b     (ta_cci0b),          // Timer A compare 0 input B
459
    .ta_cci1a     (ta_cci1a),          // Timer A compare 1 input A
460
    .ta_cci1b     (ta_cci1b),          // Timer A compare 1 input B
461
    .ta_cci2a     (ta_cci2a),          // Timer A compare 2 input A
462
    .ta_cci2b     (ta_cci2b),          // Timer A compare 2 input B
463
    .taclk        (taclk)              // TACLK external timer clock (SLOW)
464
);
465
 
466
//
467 134 olivier.gi
// Simple full duplex UART (8N1 protocol)
468
//----------------------------------------
469
`ifdef READY_FOR_PRIMETIME
470
omsp_uart #(.BASE_ADDR(15'h0080)) uart_0 (
471
 
472
// OUTPUTs
473
    .irq_uart_rx  (irq_uart_rx),   // UART receive interrupt
474
    .irq_uart_tx  (irq_uart_tx),   // UART transmit interrupt
475
    .per_dout     (per_dout_uart), // Peripheral data output
476
    .uart_txd     (uart_txd),      // UART Data Transmit (TXD)
477
 
478
// INPUTs
479
    .mclk         (mclk),          // Main system clock
480
    .per_addr     (per_addr),      // Peripheral address
481
    .per_din      (per_din),       // Peripheral data input
482
    .per_en       (per_en),        // Peripheral enable (high active)
483
    .per_we       (per_we),        // Peripheral write enable (high active)
484
    .puc_rst      (puc_rst),       // Main system reset
485
    .smclk_en     (smclk_en),      // SMCLK enable (from CPU)
486
    .uart_rxd     (uart_rxd)       // UART Data Receive (RXD)
487
);
488
`else
489
    assign irq_uart_rx   =  1'b0;
490
    assign irq_uart_tx   =  1'b0;
491
    assign per_dout_uart = 16'h0000;
492
    assign uart_txd      =  1'b0;
493
`endif
494
 
495
//
496 2 olivier.gi
// Peripheral templates
497
//----------------------------------
498
 
499
template_periph_8b template_periph_8b_0 (
500
 
501
// OUTPUTs
502
    .per_dout     (per_dout_temp_8b),  // Peripheral data output
503
 
504
// INPUTs
505
    .mclk         (mclk),              // Main system clock
506
    .per_addr     (per_addr),          // Peripheral address
507
    .per_din      (per_din),           // Peripheral data input
508
    .per_en       (per_en),            // Peripheral enable (high active)
509 106 olivier.gi
    .per_we       (per_we),            // Peripheral write enable (high active)
510 111 olivier.gi
    .puc_rst      (puc_rst)            // Main system reset
511 2 olivier.gi
);
512
 
513 111 olivier.gi
`ifdef CVER
514
template_periph_16b #(15'h0190)             template_periph_16b_0 (
515
`else
516 151 olivier.gi
template_periph_16b #(.BASE_ADDR((15'd`PER_SIZE-15'h0070) & 15'h7ff8)) template_periph_16b_0 (
517 111 olivier.gi
`endif
518 2 olivier.gi
// OUTPUTs
519
    .per_dout     (per_dout_temp_16b), // Peripheral data output
520
 
521
// INPUTs
522
    .mclk         (mclk),              // Main system clock
523
    .per_addr     (per_addr),          // Peripheral address
524
    .per_din      (per_din),           // Peripheral data input
525
    .per_en       (per_en),            // Peripheral enable (high active)
526 106 olivier.gi
    .per_we       (per_we),            // Peripheral write enable (high active)
527 111 olivier.gi
    .puc_rst      (puc_rst)            // Main system reset
528 2 olivier.gi
);
529
 
530
 
531
//
532
// Combine peripheral data bus
533
//----------------------------------
534
 
535
assign per_dout = per_dout_dio       |
536
                  per_dout_timerA    |
537 134 olivier.gi
                  per_dout_uart      |
538 2 olivier.gi
                  per_dout_temp_8b   |
539
                  per_dout_temp_16b;
540
 
541
 
542
//
543 134 olivier.gi
// Map peripheral interrupts & wakeups
544 2 olivier.gi
//----------------------------------------
545
 
546 134 olivier.gi
assign irq_in  = irq  | {1'b0,           // Vector 13  (0xFFFA)
547
                         1'b0,           // Vector 12  (0xFFF8)
548
                         1'b0,           // Vector 11  (0xFFF6)
549
                         1'b0,           // Vector 10  (0xFFF4) - Watchdog -
550
                         irq_ta0,        // Vector  9  (0xFFF2)
551
                         irq_ta1,        // Vector  8  (0xFFF0)
552
                         irq_uart_rx,    // Vector  7  (0xFFEE)
553
                         irq_uart_tx,    // Vector  6  (0xFFEC)
554
                         1'b0,           // Vector  5  (0xFFEA)
555
                         1'b0,           // Vector  4  (0xFFE8)
556
                         irq_port2,      // Vector  3  (0xFFE6)
557
                         irq_port1,      // Vector  2  (0xFFE4)
558
                         1'b0,           // Vector  1  (0xFFE2)
559
                         1'b0};          // Vector  0  (0xFFE0)
560 2 olivier.gi
 
561 134 olivier.gi
assign wkup_in = wkup | {1'b0,           // Vector 13  (0xFFFA)
562
                         1'b0,           // Vector 12  (0xFFF8)
563
                         1'b0,           // Vector 11  (0xFFF6)
564
                         1'b0,           // Vector 10  (0xFFF4) - Watchdog -
565
                         1'b0,           // Vector  9  (0xFFF2)
566
                         1'b0,           // Vector  8  (0xFFF0)
567
                         1'b0,           // Vector  7  (0xFFEE)
568
                         1'b0,           // Vector  6  (0xFFEC)
569
                         1'b0,           // Vector  5  (0xFFEA)
570
                         1'b0,           // Vector  4  (0xFFE8)
571
                         1'b0,           // Vector  3  (0xFFE6)
572
                         1'b0,           // Vector  2  (0xFFE4)
573
                         1'b0,           // Vector  1  (0xFFE2)
574
                         1'b0};          // Vector  0  (0xFFE0)
575 2 olivier.gi
 
576 134 olivier.gi
 
577 2 olivier.gi
//
578
// Debug utility signals
579
//----------------------------------------
580
msp_debug msp_debug_0 (
581
 
582
// OUTPUTs
583
    .e_state      (e_state),           // Execution state
584
    .i_state      (i_state),           // Instruction fetch state
585
    .inst_cycle   (inst_cycle),        // Cycle number within current instruction
586
    .inst_full    (inst_full),         // Currently executed instruction (full version)
587
    .inst_number  (inst_number),       // Instruction number since last system reset
588
    .inst_pc      (inst_pc),           // Instruction Program counter
589
    .inst_short   (inst_short),        // Currently executed instruction (short version)
590
 
591
// INPUTs
592
    .mclk         (mclk),              // Main system clock
593 111 olivier.gi
    .puc_rst      (puc_rst)            // Main system reset
594 2 olivier.gi
);
595
 
596
 
597
//
598
// Generate Waveform
599
//----------------------------------------
600
initial
601
  begin
602 65 olivier.gi
   `ifdef NODUMP
603 2 olivier.gi
   `else
604 65 olivier.gi
     `ifdef VPD_FILE
605
        $vcdplusfile("tb_openMSP430.vpd");
606
        $vcdpluson();
607
     `else
608 98 olivier.gi
       `ifdef TRN_FILE
609
          $recordfile ("tb_openMSP430.trn");
610
          $recordvars;
611
       `else
612
          $dumpfile("tb_openMSP430.vcd");
613
          $dumpvars(0, tb_openMSP430);
614
       `endif
615 65 olivier.gi
     `endif
616 2 olivier.gi
   `endif
617
  end
618
 
619
//
620
// End of simulation
621
//----------------------------------------
622
 
623
initial // Timeout
624
  begin
625 67 olivier.gi
   `ifdef NO_TIMEOUT
626
   `else
627 134 olivier.gi
     `ifdef VERY_LONG_TIMEOUT
628
       #500000000;
629
     `else
630 67 olivier.gi
     `ifdef LONG_TIMEOUT
631
       #5000000;
632
     `else
633
       #500000;
634
     `endif
635 134 olivier.gi
     `endif
636 67 olivier.gi
       $display(" ===============================================");
637
       $display("|               SIMULATION FAILED               |");
638
       $display("|              (simulation Timeout)             |");
639
       $display(" ===============================================");
640
       $finish;
641 2 olivier.gi
   `endif
642
  end
643
 
644
initial // Normal end of test
645
  begin
646 94 olivier.gi
     @(negedge stimulus_done);
647
     wait(inst_pc=='hffff);
648
 
649 2 olivier.gi
     $display(" ===============================================");
650
     if (error!=0)
651
       begin
652
          $display("|               SIMULATION FAILED               |");
653
          $display("|     (some verilog stimulus checks failed)     |");
654
       end
655
     else if (~stimulus_done)
656
       begin
657
          $display("|               SIMULATION FAILED               |");
658
          $display("|     (the verilog stimulus didn't complete)    |");
659
       end
660
     else
661
       begin
662
          $display("|               SIMULATION PASSED               |");
663
       end
664
     $display(" ===============================================");
665
     $finish;
666
  end
667
 
668
 
669
//
670
// Tasks Definition
671
//------------------------------
672
 
673
   task tb_error;
674
      input [65*8:0] error_string;
675
      begin
676
         $display("ERROR: %s %t", error_string, $time);
677
         error = error+1;
678
      end
679
   endtask
680
 
681
 
682
endmodule

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