OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [dbg_i2c_halt_irq.v] - Blame information for rev 202

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 154 olivier.gi
/*===========================================================================*/
2
/* Copyright (C) 2001 Authors                                                */
3
/*                                                                           */
4
/* This source file may be used and distributed without restriction provided */
5
/* that this copyright statement is not removed from the file and that any   */
6
/* derivative work contains the original copyright notice and the associated */
7
/* disclaimer.                                                               */
8
/*                                                                           */
9
/* This source file is free software; you can redistribute it and/or modify  */
10
/* it under the terms of the GNU Lesser General Public License as published  */
11
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12
/* (at your option) any later version.                                       */
13
/*                                                                           */
14
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17
/* License for more details.                                                 */
18
/*                                                                           */
19
/* You should have received a copy of the GNU Lesser General Public License  */
20
/* along with this source; if not, write to the Free Software Foundation,    */
21
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22
/*                                                                           */
23
/*===========================================================================*/
24
/*                        SERIAL DEBUG INTERFACE                             */
25
/*---------------------------------------------------------------------------*/
26
/* Test the serial debug interface:                                          */
27
/*                           - Interrupts when going out of halt mode.       */
28
/*                                                                           */
29
/* Author(s):                                                                */
30
/*             - Olivier Girard,    olgirard@gmail.com                       */
31
/*                                                                           */
32
/*---------------------------------------------------------------------------*/
33
/* $Rev: 19 $                                                                */
34
/* $LastChangedBy: olivier.girard $                                          */
35
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
36
/*===========================================================================*/
37
 
38
reg [15:0] r13_bkup;
39
 
40
initial
41
   begin
42
      $display(" ===============================================");
43
      $display("|                 START SIMULATION              |");
44
      $display(" ===============================================");
45
`ifdef DBG_EN
46
`ifdef DBG_I2C
47
      #1 dbg_en = 1;
48
      repeat(30) @(posedge mclk);
49
      stimulus_done = 0;
50
 
51
`ifdef DBG_RST_BRK_EN
52
      dbg_i2c_wr(CPU_CTL,  16'h0002);  // RUN
53
`endif
54
 
55
      // Wait until software initialization is done
56
      if (r15!==(`PER_SIZE+16'h0000))
57
        @(r15==(`PER_SIZE+16'h0000));
58
 
59
 
60
      dbg_i2c_wr(CPU_CTL,  16'h0001);  // HALT
61
      repeat(150) @(posedge mclk);
62
      r13_bkup = r13;
63 202 olivier.gi
 
64 154 olivier.gi
      // Generate a GPIO interrupt
65
      p1_din[0] = 1'b1;
66
      repeat(150) @(posedge mclk);
67
 
68
      // Re-start the CPU
69
      dbg_i2c_wr(CPU_CTL,  16'h0002);  // RUN
70
      repeat(150) @(posedge mclk);
71
 
72
      // Make sure the interrupt was serviced
73
      if (r14 !== 16'haaaa) tb_error("====== Interrupt was not properly serviced =====");
74 202 olivier.gi
 
75 154 olivier.gi
      // Make sure the program resumed execution when coming back from IRQ
76
      if (r13 === r13_bkup) tb_error("====== Program didn't properly resumed execution =====");
77
 
78
 
79 202 olivier.gi
      p1_din[1] = 1'b1;
80 154 olivier.gi
      stimulus_done = 1;
81
`else
82
 
83 202 olivier.gi
       tb_skip_finish("|   (serial debug interface I2C not included)   |");
84 154 olivier.gi
`endif
85
`else
86 202 olivier.gi
       tb_skip_finish("|      (serial debug interface not included)    |");
87 154 olivier.gi
`endif
88
   end

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.