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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                  CPU LOW POWER MODES & DMA TRANSFER                       */
/*---------------------------------------------------------------------------*/
/* Test DMA transfer with the CPU Low Power modes:                           */
/*                                                                           */
/*                      - LPM0       <=>  CPUOFF                             */
/*                      - LPM1       <=>  CPUOFF + SCG0                      */
/*                      - LPM2       <=>  CPUOFF +        SCG1               */
/*                      - LPM3       <=>  CPUOFF + SCG0 + SCG1               */
/*                      - LPM4       <=>  CPUOFF + SCG0 + SCG1 + OSCOFF      */
/*                                                                           */
/*                                                                           */
/* Reminder about config registers:                                          */
/*                                                                           */
/*                      - CPUOFF     <=>  turns off CPU.                     */
/*                      - SCG0       <=>  turns off DCO.                     */
/*                      - SCG1       <=>  turns off SMCLK.                   */
/*                      - OSCOFF     <=>  turns off LFXT_CLK.                */
/*                                                                           */
/*                      - DMA_CPUOFF <=>  allow DMA to turn on MCLK          */
/*                      - DMA_SCG0   <=>  allow DMA to turn on DCO           */
/*                      - DMA_SCG1   <=>  allow DMA to turn on SMCLK         */
/*                      - DMA_OSCOFF <=>  allow DMA to turn on LFXT_CLK      */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
 
.include "pmem_defs.asm"
 
.global main
 
.macro LPM0
 bis    #0x0010, r2
.endm
.macro LPM1
 bis    #0x0050, r2
.endm
.macro LPM2
 bis    #0x0090, r2
.endm
.macro LPM3
 bis    #0x00D0, r2
.endm
.macro LPM4
 bis    #0x00F0, r2
.endm
 
.macro LPM0_exit
 bic    #0x0010, @r1
.endm
.macro LPM1_exit
 bic    #0x0050, @r1
.endm
.macro LPM2_exit
 bic    #0x0090, @r1
.endm
.macro LPM3_exit
 bic    #0x00D0, @r1
.endm
.macro LPM4_exit
 bic    #0x00F0, @r1
.endm
 
.macro DMA_NO_LPM
 bic.b  #0x0F, &BCSCTL1
.endm
.macro DMA_CPUOFF
 bis.b  #0x01, &BCSCTL1
.endm
.macro DMA_OSCOFF
 bis.b  #0x02, &BCSCTL1
.endm
.macro DMA_SCG0
 bis.b  #0x04, &BCSCTL1
.endm
.macro DMA_SCG1
 bis.b  #0x08, &BCSCTL1
.endm
 
        /* ----------------------         SOME VARIABLES IN ROM  --------------- */
diverse_data:
        .word 0x0000            ; set to 1 in order to end test
        .word 0x0001            ; increment value
 
        /* ----------------------                 MAIN           --------------- */
WAIT_FUNC:
        dec r14
        jnz WAIT_FUNC
        ret
 
main:
 
        ; Initialize stack and enable global interrupts
        mov    #DMEM_250, r1
        eint
 
        ; Wait for a while to give enough time to ACLK
        mov    #0x0050, r14
        call   #WAIT_FUNC
        mov    #0x1000, r15
 
        /* --------------------------  ACTIVE  ----------------------------- */
 
        mov    #0x1001, r15
        mov.b  #0x00, &BCSCTL2  ; # MCLK  = DCO_CLK
                                ; # SMCLK = DCO_CLK
        mov    #0x0080, r14
        call   #WAIT_FUNC
 
        mov    #0x2000, r15
 
 
        /* --------------------------   LPM1   ----------------------------- */
 
        ;; Go to LPM1 mode for all possible DMA configuration
 
        mov    #0x3000, r15
        mov    #0x0000, r12
 
        mov    #0x0010, r10      ; # Number of combination to try
        mov.b  #0x00,   &BCSCTL1 ; # Initialize DMA low-power mode
 
lpm0_loop:
        cmp.b  r10,     r12
        jge    lpm0_loop_done
 
        LPM1                     ; # CPU_MCLK off + DCO off
        mov    #0x0090, r14
        call   #WAIT_FUNC
 
        inc    r15
        inc    r12
        mov.b  r12,     &BCSCTL1 ; # Set DMA low-power mode for next round
        jmp    lpm0_loop
 
lpm0_loop_done:
 
        mov.b  #0x00,   &BCSCTL1
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
        /* ----------------------      INTERRUPT ROUTINES    --------------- */
PORT2_VECTOR:
        push       r13
        push       r14
        mov    #0x0060, r14
        call   #WAIT_FUNC
        mov    #0xbbbb, r13
        pop        r14
        pop        r13
        bic    #0xf0, 0(r1) ; exit all lowpower mode
        reti
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word PORT2_VECTOR ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [dma_lpm1_asic.s43] - Blame information for rev 202

Line No.	Rev	Author	Line
1	202	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* CPU LOW POWER MODES & DMA TRANSFER */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test DMA transfer with the CPU Low Power modes: */`
27			`/* */`
28			`/* - LPM0 <=> CPUOFF */`
29			`/* - LPM1 <=> CPUOFF + SCG0 */`
30			`/* - LPM2 <=> CPUOFF + SCG1 */`
31			`/* - LPM3 <=> CPUOFF + SCG0 + SCG1 */`
32			`/* - LPM4 <=> CPUOFF + SCG0 + SCG1 + OSCOFF */`
33			`/* */`
34			`/* */`
35			`/* Reminder about config registers: */`
36			`/* */`
37			`/* - CPUOFF <=> turns off CPU. */`
38			`/* - SCG0 <=> turns off DCO. */`
39			`/* - SCG1 <=> turns off SMCLK. */`
40			`/* - OSCOFF <=> turns off LFXT_CLK. */`
41			`/* */`
42			`/* - DMA_CPUOFF <=> allow DMA to turn on MCLK */`
43			`/* - DMA_SCG0 <=> allow DMA to turn on DCO */`
44			`/* - DMA_SCG1 <=> allow DMA to turn on SMCLK */`
45			`/* - DMA_OSCOFF <=> allow DMA to turn on LFXT_CLK */`
46			`/* */`
47			`/* Author(s): */`
48			`/* - Olivier Girard, olgirard@gmail.com */`
49			`/* */`
50			`/---------------------------------------------------------------------------/`
51			`/* $Rev: 19 $ */`
52			`/* $LastChangedBy: olivier.girard $ */`
53			`/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */`
54			`/===========================================================================/`
55
56			`.include "pmem_defs.asm"`
57
58			`.global main`
59
60			`.macro LPM0`
61			`bis #0x0010, r2`
62			`.endm`
63			`.macro LPM1`
64			`bis #0x0050, r2`
65			`.endm`
66			`.macro LPM2`
67			`bis #0x0090, r2`
68			`.endm`
69			`.macro LPM3`
70			`bis #0x00D0, r2`
71			`.endm`
72			`.macro LPM4`
73			`bis #0x00F0, r2`
74			`.endm`
75
76			`.macro LPM0_exit`
77			`bic #0x0010, @r1`
78			`.endm`
79			`.macro LPM1_exit`
80			`bic #0x0050, @r1`
81			`.endm`
82			`.macro LPM2_exit`
83			`bic #0x0090, @r1`
84			`.endm`
85			`.macro LPM3_exit`
86			`bic #0x00D0, @r1`
87			`.endm`
88			`.macro LPM4_exit`
89			`bic #0x00F0, @r1`
90			`.endm`
91
92			`.macro DMA_NO_LPM`
93			`bic.b #0x0F, &BCSCTL1`
94			`.endm`
95			`.macro DMA_CPUOFF`
96			`bis.b #0x01, &BCSCTL1`
97			`.endm`
98			`.macro DMA_OSCOFF`
99			`bis.b #0x02, &BCSCTL1`
100			`.endm`
101			`.macro DMA_SCG0`
102			`bis.b #0x04, &BCSCTL1`
103			`.endm`
104			`.macro DMA_SCG1`
105			`bis.b #0x08, &BCSCTL1`
106			`.endm`
107
108			`/* ---------------------- SOME VARIABLES IN ROM --------------- */`
109			`diverse_data:`
110			`.word 0x0000 ; set to 1 in order to end test`
111			`.word 0x0001 ; increment value`
112
113			`/* ---------------------- MAIN --------------- */`
114			`WAIT_FUNC:`
115			`dec r14`
116			`jnz WAIT_FUNC`
117			`ret`
118
119			`main:`
120
121			`; Initialize stack and enable global interrupts`
122			`mov #DMEM_250, r1`
123			`eint`
124
125			`; Wait for a while to give enough time to ACLK`
126			`mov #0x0050, r14`
127			`call #WAIT_FUNC`
128			`mov #0x1000, r15`
129
130			`/* -------------------------- ACTIVE ----------------------------- */`
131
132			`mov #0x1001, r15`
133			`mov.b #0x00, &BCSCTL2 ; # MCLK = DCO_CLK`
134			`; # SMCLK = DCO_CLK`
135			`mov #0x0080, r14`
136			`call #WAIT_FUNC`
137
138			`mov #0x2000, r15`
139
140
141			`/* -------------------------- LPM1 ----------------------------- */`
142
143			`;; Go to LPM1 mode for all possible DMA configuration`
144
145			`mov #0x3000, r15`
146			`mov #0x0000, r12`
147
148			`mov #0x0010, r10 ; # Number of combination to try`
149			`mov.b #0x00, &BCSCTL1 ; # Initialize DMA low-power mode`
150
151			`lpm0_loop:`
152			`cmp.b r10, r12`
153			`jge lpm0_loop_done`
154
155			`LPM1 ; # CPU_MCLK off + DCO off`
156			`mov #0x0090, r14`
157			`call #WAIT_FUNC`
158
159			`inc r15`
160			`inc r12`
161			`mov.b r12, &BCSCTL1 ; # Set DMA low-power mode for next round`
162			`jmp lpm0_loop`
163
164			`lpm0_loop_done:`
165
166			`mov.b #0x00, &BCSCTL1`
167
168
169			`/* ---------------------- END OF TEST --------------- */`
170			`end_of_test:`
171			`nop`
172			`br #0xffff`
173
174
175			`/* ---------------------- INTERRUPT ROUTINES --------------- */`
176			`PORT2_VECTOR:`
177			`push r13`
178			`push r14`
179			`mov #0x0060, r14`
180			`call #WAIT_FUNC`
181			`mov #0xbbbb, r13`
182			`pop r14`
183			`pop r13`
184			`bic #0xf0, 0(r1) ; exit all lowpower mode`
185			`reti`
186
187
188			`/* ---------------------- INTERRUPT VECTORS --------------- */`
189
190			`.section .vectors, "a"`
191			`.word end_of_test ; Interrupt 0 (lowest priority)`
192			`.word end_of_test ; Interrupt 1`
193			`.word end_of_test ; Interrupt 2`
194			`.word PORT2_VECTOR ; Interrupt 3`
195			`.word end_of_test ; Interrupt 4`
196			`.word end_of_test ; Interrupt 5`
197			`.word end_of_test ; Interrupt 6`
198			`.word end_of_test ; Interrupt 7`
199			`.word end_of_test ; Interrupt 8`
200			`.word end_of_test ; Interrupt 9`
201			`.word end_of_test ; Interrupt 10 Watchdog timer`
202			`.word end_of_test ; Interrupt 11`
203			`.word end_of_test ; Interrupt 12`
204			`.word end_of_test ; Interrupt 13`
205			`.word end_of_test ; Interrupt 14 NMI`
206			`.word main ; Interrupt 15 (highest priority) RESET`