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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [mpy_basic.s43] - Blame information for rev 67

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                          HARDWARE MULTIPLIER                              */
/*---------------------------------------------------------------------------*/
/* Test the hardware multiplier:                                             */
/*                                - MPY  mode.                               */
/*                                - MPYS mode.                               */
/*                                - MAC  mode.                               */
/*                                - MACS mode.                               */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 18 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
 
.global main
 
.set   MPY,    0x0130
.set   MPYS,   0x0132
.set   MAC,    0x0134
.set   MACS,   0x0136
.set   OP2,    0x0138
.set   RESLO,  0x013A
.set   RESHI,  0x013C
.set   SUMEXT, 0x013E
 
 
main:
 
        /* --------------   UNSIGNED MULTIPLICATION   --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MPY 	; 0x3104 * 0x0285 = 0x007B_7F14, ext=0x0000
        mov #0x0285, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MPY 	; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MPY 	; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPY 	; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MPY 	; 0xFFFF * 0xFFFF = 0xFFFE_0001, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPY 	; 0x7FFF * 0xFFFF = 0x7FFE_8001, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPY 	; 0x8000 * 0x7FFF = 0x3FFF_8000, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPY 	; 0x8000 * 0xFFFF = 0x7FFF_8000, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPY 	; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
        /* --------------    SIGNED MULTIPLICATION    --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MPYS 	; 0x3104 * 0x8285 = 0xE7F9_7F14, ext=0xFFFF
        mov #0x8285, &OP2       ;  12548 * -32123
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MPYS 	; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MPYS 	; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPYS 	; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MPYS 	; 0xFFFF * 0xFFFF = 0x0000_0001, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MPYS 	; 0x7FFF * 0xFFFF = 0xFFFF_8001, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPYS 	; 0x8000 * 0x7FFF = 0xC000_8000, ext=0xFFFF
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPYS 	; 0x8000 * 0xFFFF = 0x0000_8000, ext=0x0000
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MPYS 	; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
        /* --------------   UNSIGNED MULTIPLY-ACCUMULATE   --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MAC 	; 0xC000_0000 + (0x3104 * 0x0285) = 0x007B_7F14, ext=0x0000
        mov #0x0285, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MAC 	; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0x0000
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MAC 	; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0x0000
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MAC 	; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MAC 	; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xBFFE_0001, ext=0x0001
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MAC 	; 0xC000_0000 + (0x7FFF * 0xFFFF) = 0x3FFE_8001, ext=0x0001
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MAC 	; 0xC000_0000 + (0x8000 * 0x7FFF) = 0xFFFF_8000, ext=0x0000
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MAC 	; 0xC000_0000 + (0x8000 * 0xFFFF) = 0x3FFF_8000, ext=0x0001
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MAC 	; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0001
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
 
        /* --------------   SIGNED MULTIPLY-ACCUMULATE   --------------- */
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x3104, &MACS 	; 0xC000_0000 + (0x3104 * 0x8285) = 0xA7F9_7F14, ext=0xFFFF
        mov #0x8285, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0000, &MACS 	; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0xFFFF
        mov #0x0000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x0001, &MACS 	; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0xFFFF
        mov #0x0001, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MACS 	; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0xFFFF
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0xFFFF, &MACS 	; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xC000_0001, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x7FFF, &MACS 	; 0xC000_0000 + (0x7FFF * 0xFFFF = 0xBFFF_8001, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MACS 	; 0xC000_0000 + (0x8000 * 0x7FFF) = 0x8000_8000, ext=0xFFFF
        mov #0x7FFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MACS 	; 0xC000_0000 + (0x8000 * 0xFFFF) = 0xC000_8000, ext=0xFFFF
        mov #0xFFFF, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop
 
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI
 
        mov #0x8000, &MACS 	; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0000
        mov #0x8000, &OP2
 
        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop
 
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word end_of_test  ; Interrupt  2                      
.word end_of_test  ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [mpy_basic.s43] - Blame information for rev 67

Line No.	Rev	Author	Line
1	67	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* HARDWARE MULTIPLIER */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the hardware multiplier: */`
27			`/* - MPY mode. */`
28			`/* - MPYS mode. */`
29			`/* - MAC mode. */`
30			`/* - MACS mode. */`
31			`/* */`
32			`/* Author(s): */`
33			`/* - Olivier Girard, olgirard@gmail.com */`
34			`/* */`
35			`/---------------------------------------------------------------------------/`
36			`/* $Rev: 18 $ */`
37			`/* $LastChangedBy: olivier.girard $ */`
38			`/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ */`
39			`/===========================================================================/`
40
41			`.global main`
42
43			`.set MPY, 0x0130`
44			`.set MPYS, 0x0132`
45			`.set MAC, 0x0134`
46			`.set MACS, 0x0136`
47			`.set OP2, 0x0138`
48			`.set RESLO, 0x013A`
49			`.set RESHI, 0x013C`
50			`.set SUMEXT, 0x013E`
51
52
53			`main:`
54
55			`/* -------------- UNSIGNED MULTIPLICATION --------------- */`
56
57			`mov #0x0000, &RESLO`
58			`mov #0xC000, &RESHI`
59
60			`mov #0x3104, &MPY ; 0x3104 * 0x0285 = 0x007B_7F14, ext=0x0000`
61			`mov #0x0285, &OP2`
62
63			`mov &RESLO, R10`
64			`mov &RESHI, R11`
65			`mov &SUMEXT, R12`
66			`nop`
67			`mov #0x0001, R15`
68			`nop`
69			`nop`
70			`nop`
71			`nop`
72
73			`mov #0x0000, &RESLO`
74			`mov #0xC000, &RESHI`
75
76			`mov #0x0000, &MPY ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000`
77			`mov #0x0000, &OP2`
78
79			`mov &RESLO, R10`
80			`mov &RESHI, R11`
81			`mov &SUMEXT, R12`
82			`nop`
83			`mov #0x0002, R15`
84			`nop`
85			`nop`
86			`nop`
87			`nop`
88
89			`mov #0x0000, &RESLO`
90			`mov #0xC000, &RESHI`
91
92			`mov #0x0001, &MPY ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000`
93			`mov #0x0001, &OP2`
94
95			`mov &RESLO, R10`
96			`mov &RESHI, R11`
97			`mov &SUMEXT, R12`
98			`nop`
99			`mov #0x0003, R15`
100			`nop`
101			`nop`
102			`nop`
103			`nop`
104
105			`mov #0x0000, &RESLO`
106			`mov #0xC000, &RESHI`
107
108			`mov #0x7FFF, &MPY ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000`
109			`mov #0x7FFF, &OP2`
110
111			`mov &RESLO, R10`
112			`mov &RESHI, R11`
113			`mov &SUMEXT, R12`
114			`nop`
115			`mov #0x0004, R15`
116			`nop`
117			`nop`
118			`nop`
119			`nop`
120
121			`mov #0x0000, &RESLO`
122			`mov #0xC000, &RESHI`
123
124			`mov #0xFFFF, &MPY ; 0xFFFF * 0xFFFF = 0xFFFE_0001, ext=0x0000`
125			`mov #0xFFFF, &OP2`
126
127			`mov &RESLO, R10`
128			`mov &RESHI, R11`
129			`mov &SUMEXT, R12`
130			`nop`
131			`mov #0x0005, R15`
132			`nop`
133			`nop`
134			`nop`
135			`nop`
136
137			`mov #0x0000, &RESLO`
138			`mov #0xC000, &RESHI`
139
140			`mov #0x7FFF, &MPY ; 0x7FFF * 0xFFFF = 0x7FFE_8001, ext=0x0000`
141			`mov #0xFFFF, &OP2`
142
143			`mov &RESLO, R10`
144			`mov &RESHI, R11`
145			`mov &SUMEXT, R12`
146			`nop`
147			`mov #0x0006, R15`
148			`nop`
149			`nop`
150			`nop`
151			`nop`
152
153			`mov #0x0000, &RESLO`
154			`mov #0xC000, &RESHI`
155
156			`mov #0x8000, &MPY ; 0x8000 * 0x7FFF = 0x3FFF_8000, ext=0x0000`
157			`mov #0x7FFF, &OP2`
158
159			`mov &RESLO, R10`
160			`mov &RESHI, R11`
161			`mov &SUMEXT, R12`
162			`nop`
163			`mov #0x0007, R15`
164			`nop`
165			`nop`
166			`nop`
167			`nop`
168
169			`mov #0x0000, &RESLO`
170			`mov #0xC000, &RESHI`
171
172			`mov #0x8000, &MPY ; 0x8000 * 0xFFFF = 0x7FFF_8000, ext=0x0000`
173			`mov #0xFFFF, &OP2`
174
175			`mov &RESLO, R10`
176			`mov &RESHI, R11`
177			`mov &SUMEXT, R12`
178			`nop`
179			`mov #0x0008, R15`
180			`nop`
181			`nop`
182			`nop`
183			`nop`
184
185			`mov #0x0000, &RESLO`
186			`mov #0xC000, &RESHI`
187
188			`mov #0x8000, &MPY ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000`
189			`mov #0x8000, &OP2`
190
191			`mov &RESLO, R10`
192			`mov &RESHI, R11`
193			`mov &SUMEXT, R12`
194			`nop`
195			`mov #0x0009, R15`
196			`nop`
197			`nop`
198			`nop`
199			`nop`
200
201			`/* -------------- SIGNED MULTIPLICATION --------------- */`
202
203			`mov #0x0000, &RESLO`
204			`mov #0xC000, &RESHI`
205
206			`mov #0x3104, &MPYS ; 0x3104 * 0x8285 = 0xE7F9_7F14, ext=0xFFFF`
207			`mov #0x8285, &OP2 ; 12548 * -32123`
208
209			`mov &RESLO, R10`
210			`mov &RESHI, R11`
211			`mov &SUMEXT, R12`
212			`nop`
213			`mov #0x0001, R15`
214			`nop`
215			`nop`
216			`nop`
217			`nop`
218
219			`mov #0x0000, &RESLO`
220			`mov #0xC000, &RESHI`
221
222			`mov #0x0000, &MPYS ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000`
223			`mov #0x0000, &OP2`
224
225			`mov &RESLO, R10`
226			`mov &RESHI, R11`
227			`mov &SUMEXT, R12`
228			`nop`
229			`mov #0x0002, R15`
230			`nop`
231			`nop`
232			`nop`
233			`nop`
234
235			`mov #0x0000, &RESLO`
236			`mov #0xC000, &RESHI`
237
238			`mov #0x0001, &MPYS ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000`
239			`mov #0x0001, &OP2`
240
241			`mov &RESLO, R10`
242			`mov &RESHI, R11`
243			`mov &SUMEXT, R12`
244			`nop`
245			`mov #0x0003, R15`
246			`nop`
247			`nop`
248			`nop`
249			`nop`
250
251			`mov #0x0000, &RESLO`
252			`mov #0xC000, &RESHI`
253
254			`mov #0x7FFF, &MPYS ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000`
255			`mov #0x7FFF, &OP2`
256
257			`mov &RESLO, R10`
258			`mov &RESHI, R11`
259			`mov &SUMEXT, R12`
260			`nop`
261			`mov #0x0004, R15`
262			`nop`
263			`nop`
264			`nop`
265			`nop`
266
267			`mov #0x0000, &RESLO`
268			`mov #0xC000, &RESHI`
269
270			`mov #0xFFFF, &MPYS ; 0xFFFF * 0xFFFF = 0x0000_0001, ext=0x0000`
271			`mov #0xFFFF, &OP2`
272
273			`mov &RESLO, R10`
274			`mov &RESHI, R11`
275			`mov &SUMEXT, R12`
276			`nop`
277			`mov #0x0005, R15`
278			`nop`
279			`nop`
280			`nop`
281			`nop`
282
283			`mov #0x0000, &RESLO`
284			`mov #0xC000, &RESHI`
285
286			`mov #0x7FFF, &MPYS ; 0x7FFF * 0xFFFF = 0xFFFF_8001, ext=0xFFFF`
287			`mov #0xFFFF, &OP2`
288
289			`mov &RESLO, R10`
290			`mov &RESHI, R11`
291			`mov &SUMEXT, R12`
292			`nop`
293			`mov #0x0006, R15`
294			`nop`
295			`nop`
296			`nop`
297			`nop`
298
299			`mov #0x0000, &RESLO`
300			`mov #0xC000, &RESHI`
301
302			`mov #0x8000, &MPYS ; 0x8000 * 0x7FFF = 0xC000_8000, ext=0xFFFF`
303			`mov #0x7FFF, &OP2`
304
305			`mov &RESLO, R10`
306			`mov &RESHI, R11`
307			`mov &SUMEXT, R12`
308			`nop`
309			`mov #0x0007, R15`
310			`nop`
311			`nop`
312			`nop`
313			`nop`
314
315			`mov #0x0000, &RESLO`
316			`mov #0xC000, &RESHI`
317
318			`mov #0x8000, &MPYS ; 0x8000 * 0xFFFF = 0x0000_8000, ext=0x0000`
319			`mov #0xFFFF, &OP2`
320
321			`mov &RESLO, R10`
322			`mov &RESHI, R11`
323			`mov &SUMEXT, R12`
324			`nop`
325			`mov #0x0008, R15`
326			`nop`
327			`nop`
328			`nop`
329			`nop`
330
331			`mov #0x0000, &RESLO`
332			`mov #0xC000, &RESHI`
333
334			`mov #0x8000, &MPYS ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000`
335			`mov #0x8000, &OP2`
336
337			`mov &RESLO, R10`
338			`mov &RESHI, R11`
339			`mov &SUMEXT, R12`
340			`nop`
341			`mov #0x0009, R15`
342			`nop`
343			`nop`
344			`nop`
345			`nop`
346
347			`/* -------------- UNSIGNED MULTIPLY-ACCUMULATE --------------- */`
348
349			`mov #0x0000, &RESLO`
350			`mov #0xC000, &RESHI`
351
352			`mov #0x3104, &MAC ; 0xC000_0000 + (0x3104 * 0x0285) = 0x007B_7F14, ext=0x0000`
353			`mov #0x0285, &OP2`
354
355			`mov &RESLO, R10`
356			`mov &RESHI, R11`
357			`mov &SUMEXT, R12`
358			`nop`
359			`mov #0x0001, R15`
360			`nop`
361			`nop`
362			`nop`
363			`nop`
364
365			`mov #0x0000, &RESLO`
366			`mov #0xC000, &RESHI`
367
368			`mov #0x0000, &MAC ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0x0000`
369			`mov #0x0000, &OP2`
370
371			`mov &RESLO, R10`
372			`mov &RESHI, R11`
373			`mov &SUMEXT, R12`
374			`nop`
375			`mov #0x0002, R15`
376			`nop`
377			`nop`
378			`nop`
379			`nop`
380
381			`mov #0x0000, &RESLO`
382			`mov #0xC000, &RESHI`
383
384			`mov #0x0001, &MAC ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0x0000`
385			`mov #0x0001, &OP2`
386
387			`mov &RESLO, R10`
388			`mov &RESHI, R11`
389			`mov &SUMEXT, R12`
390			`nop`
391			`mov #0x0003, R15`
392			`nop`
393			`nop`
394			`nop`
395			`nop`
396
397			`mov #0x0000, &RESLO`
398			`mov #0xC000, &RESHI`
399
400			`mov #0x7FFF, &MAC ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0x0000`
401			`mov #0x7FFF, &OP2`
402
403			`mov &RESLO, R10`
404			`mov &RESHI, R11`
405			`mov &SUMEXT, R12`
406			`nop`
407			`mov #0x0004, R15`
408			`nop`
409			`nop`
410			`nop`
411			`nop`
412
413			`mov #0x0000, &RESLO`
414			`mov #0xC000, &RESHI`
415
416			`mov #0xFFFF, &MAC ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xBFFE_0001, ext=0x0001`
417			`mov #0xFFFF, &OP2`
418
419			`mov &RESLO, R10`
420			`mov &RESHI, R11`
421			`mov &SUMEXT, R12`
422			`nop`
423			`mov #0x0005, R15`
424			`nop`
425			`nop`
426			`nop`
427			`nop`
428
429			`mov #0x0000, &RESLO`
430			`mov #0xC000, &RESHI`
431
432			`mov #0x7FFF, &MAC ; 0xC000_0000 + (0x7FFF * 0xFFFF) = 0x3FFE_8001, ext=0x0001`
433			`mov #0xFFFF, &OP2`
434
435			`mov &RESLO, R10`
436			`mov &RESHI, R11`
437			`mov &SUMEXT, R12`
438			`nop`
439			`mov #0x0006, R15`
440			`nop`
441			`nop`
442			`nop`
443			`nop`
444
445			`mov #0x0000, &RESLO`
446			`mov #0xC000, &RESHI`
447
448			`mov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0xFFFF_8000, ext=0x0000`
449			`mov #0x7FFF, &OP2`
450
451			`mov &RESLO, R10`
452			`mov &RESHI, R11`
453			`mov &SUMEXT, R12`
454			`nop`
455			`mov #0x0007, R15`
456			`nop`
457			`nop`
458			`nop`
459			`nop`
460
461			`mov #0x0000, &RESLO`
462			`mov #0xC000, &RESHI`
463
464			`mov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0x3FFF_8000, ext=0x0001`
465			`mov #0xFFFF, &OP2`
466
467			`mov &RESLO, R10`
468			`mov &RESHI, R11`
469			`mov &SUMEXT, R12`
470			`nop`
471			`mov #0x0008, R15`
472			`nop`
473			`nop`
474			`nop`
475			`nop`
476
477			`mov #0x0000, &RESLO`
478			`mov #0xC000, &RESHI`
479
480			`mov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0001`
481			`mov #0x8000, &OP2`
482
483			`mov &RESLO, R10`
484			`mov &RESHI, R11`
485			`mov &SUMEXT, R12`
486			`nop`
487			`mov #0x0009, R15`
488			`nop`
489			`nop`
490			`nop`
491			`nop`
492
493
494			`/* -------------- SIGNED MULTIPLY-ACCUMULATE --------------- */`
495
496			`mov #0x0000, &RESLO`
497			`mov #0xC000, &RESHI`
498
499			`mov #0x3104, &MACS ; 0xC000_0000 + (0x3104 * 0x8285) = 0xA7F9_7F14, ext=0xFFFF`
500			`mov #0x8285, &OP2`
501
502			`mov &RESLO, R10`
503			`mov &RESHI, R11`
504			`mov &SUMEXT, R12`
505			`nop`
506			`mov #0x0001, R15`
507			`nop`
508			`nop`
509			`nop`
510			`nop`
511
512			`mov #0x0000, &RESLO`
513			`mov #0xC000, &RESHI`
514
515			`mov #0x0000, &MACS ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0xFFFF`
516			`mov #0x0000, &OP2`
517
518			`mov &RESLO, R10`
519			`mov &RESHI, R11`
520			`mov &SUMEXT, R12`
521			`nop`
522			`mov #0x0002, R15`
523			`nop`
524			`nop`
525			`nop`
526			`nop`
527
528			`mov #0x0000, &RESLO`
529			`mov #0xC000, &RESHI`
530
531			`mov #0x0001, &MACS ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0xFFFF`
532			`mov #0x0001, &OP2`
533
534			`mov &RESLO, R10`
535			`mov &RESHI, R11`
536			`mov &SUMEXT, R12`
537			`nop`
538			`mov #0x0003, R15`
539			`nop`
540			`nop`
541			`nop`
542			`nop`
543
544			`mov #0x0000, &RESLO`
545			`mov #0xC000, &RESHI`
546
547			`mov #0x7FFF, &MACS ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0xFFFF`
548			`mov #0x7FFF, &OP2`
549
550			`mov &RESLO, R10`
551			`mov &RESHI, R11`
552			`mov &SUMEXT, R12`
553			`nop`
554			`mov #0x0004, R15`
555			`nop`
556			`nop`
557			`nop`
558			`nop`
559
560			`mov #0x0000, &RESLO`
561			`mov #0xC000, &RESHI`
562
563			`mov #0xFFFF, &MACS ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xC000_0001, ext=0xFFFF`
564			`mov #0xFFFF, &OP2`
565
566			`mov &RESLO, R10`
567			`mov &RESHI, R11`
568			`mov &SUMEXT, R12`
569			`nop`
570			`mov #0x0005, R15`
571			`nop`
572			`nop`
573			`nop`
574			`nop`
575
576			`mov #0x0000, &RESLO`
577			`mov #0xC000, &RESHI`
578
579			`mov #0x7FFF, &MACS ; 0xC000_0000 + (0x7FFF * 0xFFFF = 0xBFFF_8001, ext=0xFFFF`
580			`mov #0xFFFF, &OP2`
581
582			`mov &RESLO, R10`
583			`mov &RESHI, R11`
584			`mov &SUMEXT, R12`
585			`nop`
586			`mov #0x0006, R15`
587			`nop`
588			`nop`
589			`nop`
590			`nop`
591
592			`mov #0x0000, &RESLO`
593			`mov #0xC000, &RESHI`
594
595			`mov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0x8000_8000, ext=0xFFFF`
596			`mov #0x7FFF, &OP2`
597
598			`mov &RESLO, R10`
599			`mov &RESHI, R11`
600			`mov &SUMEXT, R12`
601			`nop`
602			`mov #0x0007, R15`
603			`nop`
604			`nop`
605			`nop`
606			`nop`
607
608			`mov #0x0000, &RESLO`
609			`mov #0xC000, &RESHI`
610
611			`mov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0xC000_8000, ext=0xFFFF`
612			`mov #0xFFFF, &OP2`
613
614			`mov &RESLO, R10`
615			`mov &RESHI, R11`
616			`mov &SUMEXT, R12`
617			`nop`
618			`mov #0x0008, R15`
619			`nop`
620			`nop`
621			`nop`
622			`nop`
623
624			`mov #0x0000, &RESLO`
625			`mov #0xC000, &RESHI`
626
627			`mov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0000`
628			`mov #0x8000, &OP2`
629
630			`mov &RESLO, R10`
631			`mov &RESHI, R11`
632			`mov &SUMEXT, R12`
633			`nop`
634			`mov #0x0009, R15`
635			`nop`
636			`nop`
637			`nop`
638			`nop`
639
640
641
642			`/* ---------------------- END OF TEST --------------- */`
643			`end_of_test:`
644			`nop`
645			`br #0xffff`
646
647
648
649
650			`/* ---------------------- INTERRUPT VECTORS --------------- */`
651
652			`.section .vectors, "a"`
653			`.word end_of_test ; Interrupt 0 (lowest priority)`
654			`.word end_of_test ; Interrupt 1`
655			`.word end_of_test ; Interrupt 2`
656			`.word end_of_test ; Interrupt 3`
657			`.word end_of_test ; Interrupt 4`
658			`.word end_of_test ; Interrupt 5`
659			`.word end_of_test ; Interrupt 6`
660			`.word end_of_test ; Interrupt 7`
661			`.word end_of_test ; Interrupt 8`
662			`.word end_of_test ; Interrupt 9`
663			`.word end_of_test ; Interrupt 10 Watchdog timer`
664			`.word end_of_test ; Interrupt 11`
665			`.word end_of_test ; Interrupt 12`
666			`.word end_of_test ; Interrupt 13`
667			`.word end_of_test ; Interrupt 14 NMI`
668			`.word main ; Interrupt 15 (highest priority) RESET`