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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes.s43] - Blame information for rev 202

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                  CPU OPERATING MODES (FPGA VERSION)                       */
/*---------------------------------------------------------------------------*/
/* Test the CPU Operating modes:                                             */
/*                                 - CPUOFF (<=> R2[4]): turn off CPU.       */
/*                                 - OSCOFF (<=> R2[5]): turn off LFXT_CLK.  */
/*                                 - SCG1   (<=> R2[7]): turn off SMCLK.     */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 202 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2015-07-01 23:13:32 +0200 (Wed, 01 Jul 2015) $          */
/*===========================================================================*/
 
.include "pmem_defs.asm"
 
.global main
 
WAIT_FUNC:
        dec r14
        jnz WAIT_FUNC
        ret
 
main:
        ; Enable GPIO interrupts on P1[0]
        mov.b #0x00, &P1DIR
        mov.b #0x00, &P1IFG
        mov.b #0x00, &P1IES
        mov.b #0x01, &P1IE
 
        ; Initialize stack and enable global interrupts
        mov   #DMEM_250, r1
        eint
 
        mov     #0x1000, r15
 
 
        /* -------------- SCG1   (<=> R2[7]): turn off SMCLK --------------- */
 
        mov.b  #0x06, &BCSCTL2  ; # Div /8
 
        mov    #0x0008, r2      ; # SCG1=0 (SMCLK on)
        mov    #0x1001, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x1002, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x1003, r15     ; # SCG1=1 (SMCLK off) with IRQ
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x1004, r15     ; # SCG1=1 (SMCLK off) return from IRQ
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x0008, r2      ; # SCG1=0 (SMCLK on)
        mov    #0x1005, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov     #0x2000, r15
 
 
        /* -------------- OSCOFF (<=> R2[5]): turn off LFXT1CLK --------------- */
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1 --> select DCOCLK
        mov    #0x0008, r2      ; # OSCOFF=0 (LFXT1 on)
        mov    #0x2001, r15
        mov    #0x0050, r14
        call   #WAIT_FUNC
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1 --> SMCLK select DCOCLK
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x2002, r15
        mov    #0x0050, r14
        call   #WAIT_FUNC
 
        mov    #0x2003, r15     ; # OSCOFF=1 (LFXT1 off) with IRQ
        mov    #0x0050, r14
        call   #WAIT_FUNC
 
        mov    #0x2004, r15     ; # OSCOFF=1 (LFXT1 off) return from IRQ
        mov    #0x0050, r14
        call   #WAIT_FUNC
 
        mov.b  #0x08, &BCSCTL2  ; # Div /1 --> SMCLK select LFXT1CLK
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x2005, r15
        mov    #0x0050, r14
        call   #WAIT_FUNC
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1 --> SMCLK select DCOCLK
        mov    #0x0008, r2      ; # OSCOFF=0 (LFXT1 on)
        mov    #0x2006, r15
        mov    #0x0050, r14
        call   #WAIT_FUNC
 
        mov     #0x3000, r15
 
 
        /* -------------- CPUOFF (<=> R2[4]): turn off CPU    --------------- */
 
        ; Enable GPIO interrupts on P2[0]
        mov.b #0x00, &P2DIR
        mov.b #0x00, &P2IFG
        mov.b #0x00, &P2IES
        mov.b #0x01, &P2IE
 
        mov.b  #0x00, &BCSCTL2  ; # Div /1 --> select DCOCLK
 
        mov    #0x3001, r15
        mov    #0x0008, r2      ; # CPUOFF=0 (CPU on)
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x3002, r15
        mov    #0x0018, r2      ; # CPUOFF=1 (CPU off)
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x3003, r15
        mov    #0x0008, r2      ; # CPUOFF=0 (CPU on)
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov     #0x4000, r15
 
 
        /* -------------- DMA_SCG1 --------------------------------------------- */
 
        mov.b  #0x06, &BCSCTL2  ; # Div /8
 
        mov.b  #0x00, &BCSCTL1  ; # DMA_OSCOFF=0 / DMA_SCG1=0
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x4001, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x02, &BCSCTL1  ; # DMA_OSCOFF=1 / DMA_SCG1=0
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x4002, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x08, &BCSCTL1  ; # DMA_OSCOFF=0 / DMA_SCG1=1
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x4003, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x0A, &BCSCTL1  ; # DMA_OSCOFF=1 / DMA_SCG1=1
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x4004, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x00, &BCSCTL1  ; # DMA_OSCOFF=0 / DMA_SCG1=0
        mov    #0x0088, r2      ; # SCG1=1 (SMCLK off)
        mov    #0x4005, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x0008, r2      ; # SCG1=0 (SMCLK on)
        mov    #0x4006, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x5000, r15
 
        /* -------------- DMA_OSCOFF --------------------------------------------------- */
 
        mov.b  #0x06, &BCSCTL2  ; # Div /8
 
        mov.b  #0x00, &BCSCTL1  ; # DMA_OSCOFF=0 / DMA_SCG1=0
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x5001, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x02, &BCSCTL1  ; # DMA_OSCOFF=1 / DMA_SCG1=0
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x5002, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x08, &BCSCTL1  ; # DMA_OSCOFF=0 / DMA_SCG1=1
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x5003, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x0A, &BCSCTL1  ; # DMA_OSCOFF=1 / DMA_SCG1=1
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x5004, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov.b  #0x00, &BCSCTL1  ; # DMA_OSCOFF=0 / DMA_SCG1=0
        mov    #0x0028, r2      ; # OSCOFF=1 (LFXT1 off)
        mov    #0x5005, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x0008, r2      ; # OSCOFF=1 (LFXT1 on)
        mov    #0x5006, r15
        mov    #0x0020, r14
        call   #WAIT_FUNC
 
        mov    #0x6000, r15
 
 
 
        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff
 
 
        /* ----------------------      INTERRUPT ROUTINES    --------------- */
 
PORT1_VECTOR:
        push       r14
        mov    #0x0050, r14
        call   #WAIT_FUNC
        pop        r14
        mov.b #0x00, &P1IFG
        reti
 
PORT2_VECTOR:
        push       r14
        mov    #0x0050, r14
        call   #WAIT_FUNC
        pop        r14
        mov.b #0x00, &P2IFG
        bic    #0x10, 0(r1) ;exit lowpower mode
        reti
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    
.word end_of_test  ; Interrupt  1                      
.word PORT1_VECTOR ; Interrupt  2                      
.word PORT2_VECTOR ; Interrupt  3                      
.word end_of_test  ; Interrupt  4                      
.word end_of_test  ; Interrupt  5                      
.word end_of_test  ; Interrupt  6                      
.word end_of_test  ; Interrupt  7                      
.word end_of_test  ; Interrupt  8                      
.word end_of_test  ; Interrupt  9                      
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      
.word end_of_test  ; Interrupt 12                      
.word end_of_test  ; Interrupt 13                      
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes.s43] - Blame information for rev 202

Line No.	Rev	Author	Line
1	2	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24	202	olivier.gi	`/* CPU OPERATING MODES (FPGA VERSION) */`
25	2	olivier.gi	`/---------------------------------------------------------------------------/`
26			`/* Test the CPU Operating modes: */`
27			`/* - CPUOFF (<=> R2[4]): turn off CPU. */`
28			`/* - OSCOFF (<=> R2[5]): turn off LFXT_CLK. */`
29			`/* - SCG1 (<=> R2[7]): turn off SMCLK. */`
30	18	olivier.gi	`/* */`
31			`/* Author(s): */`
32			`/* - Olivier Girard, olgirard@gmail.com */`
33			`/* */`
34			`/---------------------------------------------------------------------------/`
35	19	olivier.gi	`/* $Rev: 202 $ */`
36			`/* $LastChangedBy: olivier.girard $ */`
37			`/* $LastChangedDate: 2015-07-01 23:13:32 +0200 (Wed, 01 Jul 2015) $ */`
38	2	olivier.gi	`/===========================================================================/`
39
40	141	olivier.gi	`.include "pmem_defs.asm"`
41
42	2	olivier.gi	`.global main`
43
44			`WAIT_FUNC:`
45			`dec r14`
46			`jnz WAIT_FUNC`
47			`ret`
48
49			`main:`
50			`; Enable GPIO interrupts on P1[0]`
51			`mov.b #0x00, &P1DIR`
52			`mov.b #0x00, &P1IFG`
53			`mov.b #0x00, &P1IES`
54			`mov.b #0x01, &P1IE`
55
56			`; Initialize stack and enable global interrupts`
57	111	olivier.gi	`mov #DMEM_250, r1`
58	2	olivier.gi	`eint`
59
60	111	olivier.gi	`mov #0x1000, r15`
61	2	olivier.gi
62
63			`/* -------------- SCG1 (<=> R2[7]): turn off SMCLK --------------- */`
64
65			`mov.b #0x06, &BCSCTL2 ; # Div /8`
66
67			`mov #0x0008, r2 ; # SCG1=0 (SMCLK on)`
68			`mov #0x1001, r15`
69			`mov #0x0020, r14`
70			`call #WAIT_FUNC`
71
72			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
73			`mov #0x1002, r15`
74			`mov #0x0020, r14`
75			`call #WAIT_FUNC`
76
77	202	olivier.gi	`mov #0x1003, r15 ; # SCG1=1 (SMCLK off) with IRQ`
78	2	olivier.gi	`mov #0x0020, r14`
79			`call #WAIT_FUNC`
80
81	202	olivier.gi	`mov #0x1004, r15 ; # SCG1=1 (SMCLK off) return from IRQ`
82	2	olivier.gi	`mov #0x0020, r14`
83			`call #WAIT_FUNC`
84
85			`mov #0x0008, r2 ; # SCG1=0 (SMCLK on)`
86			`mov #0x1005, r15`
87			`mov #0x0020, r14`
88			`call #WAIT_FUNC`
89
90			`mov #0x2000, r15`
91
92
93			`/* -------------- OSCOFF (<=> R2[5]): turn off LFXT1CLK --------------- */`
94
95			`mov.b #0x00, &BCSCTL2 ; # Div /1 --> select DCOCLK`
96			`mov #0x0008, r2 ; # OSCOFF=0 (LFXT1 on)`
97			`mov #0x2001, r15`
98			`mov #0x0050, r14`
99			`call #WAIT_FUNC`
100
101	202	olivier.gi	`mov.b #0x00, &BCSCTL2 ; # Div /1 --> SMCLK select DCOCLK`
102	2	olivier.gi	`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
103			`mov #0x2002, r15`
104			`mov #0x0050, r14`
105			`call #WAIT_FUNC`
106
107	202	olivier.gi	`mov #0x2003, r15 ; # OSCOFF=1 (LFXT1 off) with IRQ`
108	2	olivier.gi	`mov #0x0050, r14`
109			`call #WAIT_FUNC`
110
111	202	olivier.gi	`mov #0x2004, r15 ; # OSCOFF=1 (LFXT1 off) return from IRQ`
112	2	olivier.gi	`mov #0x0050, r14`
113			`call #WAIT_FUNC`
114
115	202	olivier.gi	`mov.b #0x08, &BCSCTL2 ; # Div /1 --> SMCLK select LFXT1CLK`
116	2	olivier.gi	`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
117			`mov #0x2005, r15`
118			`mov #0x0050, r14`
119			`call #WAIT_FUNC`
120
121	202	olivier.gi	`mov.b #0x00, &BCSCTL2 ; # Div /1 --> SMCLK select DCOCLK`
122	2	olivier.gi	`mov #0x0008, r2 ; # OSCOFF=0 (LFXT1 on)`
123			`mov #0x2006, r15`
124			`mov #0x0050, r14`
125			`call #WAIT_FUNC`
126
127			`mov #0x3000, r15`
128
129
130			`/* -------------- CPUOFF (<=> R2[4]): turn off CPU --------------- */`
131
132			`; Enable GPIO interrupts on P2[0]`
133			`mov.b #0x00, &P2DIR`
134			`mov.b #0x00, &P2IFG`
135			`mov.b #0x00, &P2IES`
136			`mov.b #0x01, &P2IE`
137
138			`mov.b #0x00, &BCSCTL2 ; # Div /1 --> select DCOCLK`
139
140			`mov #0x3001, r15`
141			`mov #0x0008, r2 ; # CPUOFF=0 (CPU on)`
142			`mov #0x0020, r14`
143			`call #WAIT_FUNC`
144
145			`mov #0x3002, r15`
146			`mov #0x0018, r2 ; # CPUOFF=1 (CPU off)`
147			`mov #0x0020, r14`
148			`call #WAIT_FUNC`
149
150			`mov #0x3003, r15`
151			`mov #0x0008, r2 ; # CPUOFF=0 (CPU on)`
152			`mov #0x0020, r14`
153			`call #WAIT_FUNC`
154
155	202	olivier.gi	`mov #0x4000, r15`
156	2	olivier.gi
157	202	olivier.gi
158			`/* -------------- DMA_SCG1 --------------------------------------------- */`
159
160			`mov.b #0x06, &BCSCTL2 ; # Div /8`
161
162			`mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0`
163			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
164			`mov #0x4001, r15`
165			`mov #0x0020, r14`
166			`call #WAIT_FUNC`
167
168			`mov.b #0x02, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=0`
169			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
170			`mov #0x4002, r15`
171			`mov #0x0020, r14`
172			`call #WAIT_FUNC`
173
174			`mov.b #0x08, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=1`
175			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
176			`mov #0x4003, r15`
177			`mov #0x0020, r14`
178			`call #WAIT_FUNC`
179
180			`mov.b #0x0A, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=1`
181			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
182			`mov #0x4004, r15`
183			`mov #0x0020, r14`
184			`call #WAIT_FUNC`
185
186			`mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0`
187			`mov #0x0088, r2 ; # SCG1=1 (SMCLK off)`
188			`mov #0x4005, r15`
189			`mov #0x0020, r14`
190			`call #WAIT_FUNC`
191
192			`mov #0x0008, r2 ; # SCG1=0 (SMCLK on)`
193			`mov #0x4006, r15`
194			`mov #0x0020, r14`
195			`call #WAIT_FUNC`
196
197			`mov #0x5000, r15`
198
199			`/* -------------- DMA_OSCOFF --------------------------------------------------- */`
200
201			`mov.b #0x06, &BCSCTL2 ; # Div /8`
202
203			`mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0`
204			`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
205			`mov #0x5001, r15`
206			`mov #0x0020, r14`
207			`call #WAIT_FUNC`
208
209			`mov.b #0x02, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=0`
210			`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
211			`mov #0x5002, r15`
212			`mov #0x0020, r14`
213			`call #WAIT_FUNC`
214
215			`mov.b #0x08, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=1`
216			`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
217			`mov #0x5003, r15`
218			`mov #0x0020, r14`
219			`call #WAIT_FUNC`
220
221			`mov.b #0x0A, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=1`
222			`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
223			`mov #0x5004, r15`
224			`mov #0x0020, r14`
225			`call #WAIT_FUNC`
226
227			`mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0`
228			`mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)`
229			`mov #0x5005, r15`
230			`mov #0x0020, r14`
231			`call #WAIT_FUNC`
232
233			`mov #0x0008, r2 ; # OSCOFF=1 (LFXT1 on)`
234			`mov #0x5006, r15`
235			`mov #0x0020, r14`
236			`call #WAIT_FUNC`
237
238			`mov #0x6000, r15`
239
240
241	2	olivier.gi
242			`/* ---------------------- END OF TEST --------------- */`
243			`end_of_test:`
244			`nop`
245			`br #0xffff`
246
247
248			`/* ---------------------- INTERRUPT ROUTINES --------------- */`
249
250			`PORT1_VECTOR:`
251			`push r14`
252			`mov #0x0050, r14`
253			`call #WAIT_FUNC`
254			`pop r14`
255			`mov.b #0x00, &P1IFG`
256			`reti`
257
258			`PORT2_VECTOR:`
259			`push r14`
260			`mov #0x0050, r14`
261			`call #WAIT_FUNC`
262			`pop r14`
263			`mov.b #0x00, &P2IFG`
264			`bic #0x10, 0(r1) ;exit lowpower mode`
265			`reti`
266
267
268			`/* ---------------------- INTERRUPT VECTORS --------------- */`
269
270			`.section .vectors, "a"`
271			`.word end_of_test ; Interrupt 0 (lowest priority)`
272			`.word end_of_test ; Interrupt 1`
273			`.word PORT1_VECTOR ; Interrupt 2`
274			`.word PORT2_VECTOR ; Interrupt 3`
275			`.word end_of_test ; Interrupt 4`
276			`.word end_of_test ; Interrupt 5`
277			`.word end_of_test ; Interrupt 6`
278			`.word end_of_test ; Interrupt 7`
279			`.word end_of_test ; Interrupt 8`
280			`.word end_of_test ; Interrupt 9`
281			`.word end_of_test ; Interrupt 10 Watchdog timer`
282			`.word end_of_test ; Interrupt 11`
283			`.word end_of_test ; Interrupt 12`
284			`.word end_of_test ; Interrupt 13`
285			`.word end_of_test ; Interrupt 14 NMI`
286			`.word main ; Interrupt 15 (highest priority) RESET`