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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes_asic.v] - Blame information for rev 202

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                            CPU OPERATING MODES                            */
/*---------------------------------------------------------------------------*/
/* Test the CPU Operating modes:                                             */
/*                                 - CPUOFF (<=> R2[4]): turn off CPU.       */
/*                                 - OSCOFF (<=> R2[5]): turn off LFXT_CLK.  */
/*                                 - SCG0   (<=> R2[6]): turn off DCO.       */
/*                                 - SCG1   (<=> R2[7]): turn off SMCLK.     */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 95 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $          */
/*===========================================================================*/
 
integer dco_clk_cnt;
always @(negedge dco_clk)
  dco_clk_cnt <= dco_clk_cnt+1;
 
integer mclk_cnt;
always @(negedge mclk)
  mclk_cnt <= mclk_cnt+1;
 
integer smclk_cnt;
always @(negedge smclk)
  smclk_cnt <= smclk_cnt+1;
 
integer aclk_cnt;
always @(negedge aclk)
  aclk_cnt <= aclk_cnt+1;
 
integer inst_cnt;
always @(inst_number)
  inst_cnt = inst_cnt+1;
 
// Wakeup synchronizer to generate IRQ
reg [1:0] wkup2_sync;
always @(posedge mclk or posedge puc_rst)
  if (puc_rst) wkup2_sync <= 2'b00;
  else         wkup2_sync <= {wkup2_sync[0], wkup[2]};
 
always @(wkup2_sync)
  irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
 
// Wakeup synchronizer to generate IRQ
reg [1:0] wkup3_sync;
always @(posedge mclk or posedge puc_rst)
  if (puc_rst) wkup3_sync <= 2'b00;
  else         wkup3_sync <= {wkup3_sync[0], wkup[3]};
 
always @(wkup3_sync)
  irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
 
 
initial
   begin
      $display(" ===============================================");
      $display("|                 START SIMULATION              |");
      $display(" ===============================================");
      repeat(5) @(posedge mclk);
      stimulus_done = 0;
 
      irq[`IRQ_NR-14]  = 0; // IRQ-2
      wkup[2] = 0;
 
      irq[`IRQ_NR-13]  = 0; // IRQ-3
      wkup[3] = 0;
 
 
`ifdef ASIC_CLOCKING
 
      // SCG1   (<=> R2[7]): turn off SMCLK
      //--------------------------------------------------------
 
      @(r15==16'h1001);
      repeat (10)  @(posedge mclk);
      smclk_cnt = 0;
      repeat (100) @(posedge mclk);
      if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 1: SMCLK IS NOT RUNNING =====");
      smclk_cnt = 0;
 
      @(r15==16'h1002);
      repeat (10)  @(posedge mclk);
      smclk_cnt = 0;
      repeat (100) @(posedge mclk);
`ifdef SCG1_EN
      if (smclk_cnt !== 0)   tb_error("====== SCG1 TEST 2: SMCLK IS NOT STOPPED =====");
`else
      if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 2: SMCLK IS STOPPED =====");
`endif
      smclk_cnt = 0;
 
 
      @(r15==16'h1003);                //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
      wkup[3] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
      aclk_cnt = 0;
      repeat (10) @(posedge mclk);
      smclk_cnt = 0;
      repeat (50) @(posedge mclk);
      if (smclk_cnt !== 50)  tb_error("====== SCG1 TEST 3: SMCLK IS NOT RUNNING DURING IRQ =====");
      smclk_cnt = 0;
      @(r13==16'hbbbb);
      wkup[3] = 1'b0;
 
      @(r15==16'h1004);
      smclk_cnt = 0;
      repeat (50) @(posedge mclk);
      if (smclk_cnt !== 50)  tb_error("====== SCG1 TEST 4: SMCLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
      smclk_cnt = 0;
 
 
      @(r15==16'h1005);
      repeat (10)  @(posedge mclk);
      smclk_cnt = 0;
      repeat (100) @(posedge mclk);
`ifdef SCG1_EN
      if (smclk_cnt !== 0)   tb_error("====== SCG1 TEST 5: SMCLK IS NOT STOPPED =====");
`else
      if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 5: SMCLK IS STOPPED =====");
`endif
      smclk_cnt = 0;
 
 
      @(r15==16'h1006);                //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
      wkup[2] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
      repeat (10) @(posedge mclk);
      smclk_cnt = 0;
      repeat (50) @(posedge mclk);
      if (smclk_cnt !== 50)  tb_error("====== SCG1 TEST 6: SMCLK IS NOT RUNNING DURING IRQ =====");
      smclk_cnt = 0;
      @(r13==16'haaaa);
      wkup[2] = 1'b0;
 
      @(r15==16'h1007);
      repeat (10)  @(posedge mclk);
      smclk_cnt = 0;
      repeat (50) @(posedge mclk);
`ifdef SCG1_EN
      if (smclk_cnt !== 0)   tb_error("====== SCG1 TEST 7: SMCLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");
`else
      if (smclk_cnt !== 50)  tb_error("====== SCG1 TEST 7: SMCLK IS STOPPED WHEN RETURNING FROM IRQ =====");
`endif
      smclk_cnt = 0;
 
 
      @(r15==16'h1008);
      repeat (10) @(posedge mclk);
      smclk_cnt = 0;
      repeat (50) @(posedge mclk);
      if (smclk_cnt !== 50)  tb_error("====== SCG1 TEST 8: SMCLK IS NOT RUNNING =====");
      smclk_cnt = 0;
 
 
      // OSCOFF  (<=> R2[5]): turn off LFXT1CLK
      //--------------------------------------------------------
 
      @(r15==16'h2001);
      repeat (10)  @(posedge mclk);
      aclk_cnt = 0;
      repeat (200) @(posedge mclk);
  `ifdef LFXT_DOMAIN
      if (aclk_cnt !== 7)   tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");
  `else
      if (aclk_cnt !== 200) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");
  `endif
      aclk_cnt = 0;
 
      @(r15==16'h2002);
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
`ifdef OSCOFF_EN
      if (aclk_cnt !== 0)   tb_error("====== OSCOFF TEST 2: ACLK IS NOT STOPPED =====");
`else
      if (aclk_cnt <   3)   tb_error("====== OSCOFF TEST 2: ACLK IS STOPPED =====");
`endif
      aclk_cnt = 0;
 
 
      @(r15==16'h2003);                //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
      wkup[3] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
  `ifdef LFXT_DOMAIN
      if (aclk_cnt !== 3)   tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
  `else
      if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
  `endif
      aclk_cnt = 0;
      @(r13==16'hbbbb);
      wkup[3] = 1'b0;
 
      @(r15==16'h2004);
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
  `ifdef LFXT_DOMAIN
      if (aclk_cnt <   3)   tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
  `else
      if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
    `endif
      aclk_cnt = 0;
 
 
      @(r15==16'h2005);
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
`ifdef OSCOFF_EN
      if (aclk_cnt !== 0)   tb_error("====== OSCOFF TEST 5: ACLK IS NOT STOPPED =====");
`else
      if (aclk_cnt <   3)   tb_error("====== OSCOFF TEST 5: ACLK IS STOPPED =====");
`endif
      aclk_cnt = 0;
 
 
      @(r15==16'h2006);                //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
      wkup[2] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
  `ifdef LFXT_DOMAIN
      if (aclk_cnt !== 3)   tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
  `else
      if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
  `endif
      aclk_cnt = 0;
      @(r13==16'haaaa);
      wkup[2] = 1'b0;
 
      @(r15==16'h2007);
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
`ifdef OSCOFF_EN
      if (aclk_cnt !== 0)   tb_error("====== OSCOFF TEST 7: ACLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");
`else
      if (aclk_cnt <   3)   tb_error("====== OSCOFF TEST 7: ACLK IS STOPPED WHEN RETURNING FROM IRQ =====");
`endif
      aclk_cnt = 0;
 
 
      @(r15==16'h2008);
      repeat (100) @(posedge mclk);
      aclk_cnt = 0;
      repeat (100) @(posedge mclk);
  `ifdef LFXT_DOMAIN
      if (aclk_cnt !== 3)   tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");
  `else
      if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");
  `endif
      aclk_cnt = 0;
 
 
      // CPUOFF  (<=> R2[4]): turn off CPU
      //--------------------------------------------------------
 
      @(r15==16'h3001);
      repeat (10) @(negedge dco_clk);
      mclk_cnt  = 0;
      repeat (80) @(negedge dco_clk);
      if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 1: CPU IS NOT RUNNING =====");
 
      @(r15==16'h3002);
      repeat (10) @(negedge dco_clk);
      mclk_cnt  = 0;
      repeat (80) @(negedge dco_clk);
      if (mclk_cnt !== 0)  tb_error("====== CPUOFF TEST 2: CPU IS NOT STOPPED =====");
 
      @(posedge dco_clk);                //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
      wkup[2] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
      repeat(10)  @(negedge dco_clk);
      mclk_cnt  = 0;
      repeat (80) @(negedge dco_clk);
      if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
      mclk_cnt = 0;
      @(r13==16'haaaa);
      wkup[2] = 1'b0;
 
      @(r1==(`PER_SIZE+16'h0050));
      repeat (10) @(negedge dco_clk);
      mclk_cnt  = 0;
      repeat (80) @(negedge dco_clk);
      if (mclk_cnt  !== 0) tb_error("====== CPUOFF TEST 4: CPU IS NOT STOPPED AFTER IRQ =====");
 
 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
      wkup[3] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
      repeat (10) @(posedge dco_clk);
      mclk_cnt = 0;
      repeat (80) @(posedge dco_clk);
      if (mclk_cnt !== 80)  tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ =====");
      mclk_cnt = 0;
      @(r13==16'hbbbb);
      wkup[3] = 1'b0;
 
      @(r1==(`PER_SIZE+16'h0050));
      repeat (10) @(negedge dco_clk);
      mclk_cnt  = 0;
      repeat (80) @(negedge dco_clk);
      if (mclk_cnt  !== 80) tb_error("====== CPUOFF TEST 6: CPU IS NOT RUNNING AFTER IRQ =====");
 
 
 
      @(r15==16'h3003);
      repeat (10) @(posedge dco_clk);
      mclk_cnt = 0;
      repeat (80) @(posedge dco_clk);
      if (mclk_cnt !== 80)  tb_error("====== CPUOFF TEST 7: CPU IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
      mclk_cnt = 0;
 
 
 
      // SCG0 (<=> R2[6]): turn off DCO oscillator
      //--------------------------------------------------------
 
      @(r15==16'h4001);
      #(10*50);
      dco_clk_cnt  = 0;
      #(80*50);
      if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 1: DCO IS NOT RUNNING =====");
 
      @(r15==16'h4002);
      #(10*50);
      dco_clk_cnt  = 0;
      #(80*50);
      if (dco_clk_cnt !== 0)  tb_error("====== SCG0 TEST 2: DCO IS NOT STOPPED =====");
 
 
      #(1*50);                           //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
      wkup[2] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
      #(10*50);
      dco_clk_cnt  = 0;
      #(80*50);
      if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 3: DCO IS NOT RUNNING DURING IRQ (PORT 1) =====");
      dco_clk_cnt = 0;
      @(r13==16'haaaa);
      wkup[2] = 1'b0;
 
      #(10*50);
      dco_clk_cnt  = 0;
      #(80*50);
      if (dco_clk_cnt  !== 0) tb_error("====== SCG0 TEST 4: DCO IS NOT STOPPED AFTER IRQ =====");
 
 
                                         //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
      wkup[3] = 1'b1;
      @(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
      #(10*50);
      dco_clk_cnt = 0;
      #(80*50);
      if (dco_clk_cnt !== 80)  tb_error("====== SCG0 TEST 5: DCO IS NOT RUNNING DURING IRQ =====");
      dco_clk_cnt = 0;
      @(r13==16'hbbbb);
      wkup[3] = 1'b0;
 
      #(10*50);
      dco_clk_cnt  = 0;
      #(80*50);
      if (dco_clk_cnt  !== 80) tb_error("====== SCG0 TEST 6: DCO IS NOT RUNNING AFTER IRQ =====");
 
 
 
      @(r15==16'h4003);
      #(10*50);
      dco_clk_cnt = 0;
      #(80*50);
      if (dco_clk_cnt !== 80)  tb_error("====== SCG0 TEST 7: DCO IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");
      dco_clk_cnt = 0;
 
 
 
`else
      tb_skip_finish("|   (this test is not supported in FPGA mode)   |");
`endif
 
      stimulus_done = 1;
   end

Line No.	Rev	Author	Line
1	134	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* CPU OPERATING MODES */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the CPU Operating modes: */`
27			`/* - CPUOFF (<=> R2[4]): turn off CPU. */`
28			`/* - OSCOFF (<=> R2[5]): turn off LFXT_CLK. */`
29			`/* - SCG0 (<=> R2[6]): turn off DCO. */`
30			`/* - SCG1 (<=> R2[7]): turn off SMCLK. */`
31			`/* */`
32			`/* Author(s): */`
33			`/* - Olivier Girard, olgirard@gmail.com */`
34			`/* */`
35			`/---------------------------------------------------------------------------/`
36			`/* $Rev: 95 $ */`
37			`/* $LastChangedBy: olivier.girard $ */`
38			`/* $LastChangedDate: 2011-02-24 21:37:57 +0100 (Thu, 24 Feb 2011) $ */`
39			`/===========================================================================/`
40
41			`integer dco_clk_cnt;`
42			`always @(negedge dco_clk)`
43			`dco_clk_cnt <= dco_clk_cnt+1;`
44
45			`integer mclk_cnt;`
46			`always @(negedge mclk)`
47			`mclk_cnt <= mclk_cnt+1;`
48
49			`integer smclk_cnt;`
50			`always @(negedge smclk)`
51			`smclk_cnt <= smclk_cnt+1;`
52
53			`integer aclk_cnt;`
54			`always @(negedge aclk)`
55			`aclk_cnt <= aclk_cnt+1;`
56
57			`integer inst_cnt;`
58			`always @(inst_number)`
59			`inst_cnt = inst_cnt+1;`
60
61			`// Wakeup synchronizer to generate IRQ`
62			`reg [1:0] wkup2_sync;`
63			`always @(posedge mclk or posedge puc_rst)`
64			`if (puc_rst) wkup2_sync <= 2'b00;`
65			`else wkup2_sync <= {wkup2_sync[0], wkup[2]};`
66
67			`always @(wkup2_sync)`
68	200	olivier.gi	irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
69	202	olivier.gi
70	134	olivier.gi	`// Wakeup synchronizer to generate IRQ`
71			`reg [1:0] wkup3_sync;`
72			`always @(posedge mclk or posedge puc_rst)`
73			`if (puc_rst) wkup3_sync <= 2'b00;`
74			`else wkup3_sync <= {wkup3_sync[0], wkup[3]};`
75
76			`always @(wkup3_sync)`
77	200	olivier.gi	irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
78	134	olivier.gi
79	202	olivier.gi
80	134	olivier.gi	`initial`
81			`begin`
82			`$display(" ===============================================");`
83			`$display("\| START SIMULATION \|");`
84			`$display(" ===============================================");`
85			`repeat(5) @(posedge mclk);`
86			`stimulus_done = 0;`
87
88	200	olivier.gi	irq[`IRQ_NR-14] = 0; // IRQ-2
89	134	olivier.gi	`wkup[2] = 0;`
90
91	200	olivier.gi	irq[`IRQ_NR-13] = 0; // IRQ-3
92	134	olivier.gi	`wkup[3] = 0;`
93
94
95	180	olivier.gi	`ifdef ASIC_CLOCKING
96	134	olivier.gi
97			`// SCG1 (<=> R2[7]): turn off SMCLK`
98			`//--------------------------------------------------------`
99
100			`@(r15==16'h1001);`
101			`repeat (10) @(posedge mclk);`
102			`smclk_cnt = 0;`
103			`repeat (100) @(posedge mclk);`
104			`if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 1: SMCLK IS NOT RUNNING =====");`
105			`smclk_cnt = 0;`
106
107			`@(r15==16'h1002);`
108			`repeat (10) @(posedge mclk);`
109			`smclk_cnt = 0;`
110			`repeat (100) @(posedge mclk);`
111			`ifdef SCG1_EN
112			`if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 2: SMCLK IS NOT STOPPED =====");`
113			`else
114			`if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 2: SMCLK IS STOPPED =====");`
115			`endif
116			`smclk_cnt = 0;`
117
118
119			`@(r15==16'h1003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//`
120			`wkup[3] = 1'b1;`
121	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
122	134	olivier.gi	`aclk_cnt = 0;`
123			`repeat (10) @(posedge mclk);`
124			`smclk_cnt = 0;`
125			`repeat (50) @(posedge mclk);`
126			`if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 3: SMCLK IS NOT RUNNING DURING IRQ =====");`
127			`smclk_cnt = 0;`
128			`@(r13==16'hbbbb);`
129			`wkup[3] = 1'b0;`
130
131			`@(r15==16'h1004);`
132			`smclk_cnt = 0;`
133			`repeat (50) @(posedge mclk);`
134			`if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 4: SMCLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");`
135			`smclk_cnt = 0;`
136
137
138			`@(r15==16'h1005);`
139			`repeat (10) @(posedge mclk);`
140			`smclk_cnt = 0;`
141			`repeat (100) @(posedge mclk);`
142			`ifdef SCG1_EN
143			`if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 5: SMCLK IS NOT STOPPED =====");`
144			`else
145			`if (smclk_cnt !== 100) tb_error("====== SCG1 TEST 5: SMCLK IS STOPPED =====");`
146			`endif
147			`smclk_cnt = 0;`
148
149	202	olivier.gi
150	134	olivier.gi	`@(r15==16'h1006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//`
151			`wkup[2] = 1'b1;`
152	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
153	134	olivier.gi	`repeat (10) @(posedge mclk);`
154			`smclk_cnt = 0;`
155			`repeat (50) @(posedge mclk);`
156			`if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 6: SMCLK IS NOT RUNNING DURING IRQ =====");`
157			`smclk_cnt = 0;`
158			`@(r13==16'haaaa);`
159			`wkup[2] = 1'b0;`
160
161			`@(r15==16'h1007);`
162			`repeat (10) @(posedge mclk);`
163			`smclk_cnt = 0;`
164			`repeat (50) @(posedge mclk);`
165			`ifdef SCG1_EN
166			`if (smclk_cnt !== 0) tb_error("====== SCG1 TEST 7: SMCLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");`
167			`else
168			`if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 7: SMCLK IS STOPPED WHEN RETURNING FROM IRQ =====");`
169			`endif
170			`smclk_cnt = 0;`
171
172
173			`@(r15==16'h1008);`
174			`repeat (10) @(posedge mclk);`
175			`smclk_cnt = 0;`
176			`repeat (50) @(posedge mclk);`
177			`if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 8: SMCLK IS NOT RUNNING =====");`
178			`smclk_cnt = 0;`
179
180	202	olivier.gi
181	134	olivier.gi	`// OSCOFF (<=> R2[5]): turn off LFXT1CLK`
182			`//--------------------------------------------------------`
183
184			`@(r15==16'h2001);`
185			`repeat (10) @(posedge mclk);`
186			`aclk_cnt = 0;`
187			`repeat (200) @(posedge mclk);`
188			`ifdef LFXT_DOMAIN
189			`if (aclk_cnt !== 7) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");`
190			`else
191			`if (aclk_cnt !== 200) tb_error("====== OSCOFF TEST 1: ACLK IS NOT RUNNING =====");`
192			`endif
193			`aclk_cnt = 0;`
194
195			`@(r15==16'h2002);`
196			`repeat (100) @(posedge mclk);`
197			`aclk_cnt = 0;`
198			`repeat (100) @(posedge mclk);`
199			`ifdef OSCOFF_EN
200			`if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 2: ACLK IS NOT STOPPED =====");`
201			`else
202			`if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 2: ACLK IS STOPPED =====");`
203			`endif
204			`aclk_cnt = 0;`
205
206
207			`@(r15==16'h2003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//`
208			`wkup[3] = 1'b1;`
209	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
210	134	olivier.gi	`repeat (100) @(posedge mclk);`
211			`aclk_cnt = 0;`
212			`repeat (100) @(posedge mclk);`
213			`ifdef LFXT_DOMAIN
214			`if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");`
215			`else
216			`if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");`
217			`endif
218			`aclk_cnt = 0;`
219			`@(r13==16'hbbbb);`
220			`wkup[3] = 1'b0;`
221
222			`@(r15==16'h2004);`
223			`repeat (100) @(posedge mclk);`
224			`aclk_cnt = 0;`
225			`repeat (100) @(posedge mclk);`
226			`ifdef LFXT_DOMAIN
227			`if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");`
228			`else
229			`if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 4: ACLK IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");`
230			`endif
231			`aclk_cnt = 0;`
232
233
234			`@(r15==16'h2005);`
235			`repeat (100) @(posedge mclk);`
236			`aclk_cnt = 0;`
237			`repeat (100) @(posedge mclk);`
238			`ifdef OSCOFF_EN
239			`if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 5: ACLK IS NOT STOPPED =====");`
240			`else
241			`if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 5: ACLK IS STOPPED =====");`
242			`endif
243			`aclk_cnt = 0;`
244
245	202	olivier.gi
246	134	olivier.gi	`@(r15==16'h2006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//`
247			`wkup[2] = 1'b1;`
248	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
249	134	olivier.gi	`repeat (100) @(posedge mclk);`
250			`aclk_cnt = 0;`
251			`repeat (100) @(posedge mclk);`
252			`ifdef LFXT_DOMAIN
253			`if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");`
254			`else
255			`if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");`
256			`endif
257			`aclk_cnt = 0;`
258			`@(r13==16'haaaa);`
259			`wkup[2] = 1'b0;`
260
261			`@(r15==16'h2007);`
262			`repeat (100) @(posedge mclk);`
263			`aclk_cnt = 0;`
264			`repeat (100) @(posedge mclk);`
265			`ifdef OSCOFF_EN
266			`if (aclk_cnt !== 0) tb_error("====== OSCOFF TEST 7: ACLK IS NOT STOPPED WHEN RETURNING FROM IRQ =====");`
267			`else
268			`if (aclk_cnt < 3) tb_error("====== OSCOFF TEST 7: ACLK IS STOPPED WHEN RETURNING FROM IRQ =====");`
269			`endif
270			`aclk_cnt = 0;`
271
272
273			`@(r15==16'h2008);`
274			`repeat (100) @(posedge mclk);`
275			`aclk_cnt = 0;`
276			`repeat (100) @(posedge mclk);`
277			`ifdef LFXT_DOMAIN
278			`if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");`
279			`else
280			`if (aclk_cnt !== 100) tb_error("====== OSCOFF TEST 8: ACLK IS NOT RUNNING =====");`
281			`endif
282			`aclk_cnt = 0;`
283
284	202	olivier.gi
285	134	olivier.gi	`// CPUOFF (<=> R2[4]): turn off CPU`
286			`//--------------------------------------------------------`
287
288			`@(r15==16'h3001);`
289			`repeat (10) @(negedge dco_clk);`
290			`mclk_cnt = 0;`
291			`repeat (80) @(negedge dco_clk);`
292			`if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 1: CPU IS NOT RUNNING =====");`
293
294			`@(r15==16'h3002);`
295			`repeat (10) @(negedge dco_clk);`
296			`mclk_cnt = 0;`
297			`repeat (80) @(negedge dco_clk);`
298			`if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 2: CPU IS NOT STOPPED =====");`
299
300			`@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//`
301			`wkup[2] = 1'b1;`
302	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
303	134	olivier.gi	`repeat(10) @(negedge dco_clk);`
304			`mclk_cnt = 0;`
305			`repeat (80) @(negedge dco_clk);`
306			`if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");`
307			`mclk_cnt = 0;`
308			`@(r13==16'haaaa);`
309			`wkup[2] = 1'b0;`
310	202	olivier.gi
311	134	olivier.gi	@(r1==(`PER_SIZE+16'h0050));
312			`repeat (10) @(negedge dco_clk);`
313			`mclk_cnt = 0;`
314			`repeat (80) @(negedge dco_clk);`
315			`if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 4: CPU IS NOT STOPPED AFTER IRQ =====");`
316
317
318			`//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//`
319			`wkup[3] = 1'b1;`
320	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
321	134	olivier.gi	`repeat (10) @(posedge dco_clk);`
322			`mclk_cnt = 0;`
323			`repeat (80) @(posedge dco_clk);`
324			`if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ =====");`
325			`mclk_cnt = 0;`
326			`@(r13==16'hbbbb);`
327			`wkup[3] = 1'b0;`
328
329			@(r1==(`PER_SIZE+16'h0050));
330			`repeat (10) @(negedge dco_clk);`
331			`mclk_cnt = 0;`
332			`repeat (80) @(negedge dco_clk);`
333			`if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 6: CPU IS NOT RUNNING AFTER IRQ =====");`
334
335
336
337			`@(r15==16'h3003);`
338			`repeat (10) @(posedge dco_clk);`
339			`mclk_cnt = 0;`
340			`repeat (80) @(posedge dco_clk);`
341			`if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 7: CPU IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");`
342			`mclk_cnt = 0;`
343
344
345
346			`// SCG0 (<=> R2[6]): turn off DCO oscillator`
347			`//--------------------------------------------------------`
348
349			`@(r15==16'h4001);`
350			`#(10*50);`
351			`dco_clk_cnt = 0;`
352			`#(80*50);`
353			`if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 1: DCO IS NOT RUNNING =====");`
354
355			`@(r15==16'h4002);`
356			`#(10*50);`
357			`dco_clk_cnt = 0;`
358			`#(80*50);`
359			`if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 2: DCO IS NOT STOPPED =====");`
360
361
362			`#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//`
363			`wkup[2] = 1'b1;`
364	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
365	134	olivier.gi	`#(10*50);`
366			`dco_clk_cnt = 0;`
367			`#(80*50);`
368			`if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 3: DCO IS NOT RUNNING DURING IRQ (PORT 1) =====");`
369			`dco_clk_cnt = 0;`
370			`@(r13==16'haaaa);`
371			`wkup[2] = 1'b0;`
372	202	olivier.gi
373	134	olivier.gi	`#(10*50);`
374			`dco_clk_cnt = 0;`
375			`#(80*50);`
376			`if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 4: DCO IS NOT STOPPED AFTER IRQ =====");`
377
378
379			`//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//`
380			`wkup[3] = 1'b1;`
381	200	olivier.gi	@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
382	134	olivier.gi	`#(10*50);`
383			`dco_clk_cnt = 0;`
384			`#(80*50);`
385			`if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 5: DCO IS NOT RUNNING DURING IRQ =====");`
386			`dco_clk_cnt = 0;`
387			`@(r13==16'hbbbb);`
388			`wkup[3] = 1'b0;`
389
390			`#(10*50);`
391			`dco_clk_cnt = 0;`
392			`#(80*50);`
393			`if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 6: DCO IS NOT RUNNING AFTER IRQ =====");`
394
395
396
397			`@(r15==16'h4003);`
398			`#(10*50);`
399			`dco_clk_cnt = 0;`
400			`#(80*50);`
401			`if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 7: DCO IS STILL NOT RUNNING WHEN RETURNING FROM IRQ =====");`
402			`dco_clk_cnt = 0;`
403
404
405
406			`else
407	202	olivier.gi	`tb_skip_finish("\| (this test is not supported in FPGA mode) \|");`
408			`endif
409	134	olivier.gi
410			`stimulus_done = 1;`
411			`end`

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes_asic.v] - Blame information for rev 202