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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_push.v] - Blame information for rev 2

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1 2 olivier.gi 
/*===========================================================================*/
2 
/* Copyright (C) 2001 Authors                                                */
3 
/*                                                                           */
4 
/* This source file may be used and distributed without restriction provided */
5 
/* that this copyright statement is not removed from the file and that any   */
6 
/* derivative work contains the original copyright notice and the associated */
7 
/* disclaimer.                                                               */
8 
/*                                                                           */
9 
/* This source file is free software; you can redistribute it and/or modify  */
10 
/* it under the terms of the GNU Lesser General Public License as published  */
11 
/* by the Free Software Foundation; either version 2.1 of the License, or    */
12 
/* (at your option) any later version.                                       */
13 
/*                                                                           */
14 
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
15 
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
16 
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
17 
/* License for more details.                                                 */
18 
/*                                                                           */
19 
/* You should have received a copy of the GNU Lesser General Public License  */
20 
/* along with this source; if not, write to the Free Software Foundation,    */
21 
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
22 
/*                                                                           */
23 
/*===========================================================================*/
24 
/*                 SINGLE-OPERAND ARITHMETIC: PUSH  INSTRUCTION              */
25 
/*---------------------------------------------------------------------------*/
26 
/* Test the PUSH instruction.                                                */
27 
/*===========================================================================*/
28 
 
29 
initial
30 
   begin
31 
      $display(" ===============================================");
32 
      $display("|                 START SIMULATION              |");
33 
      $display(" ===============================================");
34 
      repeat(5) @(posedge mclk);
35 
      stimulus_done = 0;
36 
 
37 
      /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */
38 
 
39 
      // Initialization
40 
      @(r15==16'h1000);
41 
      if (r1     !==16'h0252) tb_error("====== SP  initialization (R1 value)      =====");
42 
      if (mem250 !==16'h0000) tb_error("====== RAM Initialization (@0x0250 value) =====");
43 
      if (mem24E !==16'h0000) tb_error("====== RAM Initialization (@0x024e value) =====");
44 
      if (mem24C !==16'h0000) tb_error("====== RAM Initialization (@0x024c value) =====");
45 
      if (mem24A !==16'h0000) tb_error("====== RAM Initialization (@0x024a value) =====");
46 
      if (mem248 !==16'h0000) tb_error("====== RAM Initialization (@0x0248 value) =====");
47 
      if (mem246 !==16'h0000) tb_error("====== RAM Initialization (@0x0246 value) =====");
48 
      if (mem244 !==16'h0000) tb_error("====== RAM Initialization (@0x0244 value) =====");
49 
      if (mem242 !==16'h0000) tb_error("====== RAM Initialization (@0x0242 value) =====");
50 
      if (mem240 !==16'h0000) tb_error("====== RAM Initialization (@0x0240 value) =====");
51 
      if (mem23E !==16'h0000) tb_error("====== RAM Initialization (@0x023e value) =====");
52 
      if (mem23C !==16'h0000) tb_error("====== RAM Initialization (@0x023c value) =====");
53 
      if (mem23A !==16'h0000) tb_error("====== RAM Initialization (@0x023a value) =====");
54 
      if (mem238 !==16'h0000) tb_error("====== RAM Initialization (@0x0238 value) =====");
55 
      if (mem236 !==16'h0000) tb_error("====== RAM Initialization (@0x0236 value) =====");
56 
      if (mem234 !==16'h0000) tb_error("====== RAM Initialization (@0x0234 value) =====");
57 
      if (mem232 !==16'h0000) tb_error("====== RAM Initialization (@0x0232 value) =====");
58 
      if (mem230 !==16'h0000) tb_error("====== RAM Initialization (@0x0230 value) =====");
59 
 
60 
 
61 
      // Addressing mode: Rn
62 
      @(r15==16'h2000);
63 
      if (r1     !==16'h024E) tb_error("====== PUSH (Rn mode): SP value      =====");
64 
      if (mem250 !==16'h7524) tb_error("====== PUSH (Rn mode): @0x0250 value =====");
65 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (Rn mode): @0x024E value =====");
66 
      if (mem24C !==16'h0000) tb_error("====== PUSH (Rn mode): @0x024c value =====");
67 
      if (mem24A !==16'h0000) tb_error("====== PUSH (Rn mode): @0x024a value =====");
68 
      if (mem248 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0248 value =====");
69 
      if (mem246 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0246 value =====");
70 
      if (mem244 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0244 value =====");
71 
      if (mem242 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0242 value =====");
72 
      if (mem240 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0240 value =====");
73 
      if (mem23E !==16'h0000) tb_error("====== PUSH (Rn mode): @0x023e value =====");
74 
      if (mem23C !==16'h0000) tb_error("====== PUSH (Rn mode): @0x023c value =====");
75 
      if (mem23A !==16'h0000) tb_error("====== PUSH (Rn mode): @0x023a value =====");
76 
      if (mem238 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0238 value =====");
77 
      if (mem236 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0236 value =====");
78 
      if (mem234 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0234 value =====");
79 
      if (mem232 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0232 value =====");
80 
      if (mem230 !==16'h0000) tb_error("====== PUSH (Rn mode): @0x0230 value =====");
81 
 
82 
 
83 
      // Addressing mode: @Rn
84 
      @(r15==16'h3000);
85 
      if (r1     !==16'h024A) tb_error("====== PUSH (@Rn mode): SP value      =====");
86 
      if (mem250 !==16'h7524) tb_error("====== PUSH (@Rn mode): @0x0250 value =====");
87 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (@Rn mode): @0x024E value =====");
88 
      if (mem24C !==16'h1234) tb_error("====== PUSH (@Rn mode): @0x024c value =====");
89 
      if (mem24A !==16'h5678) tb_error("====== PUSH (@Rn mode): @0x024a value =====");
90 
      if (mem248 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0248 value =====");
91 
      if (mem246 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0246 value =====");
92 
      if (mem244 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0244 value =====");
93 
      if (mem242 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0242 value =====");
94 
      if (mem240 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0240 value =====");
95 
      if (mem23E !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023e value =====");
96 
      if (mem23C !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023c value =====");
97 
      if (mem23A !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x023a value =====");
98 
      if (mem238 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0238 value =====");
99 
      if (mem236 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0236 value =====");
100 
      if (mem234 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0234 value =====");
101 
      if (mem232 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0232 value =====");
102 
      if (mem230 !==16'h0000) tb_error("====== PUSH (@Rn mode): @0x0230 value =====");
103 
 
104 
 
105 
      // Addressing mode: @Rn+
106 
      @(r15==16'h4000);
107 
      if (r4     !==16'h021A) tb_error("====== PUSH (@Rn+ mode): R4 value      =====");
108 
      if (r1     !==16'h0246) tb_error("====== PUSH (@Rn+ mode): SP value      =====");
109 
      if (mem250 !==16'h7524) tb_error("====== PUSH (@Rn+ mode): @0x0250 value =====");
110 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (@Rn+ mode): @0x024E value =====");
111 
      if (mem24C !==16'h1234) tb_error("====== PUSH (@Rn+ mode): @0x024c value =====");
112 
      if (mem24A !==16'h5678) tb_error("====== PUSH (@Rn+ mode): @0x024a value =====");
113 
      if (mem248 !==16'h9abc) tb_error("====== PUSH (@Rn+ mode): @0x0248 value =====");
114 
      if (mem246 !==16'hdef0) tb_error("====== PUSH (@Rn+ mode): @0x0246 value =====");
115 
      if (mem244 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0244 value =====");
116 
      if (mem242 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0242 value =====");
117 
      if (mem240 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0240 value =====");
118 
      if (mem23E !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023e value =====");
119 
      if (mem23C !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023c value =====");
120 
      if (mem23A !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x023a value =====");
121 
      if (mem238 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0238 value =====");
122 
      if (mem236 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0236 value =====");
123 
      if (mem234 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0234 value =====");
124 
      if (mem232 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0232 value =====");
125 
      if (mem230 !==16'h0000) tb_error("====== PUSH (@Rn+ mode): @0x0230 value =====");
126 
 
127 
 
128 
      // Addressing mode: X(Rn)
129 
      @(r15==16'h5000);
130 
      if (r1     !==16'h0242) tb_error("====== PUSH (X(Rn) mode): SP value      =====");
131 
      if (mem250 !==16'h7524) tb_error("====== PUSH (X(Rn) mode): @0x0250 value =====");
132 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (X(Rn) mode): @0x024E value =====");
133 
      if (mem24C !==16'h1234) tb_error("====== PUSH (X(Rn) mode): @0x024c value =====");
134 
      if (mem24A !==16'h5678) tb_error("====== PUSH (X(Rn) mode): @0x024a value =====");
135 
      if (mem248 !==16'h9abc) tb_error("====== PUSH (X(Rn) mode): @0x0248 value =====");
136 
      if (mem246 !==16'hdef0) tb_error("====== PUSH (X(Rn) mode): @0x0246 value =====");
137 
      if (mem244 !==16'h0fed) tb_error("====== PUSH (X(Rn) mode): @0x0244 value =====");
138 
      if (mem242 !==16'hcba9) tb_error("====== PUSH (X(Rn) mode): @0x0242 value =====");
139 
      if (mem240 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0240 value =====");
140 
      if (mem23E !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023e value =====");
141 
      if (mem23C !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023c value =====");
142 
      if (mem23A !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x023a value =====");
143 
      if (mem238 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0238 value =====");
144 
      if (mem236 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0236 value =====");
145 
      if (mem234 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0234 value =====");
146 
      if (mem232 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0232 value =====");
147 
      if (mem230 !==16'h0000) tb_error("====== PUSH (X(Rn) mode): @0x0230 value =====");
148 
 
149 
 
150 
      // Addressing mode: EDE
151 
      @(r15==16'h6000);
152 
      if (r1     !==16'h023E) tb_error("====== PUSH (EDE mode): SP value      =====");
153 
      if (mem250 !==16'h7524) tb_error("====== PUSH (EDE mode): @0x0250 value =====");
154 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (EDE mode): @0x024E value =====");
155 
      if (mem24C !==16'h1234) tb_error("====== PUSH (EDE mode): @0x024c value =====");
156 
      if (mem24A !==16'h5678) tb_error("====== PUSH (EDE mode): @0x024a value =====");
157 
      if (mem248 !==16'h9abc) tb_error("====== PUSH (EDE mode): @0x0248 value =====");
158 
      if (mem246 !==16'hdef0) tb_error("====== PUSH (EDE mode): @0x0246 value =====");
159 
      if (mem244 !==16'h0fed) tb_error("====== PUSH (EDE mode): @0x0244 value =====");
160 
      if (mem242 !==16'hcba9) tb_error("====== PUSH (EDE mode): @0x0242 value =====");
161 
      if (mem240 !==16'h8765) tb_error("====== PUSH (EDE mode): @0x0240 value =====");
162 
      if (mem23E !==16'h4321) tb_error("====== PUSH (EDE mode): @0x023e value =====");
163 
      if (mem23C !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023c value =====");
164 
      if (mem23A !==16'h0000) tb_error("====== PUSH (EDE mode): @0x023a value =====");
165 
      if (mem238 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0238 value =====");
166 
      if (mem236 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0236 value =====");
167 
      if (mem234 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0234 value =====");
168 
      if (mem232 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0232 value =====");
169 
      if (mem230 !==16'h0000) tb_error("====== PUSH (EDE mode): @0x0230 value =====");
170 
 
171 
 
172 
      // Addressing mode: &EDE
173 
      @(r15==16'h7000);
174 
      if (r1     !==16'h023A) tb_error("====== PUSH (&EDE mode): SP value      =====");
175 
      if (mem250 !==16'h7524) tb_error("====== PUSH (&EDE mode): @0x0250 value =====");
176 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (&EDE mode): @0x024E value =====");
177 
      if (mem24C !==16'h1234) tb_error("====== PUSH (&EDE mode): @0x024c value =====");
178 
      if (mem24A !==16'h5678) tb_error("====== PUSH (&EDE mode): @0x024a value =====");
179 
      if (mem248 !==16'h9abc) tb_error("====== PUSH (&EDE mode): @0x0248 value =====");
180 
      if (mem246 !==16'hdef0) tb_error("====== PUSH (&EDE mode): @0x0246 value =====");
181 
      if (mem244 !==16'h0fed) tb_error("====== PUSH (&EDE mode): @0x0244 value =====");
182 
      if (mem242 !==16'hcba9) tb_error("====== PUSH (&EDE mode): @0x0242 value =====");
183 
      if (mem240 !==16'h8765) tb_error("====== PUSH (&EDE mode): @0x0240 value =====");
184 
      if (mem23E !==16'h4321) tb_error("====== PUSH (&EDE mode): @0x023e value =====");
185 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH (&EDE mode): @0x023c value =====");
186 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH (&EDE mode): @0x023a value =====");
187 
      if (mem238 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0238 value =====");
188 
      if (mem236 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0236 value =====");
189 
      if (mem234 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0234 value =====");
190 
      if (mem232 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0232 value =====");
191 
      if (mem230 !==16'h0000) tb_error("====== PUSH (&EDE mode): @0x0230 value =====");
192 
 
193 
 
194 
      // Addressing mode: #N
195 
      @(r15==16'h7001);
196 
      if (r1     !==16'h0236) tb_error("====== PUSH (#N mode): SP value      =====");
197 
      if (mem250 !==16'h7524) tb_error("====== PUSH (#N mode): @0x0250 value =====");
198 
      if (mem24E !==16'h1cb6) tb_error("====== PUSH (#N mode): @0x024E value =====");
199 
      if (mem24C !==16'h1234) tb_error("====== PUSH (#N mode): @0x024c value =====");
200 
      if (mem24A !==16'h5678) tb_error("====== PUSH (#N mode): @0x024a value =====");
201 
      if (mem248 !==16'h9abc) tb_error("====== PUSH (#N mode): @0x0248 value =====");
202 
      if (mem246 !==16'hdef0) tb_error("====== PUSH (#N mode): @0x0246 value =====");
203 
      if (mem244 !==16'h0fed) tb_error("====== PUSH (#N mode): @0x0244 value =====");
204 
      if (mem242 !==16'hcba9) tb_error("====== PUSH (#N mode): @0x0242 value =====");
205 
      if (mem240 !==16'h8765) tb_error("====== PUSH (#N mode): @0x0240 value =====");
206 
      if (mem23E !==16'h4321) tb_error("====== PUSH (#N mode): @0x023e value =====");
207 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH (#N mode): @0x023c value =====");
208 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH (#N mode): @0x023a value =====");
209 
      if (mem238 !==16'h71c8) tb_error("====== PUSH (#N mode): @0x0238 value =====");
210 
      if (mem236 !==16'h178c) tb_error("====== PUSH (#N mode): @0x0236 value =====");
211 
      if (mem234 !==16'h0000) tb_error("====== PUSH (#N mode): @0x0234 value =====");
212 
      if (mem232 !==16'h0000) tb_error("====== PUSH (#N mode): @0x0232 value =====");
213 
      if (mem230 !==16'h0000) tb_error("====== PUSH (#N mode): @0x0230 value =====");
214 
 
215 
 
216 
      /* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */
217 
 
218 
      // Initialization
219 
      @(r15==16'h8000);
220 
      if (r1     !==16'h0252) tb_error("====== SP  initialization (R1 value)      =====");
221 
      if (mem250 !==16'h7524) tb_error("====== RAM Initialization (@0x0250 value) =====");
222 
      if (mem24E !==16'h1cb6) tb_error("====== RAM Initialization (@0x024E value) =====");
223 
      if (mem24C !==16'h1234) tb_error("====== RAM Initialization (@0x024c value) =====");
224 
      if (mem24A !==16'h5678) tb_error("====== RAM Initialization (@0x024a value) =====");
225 
      if (mem248 !==16'h9abc) tb_error("====== RAM Initialization (@0x0248 value) =====");
226 
      if (mem246 !==16'hdef0) tb_error("====== RAM Initialization (@0x0246 value) =====");
227 
      if (mem244 !==16'h0fed) tb_error("====== RAM Initialization (@0x0244 value) =====");
228 
      if (mem242 !==16'hcba9) tb_error("====== RAM Initialization (@0x0242 value) =====");
229 
      if (mem240 !==16'h8765) tb_error("====== RAM Initialization (@0x0240 value) =====");
230 
      if (mem23E !==16'h4321) tb_error("====== RAM Initialization (@0x023e value) =====");
231 
      if (mem23C !==16'h1f2e) tb_error("====== RAM Initialization (@0x023c value) =====");
232 
      if (mem23A !==16'h3d4c) tb_error("====== RAM Initialization (@0x023a value) =====");
233 
      if (mem238 !==16'h71c8) tb_error("====== RAM Initialization (@0x0238 value) =====");
234 
      if (mem236 !==16'h178c) tb_error("====== RAM Initialization (@0x0236 value) =====");
235 
      if (mem234 !==16'h0000) tb_error("====== RAM Initialization (@0x0234 value) =====");
236 
      if (mem232 !==16'h0000) tb_error("====== RAM Initialization (@0x0232 value) =====");
237 
      if (mem230 !==16'h0000) tb_error("====== RAM Initialization (@0x0230 value) =====");
238 
 
239 
 
240 
      // Addressing mode: Rn
241 
      @(r15==16'h9000);
242 
      if (r1     !==16'h024E) tb_error("====== PUSH.B (Rn mode): SP value      =====");
243 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (Rn mode): @0x0250 value =====");
244 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (Rn mode): @0x024E value =====");
245 
      if (mem24C !==16'h1234) tb_error("====== PUSH.B (Rn mode): @0x024c value =====");
246 
      if (mem24A !==16'h5678) tb_error("====== PUSH.B (Rn mode): @0x024a value =====");
247 
      if (mem248 !==16'h9abc) tb_error("====== PUSH.B (Rn mode): @0x0248 value =====");
248 
      if (mem246 !==16'hdef0) tb_error("====== PUSH.B (Rn mode): @0x0246 value =====");
249 
      if (mem244 !==16'h0fed) tb_error("====== PUSH.B (Rn mode): @0x0244 value =====");
250 
      if (mem242 !==16'hcba9) tb_error("====== PUSH.B (Rn mode): @0x0242 value =====");
251 
      if (mem240 !==16'h8765) tb_error("====== PUSH.B (Rn mode): @0x0240 value =====");
252 
      if (mem23E !==16'h4321) tb_error("====== PUSH.B (Rn mode): @0x023e value =====");
253 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH.B (Rn mode): @0x023c value =====");
254 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH.B (Rn mode): @0x023a value =====");
255 
      if (mem238 !==16'h71c8) tb_error("====== PUSH.B (Rn mode): @0x0238 value =====");
256 
      if (mem236 !==16'h178c) tb_error("====== PUSH.B (Rn mode): @0x0236 value =====");
257 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (Rn mode): @0x0234 value =====");
258 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (Rn mode): @0x0232 value =====");
259 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (Rn mode): @0x0230 value =====");
260 
 
261 
 
262 
      // Addressing mode: @Rn
263 
      @(r15==16'hA000);
264 
      if (r1     !==16'h024A) tb_error("====== PUSH.B (@Rn mode): SP value      =====");
265 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (@Rn mode): @0x0250 value =====");
266 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (@Rn mode): @0x024E value =====");
267 
      if (mem24C !==16'h12a6) tb_error("====== PUSH.B (@Rn mode): @0x024c value =====");
268 
      if (mem24A !==16'h5679) tb_error("====== PUSH.B (@Rn mode): @0x024a value =====");
269 
      if (mem248 !==16'h9abc) tb_error("====== PUSH.B (@Rn mode): @0x0248 value =====");
270 
      if (mem246 !==16'hdef0) tb_error("====== PUSH.B (@Rn mode): @0x0246 value =====");
271 
      if (mem244 !==16'h0fed) tb_error("====== PUSH.B (@Rn mode): @0x0244 value =====");
272 
      if (mem242 !==16'hcba9) tb_error("====== PUSH.B (@Rn mode): @0x0242 value =====");
273 
      if (mem240 !==16'h8765) tb_error("====== PUSH.B (@Rn mode): @0x0240 value =====");
274 
      if (mem23E !==16'h4321) tb_error("====== PUSH.B (@Rn mode): @0x023e value =====");
275 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH.B (@Rn mode): @0x023c value =====");
276 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH.B (@Rn mode): @0x023a value =====");
277 
      if (mem238 !==16'h71c8) tb_error("====== PUSH.B (@Rn mode): @0x0238 value =====");
278 
      if (mem236 !==16'h178c) tb_error("====== PUSH.B (@Rn mode): @0x0236 value =====");
279 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (@Rn mode): @0x0234 value =====");
280 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (@Rn mode): @0x0232 value =====");
281 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (@Rn mode): @0x0230 value =====");
282 
 
283 
 
284 
      // Addressing mode: @Rn+
285 
      @(r15==16'hB000);
286 
      if (r4     !==16'h0218) tb_error("====== PUSH.B (@Rn+ mode): R4 value      =====");
287 
      if (r1     !==16'h0246) tb_error("====== PUSH.B (@Rn+ mode): SP value      =====");
288 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (@Rn+ mode): @0x0250 value =====");
289 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (@Rn+ mode): @0x024E value =====");
290 
      if (mem24C !==16'h12a6) tb_error("====== PUSH.B (@Rn+ mode): @0x024c value =====");
291 
      if (mem24A !==16'h5679) tb_error("====== PUSH.B (@Rn+ mode): @0x024a value =====");
292 
      if (mem248 !==16'h9a6a) tb_error("====== PUSH.B (@Rn+ mode): @0x0248 value =====");
293 
      if (mem246 !==16'hde97) tb_error("====== PUSH.B (@Rn+ mode): @0x0246 value =====");
294 
      if (mem244 !==16'h0fed) tb_error("====== PUSH.B (@Rn+ mode): @0x0244 value =====");
295 
      if (mem242 !==16'hcba9) tb_error("====== PUSH.B (@Rn+ mode): @0x0242 value =====");
296 
      if (mem240 !==16'h8765) tb_error("====== PUSH.B (@Rn+ mode): @0x0240 value =====");
297 
      if (mem23E !==16'h4321) tb_error("====== PUSH.B (@Rn+ mode): @0x023e value =====");
298 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH.B (@Rn+ mode): @0x023c value =====");
299 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH.B (@Rn+ mode): @0x023a value =====");
300 
      if (mem238 !==16'h71c8) tb_error("====== PUSH.B (@Rn+ mode): @0x0238 value =====");
301 
      if (mem236 !==16'h178c) tb_error("====== PUSH.B (@Rn+ mode): @0x0236 value =====");
302 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (@Rn+ mode): @0x0234 value =====");
303 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (@Rn+ mode): @0x0232 value =====");
304 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (@Rn+ mode): @0x0230 value =====");
305 
 
306 
 
307 
      // Addressing mode: X(Rn)
308 
      @(r15==16'hC000);
309 
      if (r1     !==16'h0242) tb_error("====== PUSH.B (X(Rn) mode): SP value      =====");
310 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (X(Rn) mode): @0x0250 value =====");
311 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (X(Rn) mode): @0x024E value =====");
312 
      if (mem24C !==16'h12a6) tb_error("====== PUSH.B (X(Rn) mode): @0x024c value =====");
313 
      if (mem24A !==16'h5679) tb_error("====== PUSH.B (X(Rn) mode): @0x024a value =====");
314 
      if (mem248 !==16'h9a6a) tb_error("====== PUSH.B (X(Rn) mode): @0x0248 value =====");
315 
      if (mem246 !==16'hde97) tb_error("====== PUSH.B (X(Rn) mode): @0x0246 value =====");
316 
      if (mem244 !==16'h0f4c) tb_error("====== PUSH.B (X(Rn) mode): @0x0244 value =====");
317 
      if (mem242 !==16'hcbc3) tb_error("====== PUSH.B (X(Rn) mode): @0x0242 value =====");
318 
      if (mem240 !==16'h8765) tb_error("====== PUSH.B (X(Rn) mode): @0x0240 value =====");
319 
      if (mem23E !==16'h4321) tb_error("====== PUSH.B (X(Rn) mode): @0x023e value =====");
320 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH.B (X(Rn) mode): @0x023c value =====");
321 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH.B (X(Rn) mode): @0x023a value =====");
322 
      if (mem238 !==16'h71c8) tb_error("====== PUSH.B (X(Rn) mode): @0x0238 value =====");
323 
      if (mem236 !==16'h178c) tb_error("====== PUSH.B (X(Rn) mode): @0x0236 value =====");
324 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (X(Rn) mode): @0x0234 value =====");
325 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (X(Rn) mode): @0x0232 value =====");
326 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (X(Rn) mode): @0x0230 value =====");
327 
 
328 
 
329 
      // Addressing mode: EDE
330 
      @(r15==16'hD000);
331 
      if (r1     !==16'h023E) tb_error("====== PUSH.B (EDE mode): SP value      =====");
332 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (EDE mode): @0x0250 value =====");
333 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (EDE mode): @0x024E value =====");
334 
      if (mem24C !==16'h12a6) tb_error("====== PUSH.B (EDE mode): @0x024c value =====");
335 
      if (mem24A !==16'h5679) tb_error("====== PUSH.B (EDE mode): @0x024a value =====");
336 
      if (mem248 !==16'h9a6a) tb_error("====== PUSH.B (EDE mode): @0x0248 value =====");
337 
      if (mem246 !==16'hde97) tb_error("====== PUSH.B (EDE mode): @0x0246 value =====");
338 
      if (mem244 !==16'h0f4c) tb_error("====== PUSH.B (EDE mode): @0x0244 value =====");
339 
      if (mem242 !==16'hcbc3) tb_error("====== PUSH.B (EDE mode): @0x0242 value =====");
340 
      if (mem240 !==16'h870e) tb_error("====== PUSH.B (EDE mode): @0x0240 value =====");
341 
      if (mem23E !==16'h43fe) tb_error("====== PUSH.B (EDE mode): @0x023e value =====");
342 
      if (mem23C !==16'h1f2e) tb_error("====== PUSH.B (EDE mode): @0x023c value =====");
343 
      if (mem23A !==16'h3d4c) tb_error("====== PUSH.B (EDE mode): @0x023a value =====");
344 
      if (mem238 !==16'h71c8) tb_error("====== PUSH.B (EDE mode): @0x0238 value =====");
345 
      if (mem236 !==16'h178c) tb_error("====== PUSH.B (EDE mode): @0x0236 value =====");
346 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (EDE mode): @0x0234 value =====");
347 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (EDE mode): @0x0232 value =====");
348 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (EDE mode): @0x0230 value =====");
349 
 
350 
 
351 
      // Addressing mode: &EDE
352 
      @(r15==16'hE000);
353 
      if (r1     !==16'h023A) tb_error("====== PUSH.B (&EDE mode): SP value      =====");
354 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (&EDE mode): @0x0250 value =====");
355 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (&EDE mode): @0x024E value =====");
356 
      if (mem24C !==16'h12a6) tb_error("====== PUSH.B (&EDE mode): @0x024c value =====");
357 
      if (mem24A !==16'h5679) tb_error("====== PUSH.B (&EDE mode): @0x024a value =====");
358 
      if (mem248 !==16'h9a6a) tb_error("====== PUSH.B (&EDE mode): @0x0248 value =====");
359 
      if (mem246 !==16'hde97) tb_error("====== PUSH.B (&EDE mode): @0x0246 value =====");
360 
      if (mem244 !==16'h0f4c) tb_error("====== PUSH.B (&EDE mode): @0x0244 value =====");
361 
      if (mem242 !==16'hcbc3) tb_error("====== PUSH.B (&EDE mode): @0x0242 value =====");
362 
      if (mem240 !==16'h870e) tb_error("====== PUSH.B (&EDE mode): @0x0240 value =====");
363 
      if (mem23E !==16'h43fe) tb_error("====== PUSH.B (&EDE mode): @0x023e value =====");
364 
      if (mem23C !==16'h1fc2) tb_error("====== PUSH.B (&EDE mode): @0x023c value =====");
365 
      if (mem23A !==16'h3d3b) tb_error("====== PUSH.B (&EDE mode): @0x023a value =====");
366 
      if (mem238 !==16'h71c8) tb_error("====== PUSH.B (&EDE mode): @0x0238 value =====");
367 
      if (mem236 !==16'h178c) tb_error("====== PUSH.B (&EDE mode): @0x0236 value =====");
368 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (&EDE mode): @0x0234 value =====");
369 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (&EDE mode): @0x0232 value =====");
370 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (&EDE mode): @0x0230 value =====");
371 
 
372 
 
373 
      // Addressing mode: #N
374 
      @(r15==16'hF000);
375 
      if (r1     !==16'h0236) tb_error("====== PUSH.B (#N mode): SP value      =====");
376 
      if (mem250 !==16'h75e2) tb_error("====== PUSH.B (#N mode): @0x0250 value =====");
377 
      if (mem24E !==16'h1cc4) tb_error("====== PUSH.B (#N mode): @0x024E value =====");
378 
      if (mem24C !==16'h12a6) tb_error("====== PUSH.B (#N mode): @0x024c value =====");
379 
      if (mem24A !==16'h5679) tb_error("====== PUSH.B (#N mode): @0x024a value =====");
380 
      if (mem248 !==16'h9a6a) tb_error("====== PUSH.B (#N mode): @0x0248 value =====");
381 
      if (mem246 !==16'hde97) tb_error("====== PUSH.B (#N mode): @0x0246 value =====");
382 
      if (mem244 !==16'h0f4c) tb_error("====== PUSH.B (#N mode): @0x0244 value =====");
383 
      if (mem242 !==16'hcbc3) tb_error("====== PUSH.B (#N mode): @0x0242 value =====");
384 
      if (mem240 !==16'h870e) tb_error("====== PUSH.B (#N mode): @0x0240 value =====");
385 
      if (mem23E !==16'h43fe) tb_error("====== PUSH.B (#N mode): @0x023e value =====");
386 
      if (mem23C !==16'h1fc2) tb_error("====== PUSH.B (#N mode): @0x023c value =====");
387 
      if (mem23A !==16'h3d3b) tb_error("====== PUSH.B (#N mode): @0x023a value =====");
388 
      if (mem238 !==16'h71d9) tb_error("====== PUSH.B (#N mode): @0x0238 value =====");
389 
      if (mem236 !==16'h178d) tb_error("====== PUSH.B (#N mode): @0x0236 value =====");
390 
      if (mem234 !==16'h0000) tb_error("====== PUSH.B (#N mode): @0x0234 value =====");
391 
      if (mem232 !==16'h0000) tb_error("====== PUSH.B (#N mode): @0x0232 value =====");
392 
      if (mem230 !==16'h0000) tb_error("====== PUSH.B (#N mode): @0x0230 value =====");
393 
 
394 
 
395 
      stimulus_done = 1;
396 
   end
397 
 

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