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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_reti.s43] - Blame information for rev 19

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                 SINGLE-OPERAND ARITHMETIC: CALL  INSTRUCTION              */
/*---------------------------------------------------------------------------*/
/* Test the CALL  instruction.                                               */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/
 
 
.global main
 
        mov     #0x1234, r3
        mov     #0x1234, r4
        mov     #0x1234, r5
        mov     #0x1234, r6
        mov     #0x1234, r7
        mov     #0x1234, r8
        mov     #0x1234, r9
        mov     #0x1234, r10
        mov     #0x1234, r11
        mov     #0x1234, r12
        mov     #0x1234, r13
        mov     #0x1234, r14
main:
        # Test RESET vector
        #------------------------
        mov     #0x1000, r15
 
 
        # Test RETI instruction
        #------------------------
 
        # Pre-initialize stack
        mov             #0x0252, r1
        push #RETI_ROUTINE
        push            #0x0145
        mov     #0x0000, &0x0200
 
        # Run RETI test
        mov     #0x0000, r2
        mov     #0x0000, r5
        reti
end_of_reti_test:
 
        mov     #0x2000, r15
 
 
        # Test IRQ  0
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x3000, r15
 
wait_irq00:
        cmp     #0x5678, r6
        jne     wait_irq00
 
        mov     #0x3001, r15
 
 
        # Test IRQ  1
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x4000, r15
 
wait_irq01:
        cmp     #0x9abc, r6
        jne     wait_irq01
 
        mov     #0x4001, r15
 
 
        # Test IRQ  2
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x5000, r15
 
wait_irq02:
        cmp     #0xdef1, r6
        jne     wait_irq02
 
        mov     #0x5001, r15
 
 
        # Test IRQ  3
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x6000, r15
 
wait_irq03:
        cmp     #0x2345, r6
        jne     wait_irq03
 
        mov     #0x6001, r15
 
 
        # Test IRQ  4
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x7000, r15
 
wait_irq04:
        cmp     #0x6789, r6
        jne     wait_irq04
 
        mov     #0x7001, r15
 
 
        # Test IRQ  5
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x8000, r15
 
wait_irq05:
        cmp     #0xabcd, r6
        jne     wait_irq05
 
        mov     #0x8001, r15
 
 
        # Test IRQ  6
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0x9000, r15
 
wait_irq06:
        cmp     #0xef12, r6
        jne     wait_irq06
 
        mov     #0x9001, r15
 
 
        # Test IRQ  7
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xa000, r15
 
wait_irq07:
        cmp     #0x3456, r6
        jne     wait_irq07
 
        mov     #0xa001, r15
 
 
        # Test IRQ  8
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xb000, r15
 
wait_irq08:
        cmp     #0x789a, r6
        jne     wait_irq08
 
        mov     #0xb001, r15
 
 
        # Test IRQ  9
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xc000, r15
 
wait_irq09:
        cmp     #0xbcde, r6
        jne     wait_irq09
 
        mov     #0xc001, r15
 
 
        # Test IRQ 10
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xd000, r15
 
wait_irq10:
        cmp     #0xf123, r6
        jne     wait_irq10
 
        mov     #0xd001, r15
 
 
        # Test IRQ 11
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xe000, r15
 
wait_irq11:
        cmp     #0x4567, r6
        jne     wait_irq11
 
        mov     #0xe001, r15
 
 
        # Test IRQ 12
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xf000, r15
 
wait_irq12:
        cmp     #0x89ab, r6
        jne     wait_irq12
 
        mov     #0xf001, r15
 
 
        # Test IRQ 13
        #-------------------------
 
        mov     #0x0008, r2  ; Enable interrupts
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xf100, r15
 
wait_irq13:
        cmp     #0xcdef, r6
        jne     wait_irq13
 
        mov     #0xf101, r15
 
 
        # Test IRQ NMI:  rising edge
        #----------------------------
.set   WDTCTL, 0x0120
.set   IE1,    0x0000
.set   IFG1,   0x0002
 
        mov     #0x5a00, &WDTCTL  ; NMI Edge selection: rising
        bic.b   #0x0010, &IFG1    ; Clear NMI flag
        bis.b   #0x0010, &IE1     ; Enable NMI
 
        mov     #0x0000, r6
        mov     #0xaaaa, r7
        mov     #0x5555, r8
        mov     #0xf200, r15
 
wait_nmi:
        mov     #0xa5a5, &0x0200
        cmp     #0x0123, r6
        jne    wait_nmi
 
        mov.b      &IE1,  r9
        mov.b      &IFG1, r10
 
        mov     #0xf201, r15
 
 
 
        /* ----------------------    END OF TEST   --------------- */
end_of_test:
        nop
        br #0xffff
 
 
 
        /* ----------------------    FUNCTIONS    --------------- */
 
RETI_ROUTINE:
        mov #0x1234, r5
        jmp end_of_reti_test
 
 
IRQ00_ROUTINE:
        mov #0x5678, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ01_ROUTINE:
        mov #0x9abc, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ02_ROUTINE:
        mov #0xdef1, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ03_ROUTINE:
        mov #0x2345, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ04_ROUTINE:
        mov #0x6789, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ05_ROUTINE:
        mov #0xabcd, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ06_ROUTINE:
        mov #0xef12, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ07_ROUTINE:
        mov #0x3456, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ08_ROUTINE:
        mov #0x789a, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ09_ROUTINE:
        mov #0xbcde, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ10_ROUTINE:
        mov #0xf123, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ11_ROUTINE:
        mov #0x4567, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ12_ROUTINE:
        mov #0x89ab, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
IRQ13_ROUTINE:
        mov #0xcdef, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
NMI_ROUTINE:
        mov #0x0123, r6
        mov      r2, r7 ; Save Status register
        mov      r1, r8 ; Save Stack register
        reti
 
        nop
        nop
        nop
        nop
        nop
 
 
 
        /* ----------------------         INTERRUPT VECTORS  --------------- */
 
.section .vectors, "a"
.word IRQ00_ROUTINE     ; Interrupt  0 (lowest priority)    
.word IRQ01_ROUTINE     ; Interrupt  1                      
.word IRQ02_ROUTINE     ; Interrupt  2                      
.word IRQ03_ROUTINE     ; Interrupt  3                      
.word IRQ04_ROUTINE     ; Interrupt  4                      
.word IRQ05_ROUTINE     ; Interrupt  5                      
.word IRQ06_ROUTINE     ; Interrupt  6                      
.word IRQ07_ROUTINE     ; Interrupt  7                      
.word IRQ08_ROUTINE     ; Interrupt  8                      
.word IRQ09_ROUTINE     ; Interrupt  9                      
.word IRQ10_ROUTINE     ; Interrupt 10                      Watchdog timer
.word IRQ11_ROUTINE     ; Interrupt 11                      
.word IRQ12_ROUTINE     ; Interrupt 12                      
.word IRQ13_ROUTINE     ; Interrupt 13                      
.word NMI_ROUTINE       ; Interrupt 14                      NMI
.word main              ; Interrupt 15 (highest priority)   RESET

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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_reti.s43] - Blame information for rev 19

Line No.	Rev	Author	Line
1	2	olivier.gi	`/===========================================================================/`
2			`/* Copyright (C) 2001 Authors */`
3			`/* */`
4			`/* This source file may be used and distributed without restriction provided */`
5			`/* that this copyright statement is not removed from the file and that any */`
6			`/* derivative work contains the original copyright notice and the associated */`
7			`/* disclaimer. */`
8			`/* */`
9			`/* This source file is free software; you can redistribute it and/or modify */`
10			`/* it under the terms of the GNU Lesser General Public License as published */`
11			`/* by the Free Software Foundation; either version 2.1 of the License, or */`
12			`/* (at your option) any later version. */`
13			`/* */`
14			`/* This source is distributed in the hope that it will be useful, but WITHOUT*/`
15			`/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */`
16			`/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */`
17			`/* License for more details. */`
18			`/* */`
19			`/* You should have received a copy of the GNU Lesser General Public License */`
20			`/* along with this source; if not, write to the Free Software Foundation, */`
21			`/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */`
22			`/* */`
23			`/===========================================================================/`
24			`/* SINGLE-OPERAND ARITHMETIC: CALL INSTRUCTION */`
25			`/---------------------------------------------------------------------------/`
26			`/* Test the CALL instruction. */`
27	18	olivier.gi	`/* */`
28			`/* Author(s): */`
29			`/* - Olivier Girard, olgirard@gmail.com */`
30			`/* */`
31			`/---------------------------------------------------------------------------/`
32	19	olivier.gi	`/* $Rev: 19 $ */`
33			`/* $LastChangedBy: olivier.girard $ */`
34			`/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */`
35	2	olivier.gi	`/===========================================================================/`
36
37
38			`.global main`
39
40			`mov #0x1234, r3`
41			`mov #0x1234, r4`
42			`mov #0x1234, r5`
43			`mov #0x1234, r6`
44			`mov #0x1234, r7`
45			`mov #0x1234, r8`
46			`mov #0x1234, r9`
47			`mov #0x1234, r10`
48			`mov #0x1234, r11`
49			`mov #0x1234, r12`
50			`mov #0x1234, r13`
51			`mov #0x1234, r14`
52			`main:`
53			`# Test RESET vector`
54			`#------------------------`
55			`mov #0x1000, r15`
56
57
58			`# Test RETI instruction`
59			`#------------------------`
60
61			`# Pre-initialize stack`
62			`mov #0x0252, r1`
63			`push #RETI_ROUTINE`
64			`push #0x0145`
65			`mov #0x0000, &0x0200`
66
67			`# Run RETI test`
68			`mov #0x0000, r2`
69			`mov #0x0000, r5`
70			`reti`
71			`end_of_reti_test:`
72
73			`mov #0x2000, r15`
74
75
76			`# Test IRQ 0`
77			`#-------------------------`
78
79			`mov #0x0008, r2 ; Enable interrupts`
80			`mov #0x0000, r6`
81			`mov #0xaaaa, r7`
82			`mov #0x5555, r8`
83			`mov #0x3000, r15`
84
85			`wait_irq00:`
86			`cmp #0x5678, r6`
87			`jne wait_irq00`
88
89			`mov #0x3001, r15`
90
91
92			`# Test IRQ 1`
93			`#-------------------------`
94
95			`mov #0x0008, r2 ; Enable interrupts`
96			`mov #0x0000, r6`
97			`mov #0xaaaa, r7`
98			`mov #0x5555, r8`
99			`mov #0x4000, r15`
100
101			`wait_irq01:`
102			`cmp #0x9abc, r6`
103			`jne wait_irq01`
104
105			`mov #0x4001, r15`
106
107
108			`# Test IRQ 2`
109			`#-------------------------`
110
111			`mov #0x0008, r2 ; Enable interrupts`
112			`mov #0x0000, r6`
113			`mov #0xaaaa, r7`
114			`mov #0x5555, r8`
115			`mov #0x5000, r15`
116
117			`wait_irq02:`
118			`cmp #0xdef1, r6`
119			`jne wait_irq02`
120
121			`mov #0x5001, r15`
122
123
124			`# Test IRQ 3`
125			`#-------------------------`
126
127			`mov #0x0008, r2 ; Enable interrupts`
128			`mov #0x0000, r6`
129			`mov #0xaaaa, r7`
130			`mov #0x5555, r8`
131			`mov #0x6000, r15`
132
133			`wait_irq03:`
134			`cmp #0x2345, r6`
135			`jne wait_irq03`
136
137			`mov #0x6001, r15`
138
139
140			`# Test IRQ 4`
141			`#-------------------------`
142
143			`mov #0x0008, r2 ; Enable interrupts`
144			`mov #0x0000, r6`
145			`mov #0xaaaa, r7`
146			`mov #0x5555, r8`
147			`mov #0x7000, r15`
148
149			`wait_irq04:`
150			`cmp #0x6789, r6`
151			`jne wait_irq04`
152
153			`mov #0x7001, r15`
154
155
156			`# Test IRQ 5`
157			`#-------------------------`
158
159			`mov #0x0008, r2 ; Enable interrupts`
160			`mov #0x0000, r6`
161			`mov #0xaaaa, r7`
162			`mov #0x5555, r8`
163			`mov #0x8000, r15`
164
165			`wait_irq05:`
166			`cmp #0xabcd, r6`
167			`jne wait_irq05`
168
169			`mov #0x8001, r15`
170
171
172			`# Test IRQ 6`
173			`#-------------------------`
174
175			`mov #0x0008, r2 ; Enable interrupts`
176			`mov #0x0000, r6`
177			`mov #0xaaaa, r7`
178			`mov #0x5555, r8`
179			`mov #0x9000, r15`
180
181			`wait_irq06:`
182			`cmp #0xef12, r6`
183			`jne wait_irq06`
184
185			`mov #0x9001, r15`
186
187
188			`# Test IRQ 7`
189			`#-------------------------`
190
191			`mov #0x0008, r2 ; Enable interrupts`
192			`mov #0x0000, r6`
193			`mov #0xaaaa, r7`
194			`mov #0x5555, r8`
195			`mov #0xa000, r15`
196
197			`wait_irq07:`
198			`cmp #0x3456, r6`
199			`jne wait_irq07`
200
201			`mov #0xa001, r15`
202
203
204			`# Test IRQ 8`
205			`#-------------------------`
206
207			`mov #0x0008, r2 ; Enable interrupts`
208			`mov #0x0000, r6`
209			`mov #0xaaaa, r7`
210			`mov #0x5555, r8`
211			`mov #0xb000, r15`
212
213			`wait_irq08:`
214			`cmp #0x789a, r6`
215			`jne wait_irq08`
216
217			`mov #0xb001, r15`
218
219
220			`# Test IRQ 9`
221			`#-------------------------`
222
223			`mov #0x0008, r2 ; Enable interrupts`
224			`mov #0x0000, r6`
225			`mov #0xaaaa, r7`
226			`mov #0x5555, r8`
227			`mov #0xc000, r15`
228
229			`wait_irq09:`
230			`cmp #0xbcde, r6`
231			`jne wait_irq09`
232
233			`mov #0xc001, r15`
234
235
236			`# Test IRQ 10`
237			`#-------------------------`
238
239			`mov #0x0008, r2 ; Enable interrupts`
240			`mov #0x0000, r6`
241			`mov #0xaaaa, r7`
242			`mov #0x5555, r8`
243			`mov #0xd000, r15`
244
245			`wait_irq10:`
246			`cmp #0xf123, r6`
247			`jne wait_irq10`
248
249			`mov #0xd001, r15`
250
251
252			`# Test IRQ 11`
253			`#-------------------------`
254
255			`mov #0x0008, r2 ; Enable interrupts`
256			`mov #0x0000, r6`
257			`mov #0xaaaa, r7`
258			`mov #0x5555, r8`
259			`mov #0xe000, r15`
260
261			`wait_irq11:`
262			`cmp #0x4567, r6`
263			`jne wait_irq11`
264
265			`mov #0xe001, r15`
266
267
268			`# Test IRQ 12`
269			`#-------------------------`
270
271			`mov #0x0008, r2 ; Enable interrupts`
272			`mov #0x0000, r6`
273			`mov #0xaaaa, r7`
274			`mov #0x5555, r8`
275			`mov #0xf000, r15`
276
277			`wait_irq12:`
278			`cmp #0x89ab, r6`
279			`jne wait_irq12`
280
281			`mov #0xf001, r15`
282
283
284			`# Test IRQ 13`
285			`#-------------------------`
286
287			`mov #0x0008, r2 ; Enable interrupts`
288			`mov #0x0000, r6`
289			`mov #0xaaaa, r7`
290			`mov #0x5555, r8`
291			`mov #0xf100, r15`
292
293			`wait_irq13:`
294			`cmp #0xcdef, r6`
295			`jne wait_irq13`
296
297			`mov #0xf101, r15`
298
299
300			`# Test IRQ NMI: rising edge`
301			`#----------------------------`
302			`.set WDTCTL, 0x0120`
303			`.set IE1, 0x0000`
304			`.set IFG1, 0x0002`
305
306			`mov #0x5a00, &WDTCTL ; NMI Edge selection: rising`
307			`bic.b #0x0010, &IFG1 ; Clear NMI flag`
308			`bis.b #0x0010, &IE1 ; Enable NMI`
309
310			`mov #0x0000, r6`
311			`mov #0xaaaa, r7`
312			`mov #0x5555, r8`
313			`mov #0xf200, r15`
314
315			`wait_nmi:`
316			`mov #0xa5a5, &0x0200`
317			`cmp #0x0123, r6`
318			`jne wait_nmi`
319
320			`mov.b &IE1, r9`
321			`mov.b &IFG1, r10`
322
323			`mov #0xf201, r15`
324
325
326
327			`/* ---------------------- END OF TEST --------------- */`
328			`end_of_test:`
329			`nop`
330			`br #0xffff`
331
332
333
334			`/* ---------------------- FUNCTIONS --------------- */`
335
336			`RETI_ROUTINE:`
337			`mov #0x1234, r5`
338			`jmp end_of_reti_test`
339
340
341			`IRQ00_ROUTINE:`
342			`mov #0x5678, r6`
343			`mov r2, r7 ; Save Status register`
344			`mov r1, r8 ; Save Stack register`
345			`reti`
346
347			`IRQ01_ROUTINE:`
348			`mov #0x9abc, r6`
349			`mov r2, r7 ; Save Status register`
350			`mov r1, r8 ; Save Stack register`
351			`reti`
352
353			`IRQ02_ROUTINE:`
354			`mov #0xdef1, r6`
355			`mov r2, r7 ; Save Status register`
356			`mov r1, r8 ; Save Stack register`
357			`reti`
358
359			`IRQ03_ROUTINE:`
360			`mov #0x2345, r6`
361			`mov r2, r7 ; Save Status register`
362			`mov r1, r8 ; Save Stack register`
363			`reti`
364
365			`IRQ04_ROUTINE:`
366			`mov #0x6789, r6`
367			`mov r2, r7 ; Save Status register`
368			`mov r1, r8 ; Save Stack register`
369			`reti`
370
371			`IRQ05_ROUTINE:`
372			`mov #0xabcd, r6`
373			`mov r2, r7 ; Save Status register`
374			`mov r1, r8 ; Save Stack register`
375			`reti`
376
377			`IRQ06_ROUTINE:`
378			`mov #0xef12, r6`
379			`mov r2, r7 ; Save Status register`
380			`mov r1, r8 ; Save Stack register`
381			`reti`
382
383			`IRQ07_ROUTINE:`
384			`mov #0x3456, r6`
385			`mov r2, r7 ; Save Status register`
386			`mov r1, r8 ; Save Stack register`
387			`reti`
388
389			`IRQ08_ROUTINE:`
390			`mov #0x789a, r6`
391			`mov r2, r7 ; Save Status register`
392			`mov r1, r8 ; Save Stack register`
393			`reti`
394
395			`IRQ09_ROUTINE:`
396			`mov #0xbcde, r6`
397			`mov r2, r7 ; Save Status register`
398			`mov r1, r8 ; Save Stack register`
399			`reti`
400
401			`IRQ10_ROUTINE:`
402			`mov #0xf123, r6`
403			`mov r2, r7 ; Save Status register`
404			`mov r1, r8 ; Save Stack register`
405			`reti`
406
407			`IRQ11_ROUTINE:`
408			`mov #0x4567, r6`
409			`mov r2, r7 ; Save Status register`
410			`mov r1, r8 ; Save Stack register`
411			`reti`
412
413			`IRQ12_ROUTINE:`
414			`mov #0x89ab, r6`
415			`mov r2, r7 ; Save Status register`
416			`mov r1, r8 ; Save Stack register`
417			`reti`
418
419			`IRQ13_ROUTINE:`
420			`mov #0xcdef, r6`
421			`mov r2, r7 ; Save Status register`
422			`mov r1, r8 ; Save Stack register`
423			`reti`
424
425			`NMI_ROUTINE:`
426			`mov #0x0123, r6`
427			`mov r2, r7 ; Save Status register`
428			`mov r1, r8 ; Save Stack register`
429			`reti`
430
431			`nop`
432			`nop`
433			`nop`
434			`nop`
435			`nop`
436
437
438
439			`/* ---------------------- INTERRUPT VECTORS --------------- */`
440
441			`.section .vectors, "a"`
442			`.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority)`
443			`.word IRQ01_ROUTINE ; Interrupt 1`
444			`.word IRQ02_ROUTINE ; Interrupt 2`
445			`.word IRQ03_ROUTINE ; Interrupt 3`
446			`.word IRQ04_ROUTINE ; Interrupt 4`
447			`.word IRQ05_ROUTINE ; Interrupt 5`
448			`.word IRQ06_ROUTINE ; Interrupt 6`
449			`.word IRQ07_ROUTINE ; Interrupt 7`
450			`.word IRQ08_ROUTINE ; Interrupt 8`
451			`.word IRQ09_ROUTINE ; Interrupt 9`
452			`.word IRQ10_ROUTINE ; Interrupt 10 Watchdog timer`
453			`.word IRQ11_ROUTINE ; Interrupt 11`
454			`.word IRQ12_ROUTINE ; Interrupt 12`
455			`.word IRQ13_ROUTINE ; Interrupt 13`
456			`.word NMI_ROUTINE ; Interrupt 14 NMI`
457			`.word main ; Interrupt 15 (highest priority) RESET`