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olivier.gi |
/*===========================================================================*/
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/* Copyright (C) 2001 Authors */
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/* */
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/* This source file may be used and distributed without restriction provided */
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/* that this copyright statement is not removed from the file and that any */
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/* derivative work contains the original copyright notice and the associated */
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/* disclaimer. */
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/* */
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/* This source file is free software; you can redistribute it and/or modify */
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/* it under the terms of the GNU Lesser General Public License as published */
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/* by the Free Software Foundation; either version 2.1 of the License, or */
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/* (at your option) any later version. */
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/* */
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/* This source is distributed in the hope that it will be useful, but WITHOUT*/
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/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
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/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
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/* License for more details. */
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/* */
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/* You should have received a copy of the GNU Lesser General Public License */
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/* along with this source; if not, write to the Free Software Foundation, */
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/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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/* */
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/*===========================================================================*/
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/* ADD: DATA READ ACCESS FROM ROM */
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/*---------------------------------------------------------------------------*/
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/* Test the ADD instruction with all addressing modes making a read access */
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/* to the ROM. */
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olivier.gi |
/* */
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/* Author(s): */
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/* - Olivier Girard, olgirard@gmail.com */
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/* */
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/*---------------------------------------------------------------------------*/
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19 |
olivier.gi |
/* $Rev: 19 $ */
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/* $LastChangedBy: olivier.girard $ */
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/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
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2 |
olivier.gi |
/*===========================================================================*/
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initial
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begin
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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// Check when source is @Rn
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//--------------------------------------------------------
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@(r15==16'h1000);
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if (r5 !==16'h7777) tb_error("====== ROM Read: ADD @Rn Rm =====");
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if (r4 ===16'h0000) tb_error("====== ROM Read: ADD @Rn PC =====");
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if (mem210 !==16'h6666) tb_error("====== ROM Read: ADD @Rn x(Rm) =====");
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if (mem212 !==16'hed2e) tb_error("====== ROM Read: ADD @Rn EDE =====");
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if (mem214 !==16'h4653) tb_error("====== ROM Read: ADD @Rn &EDE =====");
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// Check when source is @Rn+
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//--------------------------------------------------------
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@(r15==16'h2000);
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if (r5 !==16'hdddd) tb_error("====== ROM Read: ADD @Rn+ Rm =====");
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if (r7 !==16'haaaa) tb_error("====== ROM Read: ADD @Rn+ PC =====");
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if (mem210 !==16'h89ab) tb_error("====== ROM Read: ADD @Rn+ x(Rm) =====");
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if (mem212 !==16'h5073) tb_error("====== ROM Read: ADD @Rn+ EDE =====");
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if (mem214 !==16'h5776) tb_error("====== ROM Read: ADD @Rn+ &EDE =====");
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// Check when source is x(Rn)
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//--------------------------------------------------------
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@(r15==16'h3000);
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if (r5 !==16'h957b) tb_error("====== ROM Read: ADD x(Rn) Rm =====");
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if (r6 ===16'h0000) tb_error("====== ROM Read: ADD x(Rn) PC =====");
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if (mem214 !==16'h5776) tb_error("====== ROM Read: ADD x(Rn) x(Rm) =====");
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if (mem220 !==16'h937b) tb_error("====== ROM Read: ADD x(Rn) EDE =====");
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if (mem208 !==16'hace4) tb_error("====== ROM Read: ADD x(Rn) &EDE =====");
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// Check when source is EDE
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//--------------------------------------------------------
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@(r15==16'h4000);
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if (r4 !==16'h06f7) tb_error("====== ROM Read: ADD EDE Rm =====");
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if (r6 ===16'h0000) tb_error("====== ROM Read: ADD EDE PC =====");
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if (mem214 !==16'h0946) tb_error("====== ROM Read: ADD EDE x(Rm) =====");
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if (mem216 !==16'hb933) tb_error("====== ROM Read: ADD EDE EDE =====");
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if (mem212 !==16'h2ab2) tb_error("====== ROM Read: ADD EDE &EDE =====");
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// Check when source is &EDE
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//--------------------------------------------------------
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@(r15==16'h5000);
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if (r4 !==16'h66f5) tb_error("====== ROM Read: ADD &EDE Rm =====");
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if (r6 ===16'h0000) tb_error("====== ROM Read: ADD &EDE PC =====");
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if (mem214 !==16'h82d1) tb_error("====== ROM Read: ADD &EDE x(Rm) =====");
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if (mem218 !==16'hca4e) tb_error("====== ROM Read: ADD &EDE EDE =====");
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if (mem202 !==16'h1338) tb_error("====== ROM Read: ADD &EDE &EDE =====");
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stimulus_done = 1;
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end
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