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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [DE0_NANO_SOC_ADC/] [PLLJ_PLLSPE_INFO.txt] - Blame information for rev 221

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Line No. Rev Author Line
1 221 olivier.gi 
PLL_Name        DE0_NANO_SOC_QSYS:u0|DE0_NANO_SOC_QSYS_pll_sys:pll_sys|altera_pll:altera_pll_i|general[0].gpll~FRACTIONAL_PLL
2 
PLLJITTER       26
3 
PLLSPEmax       100
4 
PLLSPEmin       -100
5 
 
6 
PLL_Name        DE0_NANO_SOC_QSYS:u0|DE0_NANO_SOC_QSYS_pll_sys:pll_sys|altera_pll:altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER
7 
PLLJITTER       NA
8 
PLLSPEmax       NA
9 
PLLSPEmin       NA
10 
 
11 
PLL_Name        DE0_NANO_SOC_QSYS:u0|DE0_NANO_SOC_QSYS_pll_sys:pll_sys|altera_pll:altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER
12 
PLLJITTER       NA
13 
PLLSPEmax       NA
14 
PLLSPEmin       NA
15 
 

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