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[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [doc/] [Terasic/] [DE0_NANO_SOC/] [Demonstrations/] [FPGA/] [my_first_fpga/] [pll_sim/] [synopsys/] [vcsmx/] [synopsys_sim.setup] - Blame information for rev 221

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Line No. Rev Author Line
1 221 olivier.gi
 
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WORK > DEFAULT
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DEFAULT:               ./libraries/work/
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work:                  ./libraries/work/
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altera_ver:            ./libraries/altera_ver/
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lpm_ver:               ./libraries/lpm_ver/
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sgate_ver:             ./libraries/sgate_ver/
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altera_mf_ver:         ./libraries/altera_mf_ver/
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altera_lnsim_ver:      ./libraries/altera_lnsim_ver/
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cyclonev_ver:          ./libraries/cyclonev_ver/
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cyclonev_hssi_ver:     ./libraries/cyclonev_hssi_ver/
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cyclonev_pcie_hip_ver: ./libraries/cyclonev_pcie_hip_ver/
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LIBRARY_SCAN = TRUE

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