OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Blame information for rev 98

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 73 olivier.gi
#!/bin/bash
2 2 olivier.gi
#------------------------------------------------------------------------------
3
# Copyright (C) 2001 Authors
4
#
5
# This source file may be used and distributed without restriction provided
6
# that this copyright statement is not removed from the file and that any
7
# derivative work contains the original copyright notice and the associated
8
# disclaimer.
9
#
10
# This source file is free software; you can redistribute it and/or modify
11
# it under the terms of the GNU Lesser General Public License as published
12
# by the Free Software Foundation; either version 2.1 of the License, or
13
# (at your option) any later version.
14
#
15
# This source is distributed in the hope that it will be useful, but WITHOUT
16
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
18
# License for more details.
19
#
20
# You should have received a copy of the GNU Lesser General Public License
21
# along with this source; if not, write to the Free Software Foundation,
22
# Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
23
#
24
#------------------------------------------------------------------------------
25
#
26
# File Name: msp430sim
27
#
28 16 olivier.gi
# Author(s):
29
#             - Olivier Girard,    olgirard@gmail.com
30
#
31 2 olivier.gi
#------------------------------------------------------------------------------
32 16 olivier.gi
# $Rev: 98 $
33
# $LastChangedBy: olivier.girard $
34
# $LastChangedDate: 2011-02-28 21:20:51 +0100 (Mon, 28 Feb 2011) $
35
#------------------------------------------------------------------------------
36 2 olivier.gi
 
37
###############################################################################
38
#                            Parameter Check                                  #
39
###############################################################################
40
EXPECTED_ARGS=1
41
if [ $# -ne $EXPECTED_ARGS ]; then
42
  echo "ERROR    : wrong number of arguments"
43
  echo "USAGE    : msp430sim "
44
  echo "Example  : msp430sim leds"
45 98 olivier.gi
  echo ""
46
  echo "In order to switch the verilog simulator, the MYVLOG environment"
47
  echo "variable can be set to the following values:"
48
  echo ""
49
  echo "                  - iverilog  : Icarus Verilog  (default)"
50
  echo "                  - cver      : CVer"
51
  echo "                  - verilog   : Verilog-XL"
52
  echo "                  - ncverilog : NC-Verilog"
53
  echo "                  - vcs       : VCS"
54
  echo "                  - vsim      : Modelsim"
55
  echo ""
56 2 olivier.gi
  exit 1
57
fi
58
 
59
 
60
###############################################################################
61
#                     Check if the required files exist                       #
62
###############################################################################
63
softdir=../../../software/$1;
64
elffile=../../../software/$1/$1.elf;
65
verfile=../src/$1.v;
66
submitfile=../src/submit.f;
67 26 olivier.gi
incfile=../../../rtl/verilog/openmsp430/openMSP430_defines.v;
68 2 olivier.gi
 
69
if [ ! -e $softdir ]; then
70
    echo "Software directory doesn't exist: $softdir"
71
    exit 1
72
fi
73
if [ ! -e $verfile ]; then
74
    echo "Verilog stimulus file $verfile doesn't exist: $verfile"
75
    exit 1
76
fi
77
if [ ! -e $submitfile ]; then
78
    echo "Verilog submit file $submitfile doesn't exist: $submitfile"
79
    exit 1
80
fi
81
 
82
 
83
###############################################################################
84
#                               Cleanup                                       #
85
###############################################################################
86
echo "Cleanup..."
87 98 olivier.gi
rm -rf *.vcd
88
rm -rf *.vpd
89
rm -rf *.trn
90
rm -rf *.dsn
91 37 olivier.gi
rm -rf pmem.*
92 2 olivier.gi
rm -rf stimulus.v
93
 
94
 
95
###############################################################################
96
#                              Run simulation                                 #
97
###############################################################################
98
echo " ======================================================="
99
echo "| Start simulation:             $1"
100
echo " ======================================================="
101
 
102
# Make C program
103
cd $softdir
104
make
105
cd ../../sim/rtl_sim/run/
106
 
107
# Create links
108 37 olivier.gi
ln -s $elffile pmem.elf
109 2 olivier.gi
ln -s $verfile stimulus.v
110
 
111
# Make local copy of the openMSP403 configuration file and remove comments
112 37 olivier.gi
cp  $incfile  ./pmem.inc
113
sed -i "/^\/\// s,.*,," pmem.inc
114 2 olivier.gi
 
115 37 olivier.gi
# Get Program memory size
116 72 olivier.gi
pmemunit=`grep PMEM_SIZE_ pmem.inc | grep -v ifdef | grep -v "//" | cut -d'_' -f4`
117
pmemsize=`grep PMEM_SIZE_ pmem.inc | grep -v ifdef | grep -v "//" | cut -d'_' -f3`
118
pmemsize=${pmemsize/p/.}
119
if [ $pmemunit == "KB" ]
120
  then
121
    pmemsize=`echo "pmemsize=$pmemsize * 1024; pmemsize /= 1; pmemsize" | bc`
122
fi
123 2 olivier.gi
 
124
# Create IHEX file from ELF
125
echo "Convert ELF file to IHEX format..."
126 37 olivier.gi
msp430-objcopy -O ihex  pmem.elf pmem.ihex
127 2 olivier.gi
 
128 37 olivier.gi
# Generate Program memory file
129 2 olivier.gi
echo "Convert IHEX file to Verilog MEMH format..."
130 37 olivier.gi
../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize
131 2 olivier.gi
 
132
# Start verilog simulation
133
echo "Start Verilog simulation..."
134 37 olivier.gi
../bin/rtlsim.sh    stimulus.v pmem.mem $submitfile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.