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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [include/] [Or1200MonitorSC.h] - Blame information for rev 44

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// ----------------------------------------------------------------------------
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// SystemC OpenRISC 1200 Monitor: definition
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// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
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// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
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// Contributor Julius Baxter <jb@orsoc.se>
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// This file is part of the cycle accurate model of the OpenRISC 1000 based
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// system-on-chip, ORPSoC, built using Verilator.
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// This program is free software: you can redistribute it and/or modify it
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// under the terms of the GNU Lesser General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or (at your
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// option) any later version.
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
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// License for more details.
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// You should have received a copy of the GNU Lesser General Public License
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.
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// ----------------------------------------------------------------------------
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// $Id: Or1200MonitorSC.h 288 2009-02-03 15:08:00Z jeremy $
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#ifndef OR1200_MONITOR_SC__H
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#define OR1200_MONITOR_SC__H
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#include <fstream>
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#include <ctime>
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#include "systemc.h"
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#include "OrpsocAccess.h"
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//! Monitor for special l.nop instructions
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//! This class is based on the or1200_monitor.v of the Verilog test bench. It
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//! wakes up on each posedge clock to check for "special" l.nop instructions,
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//! which need processing.
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class Or1200MonitorSC
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  : public sc_core::sc_module
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{
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public:
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  // Constructor
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  Or1200MonitorSC (sc_core::sc_module_name  name,
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                   OrpsocAccess            *_accessor);
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  // Method to check instructions
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  void  checkInstruction();
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  // Methods to setup and output state of processor to a file
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  void init_displayState(int argc,char *argv[]);
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  void displayState();
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  // The ports
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  sc_in<bool>   clk;
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private:
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  // Function to calculate performance of the sim
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  void perfSummary();
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  // Special NOP instructions
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  static const uint32_t NOP_NOP    = 0x15000000;  //!< Normal nop instruction
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  static const uint32_t NOP_EXIT   = 0x15000001;  //!< End of simulation
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  static const uint32_t NOP_REPORT = 0x15000002;  //!< Simple report
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  static const uint32_t NOP_PRINTF = 0x15000003;  //!< Simprintf instruction
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  static const uint32_t NOP_PUTC   = 0x15000004;  //!< Putc instruction
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  // Variables for processor status output
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  ofstream statusFile;
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  int logging_enabled;
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  int exit_perf_summary_enabled;
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  int insn_count;
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  // Time measurement variables - for calculating performance of the sim
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  clock_t start;
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  //! The accessor for the Orpsoc instance
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  OrpsocAccess *accessor;
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};      // Or1200MonitorSC ()
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#endif  // OR1200_MONITOR_SC__H

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