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// ----------------------------------------------------------------------------
 
// Access functions for the ORPSoC Verilator model: implementation
 
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
 
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
// Contributor Julius Baxter <jb@orsoc.se>
 
// This file is part of the cycle accurate model of the OpenRISC 1000 based
// system-on-chip, ORPSoC, built using Verilator.
 
// This program is free software: you can redistribute it and/or modify it
// under the terms of the GNU Lesser General Public License as published by
// the Free Software Foundation, either version 3 of the License, or (at your
// option) any later version.
 
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
// License for more details.
 
// You should have received a copy of the GNU Lesser General Public License
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
// ----------------------------------------------------------------------------
 
// $Id: OrpsocAccess.cpp 303 2009-02-16 11:20:17Z jeremy $
 
#include "OrpsocAccess.h"
 
#include "Vorpsoc_top.h"
#include "Vorpsoc_top_orpsoc_top.h"
#include "Vorpsoc_top_or1200_top.h"
#include "Vorpsoc_top_or1200_cpu.h"
#include "Vorpsoc_top_or1200_ctrl.h"
#include "Vorpsoc_top_or1200_except.h"
#include "Vorpsoc_top_or1200_sprs.h"
#include "Vorpsoc_top_or1200_rf.h"
#include "Vorpsoc_top_or1200_dpram.h"
// Need RAM instantiation has parameters after module name
// Include for ram_wb
#include "Vorpsoc_top_ram_wb__A20_D20_M800000_MB17.h"
// Include for ram_wb_b3
#include "Vorpsoc_top_ram_wb_b3__pi3.h"
 
//! Constructor for the ORPSoC access class
 
//! Initializes the pointers to the various module instances of interest
//! within the Verilator model.
 
//! @param[in] orpsoc  The SystemC Verilated ORPSoC instance
 
OrpsocAccess::OrpsocAccess (Vorpsoc_top *orpsoc_top)
{
  // Assign processor accessor objects
  or1200_ctrl = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_ctrl;
  or1200_except = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_except;
  or1200_sprs = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_sprs;
  rf_a        = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_rf->rf_a;
  // Assign main memory accessor objects
  // For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;
  //ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;
  wishbone_ram = orpsoc_top->v->ram_wb0->ram_wb_b3_0;
 
  // Assign arbiter accessor object
  //wb_arbiter = orpsoc_top->v->wb_conbus;
 
}       // OrpsocAccess ()
 
//! Access for the ex_freeze signal
 
//! @return  The value of the or1200_ctrl.ex_freeze signal
 
bool
OrpsocAccess::getExFreeze ()
{
  return  or1200_ctrl->ex_freeze;
 
}       // getExFreeze ()
 
//! Access for the wb_freeze signal
 
//! @return  The value of the or1200_ctrl.wb_freeze signal
 
bool
OrpsocAccess::getWbFreeze ()
{
  return  or1200_ctrl->wb_freeze;
 
}       // getWbFreeze ()
 
//! Access for the except_flushpipe signal
 
//! @return  The value of the or1200_except.except_flushpipe signal
 
bool
OrpsocAccess::getExceptFlushpipe ()
{
  return  or1200_except->except_flushpipe;
 
}       // getExceptFlushpipe ()
 
//! Access for the ex_dslot signal
 
//! @return  The value of the or1200_except.ex_dslot signalfac
 
bool
OrpsocAccess::getExDslot ()
{
  return  or1200_except->ex_dslot;
 
}       // getExDslot ()
 
//! Access for the except_type value
 
//! @return  The value of the or1200_except.except_type register
 
uint32_t
OrpsocAccess::getExceptType ()
{
  return  (or1200_except->get_except_type) ();
 
}       // getExceptType ()
 
 
//! Access for the id_pc register
 
//! @return  The value of the or1200_except.id_pc register
 
uint32_t
OrpsocAccess::getIdPC ()
{
  return  (or1200_except->get_id_pc) ();
 
}       // getIdPC ()
 
//! Access for the ex_pc register
 
//! @return  The value of the or1200_except.id_ex register
 
uint32_t
OrpsocAccess::getExPC ()
{
  return  (or1200_except->get_ex_pc) ();
 
}       // getExPC ()
 
//! Access for the wb_pc register
 
//! @return  The value of the or1200_except.wb_pc register
 
uint32_t
OrpsocAccess::getWbPC ()
{
  return  (or1200_except->get_wb_pc) ();
 
}       // getWbPC ()
 
//! Access for the id_insn register
 
//! @return  The value of the or1200_ctrl.wb_insn register
 
uint32_t
OrpsocAccess::getIdInsn ()
{
  return  (or1200_ctrl->get_id_insn) ();
 
}       // getIdInsn ()
 
//! Access for the ex_insn register
 
//! @return  The value of the or1200_ctrl.ex_insn register
 
uint32_t
OrpsocAccess::getExInsn ()
{
  return  (or1200_ctrl->get_ex_insn) ();
 
}       // getExInsn ()
 
 
//! Access for the wb_insn register
 
//! @return  The value of the or1200_ctrl.wb_insn register
 
uint32_t
OrpsocAccess::getWbInsn ()
{
  return  (or1200_ctrl->get_wb_insn) ();
 
}       // getWbInsn ()
 
//! Access the Wishbone SRAM memory
 
//! @return  The value of the 32-bit memory word at addr
 
uint32_t
OrpsocAccess::get_mem32 (uint32_t addr)
{
  return  (wishbone_ram->get_mem) (addr/4);
 
}       // get_mem32 ()
 
 
//! Access a byte from the Wishbone SRAM memory
 
//! @return  The value of the memory byte at addr
 
uint8_t
OrpsocAccess::get_mem8 (uint32_t addr)
{
 
  uint32_t word;
  static uint32_t cached_word;
  static uint32_t cached_word_addr = 0xffffffff;
  int sel = addr & 0x3; // Remember which byte we want
  addr = addr / 4;
  if (addr != cached_word_addr)
    {
      cached_word_addr = addr;
      // Convert address to word number here
      word = (wishbone_ram->get_mem) (addr);
      cached_word = word;
    }
  else
    word = cached_word;
 
  switch(sel)
    {
      /* Big endian word expected */
    case 0:
      return ((word >> 24) & 0xff);
      break;
    case 1:
      return ((word >> 16) & 0xff);
      break;
    case 2:
      return ((word >> 8) & 0xff);
      break;
    case 3:
      return ((word >> 0) & 0xff);
      break;
    default:
      return 0;
    }
 
}       // get_mem8 ()
 
 
//! Write value to the Wishbone SRAM memory
 
void
OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)
{
  (wishbone_ram->set_mem) (addr/4, data);
 
}       // set_mem32 ()
 
//! Trigger the $readmemh() system call
 
void
OrpsocAccess::do_ram_readmemh (void)
{
  (wishbone_ram->do_readmemh) ();
 
}       // do_ram_readmemh ()
 
//! Access for the OR1200 GPRs
 
//! These are extracted from memory using the Verilog function
 
//! @param[in] regNum  The GPR whose value is wanted
 
//! @return            The value of the GPR
 
uint32_t
OrpsocAccess::getGpr (uint32_t  regNum)
{
  return  (rf_a->get_gpr) (regNum);
 
}       // getGpr ()
 
 
//! Access for the sr register
 
//! @return  The value of the or1200_sprs.sr register
 
uint32_t
OrpsocAccess::getSprSr ()
{
  return  (or1200_sprs->get_sr) ();
 
}       // getSprSr ()
 
//! Access for the epcr register
 
//! @return  The value of the or1200_sprs.epcr register
 
uint32_t
OrpsocAccess::getSprEpcr ()
{
  return  (or1200_sprs->get_epcr) ();
 
}       // getSprEpcr ()
 
//! Access for the eear register
 
//! @return  The value of the or1200_sprs.eear register
 
uint32_t
OrpsocAccess::getSprEear ()
{
  return  (or1200_sprs->get_eear) ();
 
}       // getSprEear ()
 
//! Access for the esr register
 
//! @return  The value of the or1200_sprs.esr register
 
uint32_t
OrpsocAccess::getSprEsr ()
{
  return  (or1200_sprs->get_esr) ();
 
}       // getSprEsr ()
 
/*
//! Access for the arbiter's grant signal
 
//! @return  The value of the wb_conmax_top.arb signal
 
uint8_t
OrpsocAccess::getWbArbGrant ()
{
  return  (wb_arbiter->get_gnt) ();
 
}       // getWbArbGrant ()
 
 
//! Arbiter master[mast_num] access functions
 
//! Access for the arbiter's master[mast_num] data in signal
 
//! @return  The value of the wb_conmax_top.m_dat_i[mast_num]
 
uint32_t
OrpsocAccess::getWbArbMastDatI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_dat_i) (mast_num);
 
}       // getWbArbMastDatI ()
 
//! Access for the arbiter's master[mast_num] data out signal
 
//! @return  The value of the wb_conmax_top.m_dat_o[mast_num]
 
uint32_t
OrpsocAccess::getWbArbMastDatO (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_dat_o) (mast_num);
 
}       // getWbArbMastDatO ()
 
//! Access for the arbiter's master[mast_num] data out
 
//! @return  The value of the wb_conmax_top.m_adr_i[mast_num]
 
uint32_t
OrpsocAccess::getWbArbMastAdrI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_adr_i) (mast_num);
 
}       // getWbArbMastAdrI ()
 
 
//! Access for the arbiter's master[mast_num] select signal
 
//! @return  The value of the wb_conmax_top.m_sel_i[mast_num]
 
uint8_t
OrpsocAccess::getWbArbMastSelI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_sel_i) (mast_num);
 
}       // getWbArbMastSelI ()
 
//! Access for the arbiter's master[mast_num] decoded slave select signal
 
//! @return  The value of the wb_conmax_top.m_ssel_dec[mast_num]
 
uint8_t
OrpsocAccess::getWbArbMastSlaveSelDecoded (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_ssel_dec) (mast_num);
 
}       // getWbArbMastSlaveSelDecoded ()
 
//! Access for the arbiter's master[mast_num] write enable signal
 
//! @return  The value of the wb_conmax_top.m_we_i[mast_num]
 
bool
OrpsocAccess::getWbArbMastWeI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_we_i) (mast_num);
 
}       // getWbArbMastWeI ()
 
//! Access for the arbiter's master[mast_num] cycle input signal
 
//! @return  The value of the wb_conmax_top.m_cyc_i[mast_num]
 
bool
OrpsocAccess::getWbArbMastCycI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_cyc_i) (mast_num);
 
}       // getWbArbMastCycI ()
 
//! Access for the arbiter's master[mast_num] strobe input signal
 
//! @return  The value of the wb_conmax_top.m_stb_i[mast_num]
 
bool
OrpsocAccess::getWbArbMastStbI (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_stb_i) (mast_num);
 
}       // getWbArbMastStbI ()
 
//! Access for the arbiter's master[mast_num] ACK output signal
 
//! @return  The value of the wb_conmax_top.m_ack_o[mast_num]
 
bool
OrpsocAccess::getWbArbMastAckO (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_ack_o) (mast_num);
 
}       // getWbArbMastAckO ()
 
//! Access for the arbiter's master[mast_num] error input signal
 
//! @return  The value of the wb_conmax_top.m_err_o[mast_num]
 
bool
OrpsocAccess::getWbArbMastErrO (uint32_t mast_num)
{
  return  (wb_arbiter->get_m_err_o) (mast_num);
 
}       // getWbArbMastErrO ()
 
*/

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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [OrpsocAccess.cpp] - Blame information for rev 439

Line No.	Rev	Author	Line
1	6	julius	`// ----------------------------------------------------------------------------`
2
3			`// Access functions for the ORPSoC Verilator model: implementation`
4
5			`// Copyright (C) 2008 Embecosm Limited <info@embecosm.com>`
6
7			`// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>`
8	44	julius	`// Contributor Julius Baxter <jb@orsoc.se>`
9	6	julius
10			`// This file is part of the cycle accurate model of the OpenRISC 1000 based`
11			`// system-on-chip, ORPSoC, built using Verilator.`
12
13			`// This program is free software: you can redistribute it and/or modify it`
14			`// under the terms of the GNU Lesser General Public License as published by`
15			`// the Free Software Foundation, either version 3 of the License, or (at your`
16			`// option) any later version.`
17
18			`// This program is distributed in the hope that it will be useful, but WITHOUT`
19			`// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or`
20			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public`
21			`// License for more details.`
22
23			`// You should have received a copy of the GNU Lesser General Public License`
24			`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
25
26			`// ----------------------------------------------------------------------------`
27
28			`// $Id: OrpsocAccess.cpp 303 2009-02-16 11:20:17Z jeremy $`
29
30			`#include "OrpsocAccess.h"`
31
32			`#include "Vorpsoc_top.h"`
33			`#include "Vorpsoc_top_orpsoc_top.h"`
34			`#include "Vorpsoc_top_or1200_top.h"`
35			`#include "Vorpsoc_top_or1200_cpu.h"`
36			`#include "Vorpsoc_top_or1200_ctrl.h"`
37	44	julius	`#include "Vorpsoc_top_or1200_except.h"`
38			`#include "Vorpsoc_top_or1200_sprs.h"`
39	6	julius	`#include "Vorpsoc_top_or1200_rf.h"`
40			`#include "Vorpsoc_top_or1200_dpram.h"`
41	353	julius	`// Need RAM instantiation has parameters after module name`
42	439	julius	`// Include for ram_wb`
43			`#include "Vorpsoc_top_ram_wb__A20_D20_M800000_MB17.h"`
44			`// Include for ram_wb_b3`
45			`#include "Vorpsoc_top_ram_wb_b3__pi3.h"`
46	6	julius
47			`//! Constructor for the ORPSoC access class`
48
49			`//! Initializes the pointers to the various module instances of interest`
50			`//! within the Verilator model.`
51
52			`//! @param[in] orpsoc The SystemC Verilated ORPSoC instance`
53
54			`OrpsocAccess::OrpsocAccess (Vorpsoc_top *orpsoc_top)`
55			`{`
56	63	julius	`// Assign processor accessor objects`
57	403	julius	`or1200_ctrl = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_ctrl;`
58			`or1200_except = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_except;`
59			`or1200_sprs = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_sprs;`
60			`rf_a = orpsoc_top->v->or1200_top0->or1200_cpu->or1200_rf->rf_a;`
61	63	julius	`// Assign main memory accessor objects`
62	353	julius	`// For old ram_wb: ram_wb_sc_sw = orpsoc_top->v->ram_wb0->ram0;`
63	439	julius	`//ram_wb_sc_sw = orpsoc_top->v->wb_ram_b3_0;`
64			`wishbone_ram = orpsoc_top->v->ram_wb0->ram_wb_b3_0;`
65	353	julius
66	63	julius	`// Assign arbiter accessor object`
67	353	julius	`//wb_arbiter = orpsoc_top->v->wb_conbus;`
68	6	julius
69			`} // OrpsocAccess ()`
70
71	51	julius	`//! Access for the ex_freeze signal`
72	6	julius
73	51	julius	`//! @return The value of the or1200_ctrl.ex_freeze signal`
74
75			`bool`
76			`OrpsocAccess::getExFreeze ()`
77			`{`
78			`return or1200_ctrl->ex_freeze;`
79
80			`} // getExFreeze ()`
81
82	6	julius	`//! Access for the wb_freeze signal`
83
84			`//! @return The value of the or1200_ctrl.wb_freeze signal`
85
86			`bool`
87			`OrpsocAccess::getWbFreeze ()`
88			`{`
89			`return or1200_ctrl->wb_freeze;`
90
91			`} // getWbFreeze ()`
92
93	44	julius	`//! Access for the except_flushpipe signal`
94	6	julius
95	44	julius	`//! @return The value of the or1200_except.except_flushpipe signal`
96
97			`bool`
98			`OrpsocAccess::getExceptFlushpipe ()`
99			`{`
100			`return or1200_except->except_flushpipe;`
101
102			`} // getExceptFlushpipe ()`
103
104			`//! Access for the ex_dslot signal`
105
106			`//! @return The value of the or1200_except.ex_dslot signalfac`
107
108			`bool`
109			`OrpsocAccess::getExDslot ()`
110			`{`
111			`return or1200_except->ex_dslot;`
112
113			`} // getExDslot ()`
114
115	51	julius	`//! Access for the except_type value`
116
117			`//! @return The value of the or1200_except.except_type register`
118
119			`uint32_t`
120			`OrpsocAccess::getExceptType ()`
121			`{`
122			`return (or1200_except->get_except_type) ();`
123
124			`} // getExceptType ()`
125
126
127	49	julius	`//! Access for the id_pc register`
128
129			`//! @return The value of the or1200_except.id_pc register`
130
131			`uint32_t`
132			`OrpsocAccess::getIdPC ()`
133			`{`
134			`return (or1200_except->get_id_pc) ();`
135
136			`} // getIdPC ()`
137
138	51	julius	`//! Access for the ex_pc register`
139
140			`//! @return The value of the or1200_except.id_ex register`
141
142			`uint32_t`
143			`OrpsocAccess::getExPC ()`
144			`{`
145			`return (or1200_except->get_ex_pc) ();`
146
147			`} // getExPC ()`
148
149	44	julius	`//! Access for the wb_pc register`
150
151	49	julius	`//! @return The value of the or1200_except.wb_pc register`
152	44	julius
153			`uint32_t`
154			`OrpsocAccess::getWbPC ()`
155			`{`
156			`return (or1200_except->get_wb_pc) ();`
157
158			`} // getWbPC ()`
159
160	51	julius	`//! Access for the id_insn register`
161
162			`//! @return The value of the or1200_ctrl.wb_insn register`
163
164			`uint32_t`
165			`OrpsocAccess::getIdInsn ()`
166			`{`
167			`return (or1200_ctrl->get_id_insn) ();`
168
169			`} // getIdInsn ()`
170
171			`//! Access for the ex_insn register`
172
173			`//! @return The value of the or1200_ctrl.ex_insn register`
174
175			`uint32_t`
176			`OrpsocAccess::getExInsn ()`
177			`{`
178			`return (or1200_ctrl->get_ex_insn) ();`
179
180			`} // getExInsn ()`
181
182
183	6	julius	`//! Access for the wb_insn register`
184
185			`//! @return The value of the or1200_ctrl.wb_insn register`
186
187			`uint32_t`
188			`OrpsocAccess::getWbInsn ()`
189			`{`
190			`return (or1200_ctrl->get_wb_insn) ();`
191
192			`} // getWbInsn ()`
193
194	51	julius	`//! Access the Wishbone SRAM memory`
195	6	julius
196	66	julius	`//! @return The value of the 32-bit memory word at addr`
197	49	julius
198			`uint32_t`
199	66	julius	`OrpsocAccess::get_mem32 (uint32_t addr)`
200	49	julius	`{`
201	439	julius	`return (wishbone_ram->get_mem) (addr/4);`
202	49	julius
203	66	julius	`} // get_mem32 ()`
204	49	julius
205	66	julius
206			`//! Access a byte from the Wishbone SRAM memory`
207
208			`//! @return The value of the memory byte at addr`
209
210			`uint8_t`
211			`OrpsocAccess::get_mem8 (uint32_t addr)`
212			`{`
213
214			`uint32_t word;`
215			`static uint32_t cached_word;`
216			`static uint32_t cached_word_addr = 0xffffffff;`
217			`int sel = addr & 0x3; // Remember which byte we want`
218			`addr = addr / 4;`
219			`if (addr != cached_word_addr)`
220			`{`
221			`cached_word_addr = addr;`
222			`// Convert address to word number here`
223	439	julius	`word = (wishbone_ram->get_mem) (addr);`
224	66	julius	`cached_word = word;`
225			`}`
226			`else`
227			`word = cached_word;`
228
229			`switch(sel)`
230			`{`
231			`/* Big endian word expected */`
232			`case 0:`
233			`return ((word >> 24) & 0xff);`
234			`break;`
235			`case 1:`
236			`return ((word >> 16) & 0xff);`
237			`break;`
238			`case 2:`
239			`return ((word >> 8) & 0xff);`
240			`break;`
241			`case 3:`
242			`return ((word >> 0) & 0xff);`
243			`break;`
244			`default:`
245			`return 0;`
246			`}`
247
248			`} // get_mem8 ()`
249
250
251	51	julius	`//! Write value to the Wishbone SRAM memory`
252
253			`void`
254	66	julius	`OrpsocAccess::set_mem32 (uint32_t addr, uint32_t data)`
255	51	julius	`{`
256	439	julius	`(wishbone_ram->set_mem) (addr/4, data);`
257	51	julius
258	66	julius	`} // set_mem32 ()`
259	51	julius
260			`//! Trigger the $readmemh() system call`
261
262			`void`
263			`OrpsocAccess::do_ram_readmemh (void)`
264			`{`
265	439	julius	`(wishbone_ram->do_readmemh) ();`
266	51	julius
267			`} // do_ram_readmemh ()`
268
269	6	julius	`//! Access for the OR1200 GPRs`
270
271			`//! These are extracted from memory using the Verilog function`
272
273			`//! @param[in] regNum The GPR whose value is wanted`
274
275			`//! @return The value of the GPR`
276
277			`uint32_t`
278			`OrpsocAccess::getGpr (uint32_t regNum)`
279			`{`
280			`return (rf_a->get_gpr) (regNum);`
281
282			`} // getGpr ()`
283	44	julius
284
285			`//! Access for the sr register`
286
287			`//! @return The value of the or1200_sprs.sr register`
288
289			`uint32_t`
290			`OrpsocAccess::getSprSr ()`
291			`{`
292			`return (or1200_sprs->get_sr) ();`
293
294			`} // getSprSr ()`
295
296			`//! Access for the epcr register`
297
298			`//! @return The value of the or1200_sprs.epcr register`
299
300			`uint32_t`
301			`OrpsocAccess::getSprEpcr ()`
302			`{`
303			`return (or1200_sprs->get_epcr) ();`
304
305			`} // getSprEpcr ()`
306
307			`//! Access for the eear register`
308
309			`//! @return The value of the or1200_sprs.eear register`
310
311			`uint32_t`
312			`OrpsocAccess::getSprEear ()`
313			`{`
314			`return (or1200_sprs->get_eear) ();`
315
316			`} // getSprEear ()`
317
318			`//! Access for the esr register`
319
320			`//! @return The value of the or1200_sprs.esr register`
321
322			`uint32_t`
323			`OrpsocAccess::getSprEsr ()`
324			`{`
325			`return (or1200_sprs->get_esr) ();`
326
327			`} // getSprEsr ()`
328
329	353	julius	`/*`
330	63	julius	`//! Access for the arbiter's grant signal`
331
332			`//! @return The value of the wb_conmax_top.arb signal`
333
334			`uint8_t`
335			`OrpsocAccess::getWbArbGrant ()`
336			`{`
337			`return (wb_arbiter->get_gnt) ();`
338
339			`} // getWbArbGrant ()`
340
341
342			`//! Arbiter master[mast_num] access functions`
343
344			`//! Access for the arbiter's master[mast_num] data in signal`
345
346			`//! @return The value of the wb_conmax_top.m_dat_i[mast_num]`
347
348			`uint32_t`
349			`OrpsocAccess::getWbArbMastDatI (uint32_t mast_num)`
350			`{`
351			`return (wb_arbiter->get_m_dat_i) (mast_num);`
352
353			`} // getWbArbMastDatI ()`
354
355			`//! Access for the arbiter's master[mast_num] data out signal`
356
357			`//! @return The value of the wb_conmax_top.m_dat_o[mast_num]`
358
359			`uint32_t`
360			`OrpsocAccess::getWbArbMastDatO (uint32_t mast_num)`
361			`{`
362			`return (wb_arbiter->get_m_dat_o) (mast_num);`
363
364			`} // getWbArbMastDatO ()`
365
366			`//! Access for the arbiter's master[mast_num] data out`
367
368			`//! @return The value of the wb_conmax_top.m_adr_i[mast_num]`
369
370			`uint32_t`
371			`OrpsocAccess::getWbArbMastAdrI (uint32_t mast_num)`
372			`{`
373			`return (wb_arbiter->get_m_adr_i) (mast_num);`
374
375			`} // getWbArbMastAdrI ()`
376
377
378			`//! Access for the arbiter's master[mast_num] select signal`
379
380			`//! @return The value of the wb_conmax_top.m_sel_i[mast_num]`
381
382			`uint8_t`
383			`OrpsocAccess::getWbArbMastSelI (uint32_t mast_num)`
384			`{`
385			`return (wb_arbiter->get_m_sel_i) (mast_num);`
386
387			`} // getWbArbMastSelI ()`
388
389			`//! Access for the arbiter's master[mast_num] decoded slave select signal`
390
391			`//! @return The value of the wb_conmax_top.m_ssel_dec[mast_num]`
392
393			`uint8_t`
394			`OrpsocAccess::getWbArbMastSlaveSelDecoded (uint32_t mast_num)`
395			`{`
396			`return (wb_arbiter->get_m_ssel_dec) (mast_num);`
397
398			`} // getWbArbMastSlaveSelDecoded ()`
399
400			`//! Access for the arbiter's master[mast_num] write enable signal`
401
402			`//! @return The value of the wb_conmax_top.m_we_i[mast_num]`
403
404			`bool`
405			`OrpsocAccess::getWbArbMastWeI (uint32_t mast_num)`
406			`{`
407			`return (wb_arbiter->get_m_we_i) (mast_num);`
408
409			`} // getWbArbMastWeI ()`
410
411			`//! Access for the arbiter's master[mast_num] cycle input signal`
412
413			`//! @return The value of the wb_conmax_top.m_cyc_i[mast_num]`
414
415			`bool`
416			`OrpsocAccess::getWbArbMastCycI (uint32_t mast_num)`
417			`{`
418			`return (wb_arbiter->get_m_cyc_i) (mast_num);`
419
420			`} // getWbArbMastCycI ()`
421
422			`//! Access for the arbiter's master[mast_num] strobe input signal`
423
424			`//! @return The value of the wb_conmax_top.m_stb_i[mast_num]`
425
426			`bool`
427			`OrpsocAccess::getWbArbMastStbI (uint32_t mast_num)`
428			`{`
429			`return (wb_arbiter->get_m_stb_i) (mast_num);`
430
431			`} // getWbArbMastStbI ()`
432
433			`//! Access for the arbiter's master[mast_num] ACK output signal`
434
435			`//! @return The value of the wb_conmax_top.m_ack_o[mast_num]`
436
437			`bool`
438			`OrpsocAccess::getWbArbMastAckO (uint32_t mast_num)`
439			`{`
440			`return (wb_arbiter->get_m_ack_o) (mast_num);`
441
442			`} // getWbArbMastAckO ()`
443
444			`//! Access for the arbiter's master[mast_num] error input signal`
445
446			`//! @return The value of the wb_conmax_top.m_err_o[mast_num]`
447
448			`bool`
449			`OrpsocAccess::getWbArbMastErrO (uint32_t mast_num)`
450			`{`
451			`return (wb_arbiter->get_m_err_o) (mast_num);`
452
453			`} // getWbArbMastErrO ()`
454
455	353	julius	`*/`