OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [ResetSC.cpp] - Blame information for rev 462

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 6 julius
// ----------------------------------------------------------------------------
2
 
3
// SystemC reset signal generator
4
 
5
// Copyright (C) 2008  Embecosm Limited <info@embecosm.com>
6
 
7
// Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>
8
 
9
// This file is part of the cycle accurate model of the OpenRISC 1000 based
10
// system-on-chip, ORPSoC, built using Verilator.
11
 
12
// This program is free software: you can redistribute it and/or modify it
13
// under the terms of the GNU Lesser General Public License as published by
14
// the Free Software Foundation, either version 3 of the License, or (at your
15
// option) any later version.
16
 
17
// This program is distributed in the hope that it will be useful, but WITHOUT
18
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
20
// License for more details.
21
 
22
// You should have received a copy of the GNU Lesser General Public License
23
// along with this program.  If not, see <http://www.gnu.org/licenses/>.
24
 
25
// ----------------------------------------------------------------------------
26
 
27
// $Id: ResetSC.cpp 286 2009-02-03 11:19:30Z jeremy $
28
 
29
#include "ResetSC.h"
30
 
31 462 julius
SC_HAS_PROCESS(ResetSC);
32 6 julius
 
33
//! Constructor for the reset generator
34
 
35
//! @param name          Name of this module, passed to the parent
36
//!                      constructor.
37
//! @param resetCounter  Number of cycles of reset to provide.
38
 
39 462 julius
ResetSC::ResetSC(sc_core::sc_module_name name, int _resetCounter):
40
sc_module(name), resetCounter(_resetCounter)
41 6 julius
{
42 462 julius
        SC_METHOD(driveReset);
43
        sensitive << clk.neg();
44 6 julius
 
45 462 julius
}                               // ResetSC ()
46 6 julius
 
47
//! Method to drive the reset port (active low). We will be called as an
48
//! initialization, which can be used to drive the reset low.
49 462 julius
void ResetSC::driveReset()
50 6 julius
{
51 462 julius
        if (resetCounter > 0) {
52
                rst = 1;
53
                rstn = 0;
54
                resetCounter--;
55
        } else {
56
                rst = 0;
57
                rstn = 1;
58
        }
59
}                               // driveReset()

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.