OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [atlys/] [rtl/] [verilog/] [include/] [tap_defines.v] - Blame information for rev 627

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 627 stekern
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
////  tap_defines.v                                               ////
4
////                                                              ////
5
////                                                              ////
6
////  This file is part of the JTAG Test Access Port (TAP)        ////
7
////  http://www.opencores.org/projects/jtag/                     ////
8
////                                                              ////
9
////  Author(s):                                                  ////
10
////       Igor Mohor (igorm@opencores.org)                       ////
11
////                                                              ////
12
////                                                              ////
13
////  All additional information is avaliable in the README.txt   ////
14
////  file.                                                       ////
15
////                                                              ////
16
//////////////////////////////////////////////////////////////////////
17
////                                                              ////
18
//// Copyright (C) 2000 - 2003 Authors                            ////
19
////                                                              ////
20
//// This source file may be used and distributed without         ////
21
//// restriction provided that this copyright statement is not    ////
22
//// removed from the file and that any derivative work contains  ////
23
//// the original copyright notice and the associated disclaimer. ////
24
////                                                              ////
25
//// This source file is free software; you can redistribute it   ////
26
//// and/or modify it under the terms of the GNU Lesser General   ////
27
//// Public License as published by the Free Software Foundation; ////
28
//// either version 2.1 of the License, or (at your option) any   ////
29
//// later version.                                               ////
30
////                                                              ////
31
//// This source is distributed in the hope that it will be       ////
32
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
33
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
34
//// PURPOSE.  See the GNU Lesser General Public License for more ////
35
//// details.                                                     ////
36
////                                                              ////
37
//// You should have received a copy of the GNU Lesser General    ////
38
//// Public License along with this source; if not, download it   ////
39
//// from http://www.opencores.org/lgpl.shtml                     ////
40
////                                                              ////
41
//////////////////////////////////////////////////////////////////////
42
//
43
// CVS Revision History
44
//
45
// $Log: tap_defines.v,v $
46
// Revision 1.2  2004/01/27 10:00:33  mohor
47
// Unused registers removed.
48
//
49
// Revision 1.1  2003/12/23 14:52:14  mohor
50
// Directory structure changed. New version of TAP.
51
//
52
//
53
//
54
 
55
 
56
// Define IDCODE Value
57
`define IDCODE_VALUE  32'h14951185
58
 
59
// Length of the Instruction register
60
`define IR_LENGTH       4
61
 
62
// Supported Instructions
63
`define EXTEST          4'b0000
64
`define SAMPLE_PRELOAD  4'b0001
65
`define IDCODE          4'b0010
66
`define DEBUG           4'b1000
67
`define MBIST           4'b1001
68
`define BYPASS          4'b1111
69
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.