URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [cfi-ctrl/] [cfi_ctrl.c] - Blame information for rev 655

Go to most recent revision | Details | Compare with Previous | View Log


/* Driver functions for cfi_ctrl module which is to control
   CFI flash devices.
*/
 
#include "board.h"
#include "cpu-utils.h"
#include "cfi_ctrl.h"
 
void cfi_ctrl_reset_flash(void)
{
  //REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_RESET_DEVICE;
  // Put in array read mode, like reset would
  REG16(CFI_CTRL_BASE) = 0x00ff;
 
}
 
int cfi_ctrl_busy(void)
{
  //  return REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) & 
  //CFI_CTRL_SCR_CONTROLLER_BUSY;
  return 0;
}
 
void cfi_ctrl_clear_status(void)
{
  //REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_CLEAR_FSR;
  REG16(CFI_CTRL_BASE) = 0x0050;
}
 
unsigned char cfi_ctrl_get_status(void)
{
  //return (unsigned char) (REG32((CFI_CTRL_BASE + CFI_CTRL_FSR_OFFSET)) & 0xff);
  REG16(CFI_CTRL_BASE) = 0x0070;
  return (unsigned char) REG16(CFI_CTRL_BASE);
}
 
void cfi_ctrl_unlock_block(unsigned int addr)
{
  //REG32((CFI_CTRL_BASE + CFI_CTRL_UNLOCKBLOCK_OFFSET + addr)) = 0;
  REG16(CFI_CTRL_BASE + addr) = 0x0060;
  REG16(CFI_CTRL_BASE + addr) = 0x00d0;
}
 
int cfi_ctrl_erase_block(unsigned int addr)
{
  cfi_ctrl_clear_status();
 
  /* Unlock block first */
  cfi_ctrl_unlock_block(addr);
 
  //REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;
  REG16(CFI_CTRL_BASE + addr) = 0x0020;
  REG16(CFI_CTRL_BASE + addr) = 0x00d0;
 
  /* Wait for device to be finished erasing */
  while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));
 
  /* Check if programming was successful */
  return !!(cfi_ctrl_get_status() & CFI_FSR_ES);
 
}
 
void cfi_ctrl_erase_block_no_wait(unsigned int addr)
{
  cfi_ctrl_clear_status();
 
  /* Unlock block first */
  cfi_ctrl_unlock_block(addr);
 
  /* Now erase the block */
  REG16(CFI_CTRL_BASE + addr) = 0x0020;
  REG16(CFI_CTRL_BASE + addr) = 0x00d0;
  //  REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;
 
  return;
 
}
 
int cfi_ctrl_write_short(short data, unsigned int addr)
{
 
  cfi_ctrl_clear_status();
 
  REG16(CFI_CTRL_BASE + addr) = 0x0040;
  REG16(CFI_CTRL_BASE + addr) = data;
 
  /* Wait for device to write */
  while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));
 
  /* Check if programming was successful */
  return !!(cfi_ctrl_get_status() & CFI_FSR_PS);
}
 
void cfi_ctrl_enable_data_read(void)
{
  REG16(CFI_CTRL_BASE) = 0x00ff;
}
 
short cfi_ctrl_read_identifier(unsigned int addr)
{
  //return REG16(CFI_CTRL_BASE + CFI_CTRL_DEVICEIDENT_OFFSET + (addr<<1));
  REG16(CFI_CTRL_BASE) = 0x0090;
  return REG16(CFI_CTRL_BASE + (addr<<1));
}
 
short cfi_ctrl_query_info(unsigned int addr)
{
  REG16(CFI_CTRL_BASE) = 0x0098;
  return REG16(CFI_CTRL_BASE + (addr<<1));
}
 
 

Line No.	Rev	Author	Line
1	655	julius	`/* Driver functions for cfi_ctrl module which is to control`
2			`CFI flash devices.`
3			`*/`
4
5			`#include "board.h"`
6			`#include "cpu-utils.h"`
7			`#include "cfi_ctrl.h"`
8
9			`void cfi_ctrl_reset_flash(void)`
10			`{`
11			`//REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_RESET_DEVICE;`
12			`// Put in array read mode, like reset would`
13			`REG16(CFI_CTRL_BASE) = 0x00ff;`
14
15			`}`
16
17			`int cfi_ctrl_busy(void)`
18			`{`
19			`// return REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) &`
20			`//CFI_CTRL_SCR_CONTROLLER_BUSY;`
21			`return 0;`
22			`}`
23
24			`void cfi_ctrl_clear_status(void)`
25			`{`
26			`//REG32((CFI_CTRL_BASE + CFI_CTRL_SCR_OFFSET)) = CFI_CTRL_SCR_CLEAR_FSR;`
27			`REG16(CFI_CTRL_BASE) = 0x0050;`
28			`}`
29
30			`unsigned char cfi_ctrl_get_status(void)`
31			`{`
32			`//return (unsigned char) (REG32((CFI_CTRL_BASE + CFI_CTRL_FSR_OFFSET)) & 0xff);`
33			`REG16(CFI_CTRL_BASE) = 0x0070;`
34			`return (unsigned char) REG16(CFI_CTRL_BASE);`
35			`}`
36
37			`void cfi_ctrl_unlock_block(unsigned int addr)`
38			`{`
39			`//REG32((CFI_CTRL_BASE + CFI_CTRL_UNLOCKBLOCK_OFFSET + addr)) = 0;`
40			`REG16(CFI_CTRL_BASE + addr) = 0x0060;`
41			`REG16(CFI_CTRL_BASE + addr) = 0x00d0;`
42			`}`
43
44			`int cfi_ctrl_erase_block(unsigned int addr)`
45			`{`
46			`cfi_ctrl_clear_status();`
47
48			`/* Unlock block first */`
49			`cfi_ctrl_unlock_block(addr);`
50
51			`//REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;`
52			`REG16(CFI_CTRL_BASE + addr) = 0x0020;`
53			`REG16(CFI_CTRL_BASE + addr) = 0x00d0;`
54
55			`/* Wait for device to be finished erasing */`
56			`while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));`
57
58			`/* Check if programming was successful */`
59			`return !!(cfi_ctrl_get_status() & CFI_FSR_ES);`
60
61			`}`
62
63			`void cfi_ctrl_erase_block_no_wait(unsigned int addr)`
64			`{`
65			`cfi_ctrl_clear_status();`
66
67			`/* Unlock block first */`
68			`cfi_ctrl_unlock_block(addr);`
69
70			`/* Now erase the block */`
71			`REG16(CFI_CTRL_BASE + addr) = 0x0020;`
72			`REG16(CFI_CTRL_BASE + addr) = 0x00d0;`
73			`// REG32((CFI_CTRL_BASE + CFI_CTRL_ERASEBLOCK_OFFSET + addr)) = 0;`
74
75			`return;`
76
77			`}`
78
79			`int cfi_ctrl_write_short(short data, unsigned int addr)`
80			`{`
81
82			`cfi_ctrl_clear_status();`
83
84			`REG16(CFI_CTRL_BASE + addr) = 0x0040;`
85			`REG16(CFI_CTRL_BASE + addr) = data;`
86
87			`/* Wait for device to write */`
88			`while(!(cfi_ctrl_get_status() & CFI_FSR_DWS));`
89
90			`/* Check if programming was successful */`
91			`return !!(cfi_ctrl_get_status() & CFI_FSR_PS);`
92			`}`
93
94			`void cfi_ctrl_enable_data_read(void)`
95			`{`
96			`REG16(CFI_CTRL_BASE) = 0x00ff;`
97			`}`
98
99			`short cfi_ctrl_read_identifier(unsigned int addr)`
100			`{`
101			`//return REG16(CFI_CTRL_BASE + CFI_CTRL_DEVICEIDENT_OFFSET + (addr<<1));`
102			`REG16(CFI_CTRL_BASE) = 0x0090;`
103			`return REG16(CFI_CTRL_BASE + (addr<<1));`
104			`}`
105
106			`short cfi_ctrl_query_info(unsigned int addr)`
107			`{`
108			`REG16(CFI_CTRL_BASE) = 0x0098;`
109			`return REG16(CFI_CTRL_BASE + (addr<<1));`
110			`}`
111
112

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [cfi-ctrl/] [cfi_ctrl.c] - Blame information for rev 655