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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [or1200-utils.c] - Blame information for rev 411

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#include "spr-defs.h"
#include "or1200-utils.h"
#include "board.h" // For timer rate (IN_CLK, TICKS_PER_SEC)
 
/* For writing into SPR. */
void
mtspr(unsigned long spr, unsigned long value)
{
  asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));
}
 
/* For reading SPR. */
unsigned long
mfspr(unsigned long spr)
{
  unsigned long value;
  asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));
  return value;
}
 
/* Print out a character via simulator */
void
sim_putc(unsigned char c)
{
  asm("l.addi\tr3,%0,0": :"r" (c));
  asm("l.nop %0": :"K" (NOP_PUTC));
}
 
/* print long */
void
report(unsigned long value)
{
  asm("l.addi\tr3,%0,0": :"r" (value));
  asm("l.nop %0": :"K" (NOP_REPORT));
}
 
/* Loops/exits simulation */
void
exit (int i)
{
  asm("l.add r3,r0,%0": : "r" (i));
  asm("l.nop %0": :"K" (NOP_EXIT));
  while (1);
}
 
/* Enable user interrupts */
void
cpu_enable_user_interrupts(void)
{
  /* Enable interrupts in supervisor register */
  mtspr (SPR_SR, mfspr (SPR_SR) | SPR_SR_IEE);
}
 
/* Tick timer variable */
unsigned long timer_ticks;
 
/* Tick timer functions */
/* Enable tick timer and interrupt generation */
void
cpu_enable_timer(void)
{
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD));
  mtspr(SPR_SR, SPR_SR_TEE | mfspr(SPR_SR));
 
}
 
/* Disable tick timer and interrupt generation */
void
cpu_disable_timer(void)
{
  // Disable timer: clear it all!
  mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_TEE);
  mtspr(SPR_TTMR, 0);
 
}
 
/* Timer increment - called by interrupt routine */
/* Now actually done in interrupt vector code in crt0.S */
void
cpu_timer_tick(void)
{
  timer_ticks++;
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD));
}
 
/* Reset tick counter */
void
cpu_reset_timer_ticks(void)
{
  timer_ticks=0;
}
 
/* Get tick counter */
unsigned long
cpu_get_timer_ticks(void)
{
  return timer_ticks;
}
 
/* Wait for 10ms */
void
cpu_sleep_10ms(void)
{
  unsigned long first_time = cpu_get_timer_ticks();
  while (first_time == cpu_get_timer_ticks());
}
 

Line No.	Rev	Author	Line
1	349	julius	`#include "spr-defs.h"`
2	393	julius	`#include "or1200-utils.h"`
3			`#include "board.h" // For timer rate (IN_CLK, TICKS_PER_SEC)`
4	349	julius
5			`/* For writing into SPR. */`
6	411	julius	`void`
7			`mtspr(unsigned long spr, unsigned long value)`
8	349	julius	`{`
9			`asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));`
10			`}`
11
12			`/* For reading SPR. */`
13	411	julius	`unsigned long`
14			`mfspr(unsigned long spr)`
15	349	julius	`{`
16			`unsigned long value;`
17			`asm("l.mfspr\t\t%0,%1,0" : "=r" (value) : "r" (spr));`
18			`return value;`
19			`}`
20
21			`/* Print out a character via simulator */`
22	411	julius	`void`
23			`sim_putc(unsigned char c)`
24	349	julius	`{`
25			`asm("l.addi\tr3,%0,0": :"r" (c));`
26			`asm("l.nop %0": :"K" (NOP_PUTC));`
27			`}`
28
29			`/* print long */`
30	411	julius	`void`
31			`report(unsigned long value)`
32	349	julius	`{`
33			`asm("l.addi\tr3,%0,0": :"r" (value));`
34			`asm("l.nop %0": :"K" (NOP_REPORT));`
35			`}`
36
37			`/* Loops/exits simulation */`
38	411	julius	`void`
39			`exit (int i)`
40	349	julius	`{`
41			`asm("l.add r3,r0,%0": : "r" (i));`
42			`asm("l.nop %0": :"K" (NOP_EXIT));`
43			`while (1);`
44			`}`
45
46	408	julius	`/* Enable user interrupts */`
47			`void`
48			`cpu_enable_user_interrupts(void)`
49			`{`
50			`/* Enable interrupts in supervisor register */`
51			`mtspr (SPR_SR, mfspr (SPR_SR) \| SPR_SR_IEE);`
52			`}`
53	349	julius
54			`/* Tick timer variable */`
55			`unsigned long timer_ticks;`
56
57			`/* Tick timer functions */`
58			`/* Enable tick timer and interrupt generation */`
59	411	julius	`void`
60			`cpu_enable_timer(void)`
61	349	julius	`{`
62	411	julius	`mtspr(SPR_TTMR, SPR_TTMR_IE \| SPR_TTMR_RT \| ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD));`
63	349	julius	`mtspr(SPR_SR, SPR_SR_TEE \| mfspr(SPR_SR));`
64	411	julius
65	349	julius	`}`
66
67			`/* Disable tick timer and interrupt generation */`
68	411	julius	`void`
69			`cpu_disable_timer(void)`
70	349	julius	`{`
71			`// Disable timer: clear it all!`
72			`mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_TEE);`
73			`mtspr(SPR_TTMR, 0);`
74
75			`}`
76
77			`/* Timer increment - called by interrupt routine */`
78	411	julius	`/* Now actually done in interrupt vector code in crt0.S */`
79			`void`
80			`cpu_timer_tick(void)`
81	349	julius	`{`
82			`timer_ticks++;`
83			`mtspr(SPR_TTMR, SPR_TTMR_IE \| SPR_TTMR_RT \| ((IN_CLK/TICKS_PER_SEC) & SPR_TTMR_PERIOD));`
84			`}`
85
86			`/* Reset tick counter */`
87	411	julius	`void`
88			`cpu_reset_timer_ticks(void)`
89	349	julius	`{`
90			`timer_ticks=0;`
91			`}`
92
93			`/* Get tick counter */`
94	411	julius	`unsigned long`
95			`cpu_get_timer_ticks(void)`
96	349	julius	`{`
97			`return timer_ticks;`
98			`}`
99
100			`/* Wait for 10ms */`
101	411	julius	`void`
102			`cpu_sleep_10ms(void)`
103	349	julius	`{`
104	411	julius	`unsigned long first_time = cpu_get_timer_ticks();`
105			`while (first_time == cpu_get_timer_ticks());`
106	349	julius	`}`
107

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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [or1200-utils.c] - Blame information for rev 411