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1 786 skrzyp
# ====================================================================
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#
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#      hal_openrisc_orpsoc.cdl
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#
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#      OpenRISC Reference Platform (ORP) HAL package configuration data
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#
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# ====================================================================
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## ####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later
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## version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with eCos; if not, write to the Free Software Foundation, Inc.,
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## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
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##
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## As a special exception, if other files instantiate templates or use
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## macros or inline functions from this file, or you compile this file
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## and link it with other works to produce a work based on this file,
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## this file does not by itself cause the resulting work to be covered by
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## the GNU General Public License. However the source code for this file
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## must still be made available in accordance with section (3) of the GNU
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## General Public License v2.
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##
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## This exception does not invalidate any other reasons why a work based
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## on this file might be covered by the GNU General Public License.
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## -------------------------------------------
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## ####ECOSGPLCOPYRIGHTEND####
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# ====================================================================
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######DESCRIPTIONBEGIN####
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#
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# Author(s):      sfurman
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# Contributors:
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# Date:           2003-01-20
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#
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#####DESCRIPTIONEND####
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#
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# ====================================================================
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50
cdl_package CYGPKG_HAL_OPENRISC_ORPSOC {
51
    display  "OpenRISC System-on-Chip"
52
    parent        CYGPKG_HAL_OPENRISC
53
    include_dir   cyg/hal
54
    hardware
55
    description   "
56
           The ORPSoC HAL package should be used when targetting the
57
           OpenRISC Reference Platform."
58
 
59
    compile       hal_diag.c hal_aux.c
60
 
61
    implements    CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
62
    implements    CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
63 791 skrzyp
    implements    CYGINT_HAL_DEBUG_GDB_STUBS
64
    implements    CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
65 786 skrzyp
 
66
    define_proc {
67
        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   "
68
        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H "
69
    }
70
 
71 791 skrzyp
    cdl_component CYG_HAL_STARTUP {
72
        display       "Startup type"
73
        flavor        data
74
        legal_values  {"RAM" "ROM" "JTAG"}
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        default_value {"JTAG"}
76
        no_define
77
        define -file system.h CYG_HAL_STARTUP
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        description   "
79
            Selects whether code initially runs from ROM or RAM.  In the case of ROM startup,
80
            it's possible for the code to be copied into RAM and executed there."
81
    }
82
 
83
    cdl_component CYGHWR_MEMORY_LAYOUT {
84
        display "Memory layout"
85
        flavor data
86
        no_define
87
        calculated { CYG_HAL_STARTUP == "ROM" ? "openrisc_orpsoc_rom" : \
88
                                                "openrisc_orpsoc_ram" }
89
 
90
        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
91
            display "Memory layout linker script fragment"
92
            flavor data
93
            no_define
94
            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
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            calculated { CYG_HAL_STARTUP == "ROM" ? "" : \
96
                                                    "" }
97
        }
98
 
99
        cdl_option CYGHWR_MEMORY_LAYOUT_H {
100
            display "Memory layout header file"
101
            flavor data
102
            no_define
103
            define -file system.h CYGHWR_MEMORY_LAYOUT_H
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            calculated { CYG_HAL_STARTUP == "ROM" ? "" : \
105
                                                    "" }
106
        }
107
    }
108
 
109
 
110
    # Real-time clock/counter specifics
111
    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
112
        display       "Real-time clock constants."
113
        flavor        none
114
 
115
        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
116
            display       "Real-time clock numerator"
117
            flavor        data
118
            default_value 1000000000
119
        }
120
        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
121
            display       "Real-time clock denominator"
122
            flavor        data
123
            default_value 100
124
        }
125
        cdl_option CYGNUM_HAL_RTC_PERIOD {
126
            display       "Real-time clock period"
127
            flavor        data
128
            default_value {CYGHWR_HAL_OPENRISC_CPU_FREQ * 1000000 / CYGNUM_HAL_RTC_DENOMINATOR}
129
            description   "
130
                The tick timer facility is used
131
                to drive the eCos kernel RTC. The count register
132
                increments at the CPU clock speed.  By default, 100 Hz"
133
        }
134
    }
135
 
136
    cdl_component CYGBLD_GLOBAL_OPTIONS {
137
        display "Global build options"
138
        flavor  none
139
        description   "
140
            Global build options including control over
141
            compiler flags, linker flags and choice of toolchain."
142
 
143
 
144
        parent  CYGPKG_NONE
145
 
146
        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
147
            display "Global command prefix"
148
            flavor  data
149
            no_define
150
            default_value { "or32-elf" }
151
            description "
152
                This option specifies the command prefix used when
153
                invoking the build tools."
154
        }
155
 
156
        cdl_option CYGBLD_GLOBAL_CFLAGS {
157
            display "Global compiler flags"
158
            flavor  data
159
            no_define
160
            default_value { CYGBLD_GLOBAL_WARNFLAGS .
161
                            "-g -O2 -fno-omit-frame-pointer -fno-rtti -fno-exceptions " .
162
                            (CYGHWR_MUL_IMPLEMENTED ? "-mhard-mul " : "-msoft-mul ") .
163
                            (CYGHWR_DIV_IMPLEMENTED ? "-mhard-div " : "-msoft-div ") .
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                            (CYGHWR_FPU_IMPLEMENTED ? "-mhard-float " : "-msoft-float ") .
165
                            (CYGHWR_BRANCH_SLOT_IMPLEMENTED ? "" : "-mno-branch-delay " ) }
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            description   "
167
                This option controls the global compiler flags which
168
                are used to compile all packages by
169
                default. Individual packages may define
170
                options which override these global flags."
171
        }
172
 
173
        cdl_option CYGBLD_GLOBAL_LDFLAGS {
174
            display "Global linker flags"
175
            flavor  data
176
            no_define
177
            default_value { "-g -O2 -nostdlib -Wl,--gc-sections -Wl,-static " .
178
                            (CYGHWR_MUL_IMPLEMENTED ? "-mhard-mul " : "-msoft-mul ") .
179
                            (CYGHWR_DIV_IMPLEMENTED ? "-mhard-div " : "-msoft-div ") .
180 839 skrzyp
                            (CYGHWR_FPU_IMPLEMENTED ? "-mhard-float " : "-msoft-float ") .
181
                            (CYGHWR_BRANCH_SLOT_IMPLEMENTED ? "" : "-mno-branch-delay " ) }
182 791 skrzyp
            description   "
183
                This option controls the global linker flags. Individual
184
                packages may define options which override these global flags."
185
        }
186
    }
187
 
188
    cdl_option CYGBLD_BUILD_GDB_STUBS {
189
        display "Build GDB stub ROM image"
190
        default_value 0
191
        parent CYGBLD_GLOBAL_OPTIONS
192
        requires { CYG_HAL_STARTUP == "ROM" }
193
        requires CYGSEM_HAL_ROM_MONITOR
194
        requires CYGBLD_BUILD_COMMON_GDB_STUBS
195
        requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
196
        requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
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        requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
198
        requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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        requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
200
        no_define
201
        description "
202
                This option enables the building of the GDB stubs for the
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                board. The common HAL controls takes care of most of the
204
                build process, but the final conversion from ELF image to
205
                binary data is handled by the platform CDL, allowing
206
                relocation of the data if necessary."
207
 
208
        make -priority 320 {
209
            /bin/gdb_module.bin : /bin/gdb_module.img
210
            $(OBJCOPY) -O binary $< $@
211
        }
212
    }
213
 
214
    cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE {
215
        display       "Number of breakpoints supported by the HAL."
216
        flavor        data
217
        default_value 25
218
        description   "
219
            This option determines the number of breakpoints supported by the HAL."
220
    }
221
 
222
    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
223
        display       "Work with a ROM monitor"
224
        flavor        bool
225
        default_value { CYG_HAL_STARTUP == "RAM" ? 1 : 0 }
226
        parent        CYGPKG_HAL_ROM_MONITOR
227
        requires      { CYG_HAL_STARTUP == "RAM" }
228
        description   "
229
            Allow coexistence with ROM monitor (CygMon or GDB stubs) by
230
            only initializing interrupt vectors on startup, thus leaving
231
            exception handling to the ROM monitor."
232
    }
233
 
234
    cdl_option CYGSEM_HAL_ROM_MONITOR {
235
        display       "Behave as a ROM monitor"
236
        flavor        bool
237
        default_value 0
238
        parent        CYGPKG_HAL_ROM_MONITOR
239
        requires      { CYG_HAL_STARTUP == "ROM" }
240
        description   "
241
            Enable this option if this program is to be used as a ROM monitor,
242
            i.e. applications will be loaded into RAM on the board, and this
243
            ROM monitor may process exceptions or interrupts generated from the
244
            application. This enables features such as utilizing a separate
245
            interrupt stack when exceptions are generated."
246
    }
247
 
248
    cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
249
        display       "Redboot HAL options"
250
        flavor        none
251
        no_define
252
        parent        CYGPKG_REDBOOT
253
        active_if     CYGPKG_REDBOOT
254
        description   "
255
            This option lists the target's requirements for a valid Redboot
256
            configuration."
257
 
258
        cdl_option CYGBLD_BUILD_REDBOOT_BIN {
259
            display       "Build Redboot ROM binary image"
260
            active_if     CYGBLD_BUILD_REDBOOT
261
            default_value 1
262
            no_define
263
            description "This option enables the conversion of the Redboot ELF
264
                         image to a binary image suitable for ROM programming."
265
 
266
            compile -library=libextras.a
267
 
268
            make -priority 325 {
269
                /bin/redboot.srec : /bin/redboot.elf
270
                $(OBJCOPY) --strip-all $< $(@:.srec=.img)
271
                $(OBJCOPY) -O srec $< $@
272
            }
273
        }
274
    }
275
 
276
    cdl_option CYGHWR_HAL_OPENRISC_CPU_FREQ {
277
        display "CPU frequency"
278
        flavor  data
279
        legal_values 0 to 1000000
280
        default_value 50
281
        description "
282
           This option contains the frequency of the CPU in MegaHertz.
283
           Choose the frequency to match the processor you have. This
284
           may affect thing like serial device, interval clock and
285
           memory access speed settings."
286
    }
287
 
288
    cdl_option CYGHWR_MUL_IMPLEMENTED {
289
        display       "Hardware multiplier implemented"
290
        flavor        bool
291
        default_value 1
292
        description   "
293
            Select this option only if hardware multiplier is
294
            implemented."
295
    }
296
 
297
    cdl_option CYGHWR_DIV_IMPLEMENTED {
298
        display       "Hardware divisor implemented"
299
        flavor        bool
300
        default_value 1
301
        description   "
302
            Select this option only if hardware division is
303
            implemented."
304
    }
305
 
306
    cdl_option CYGHWR_FPU_IMPLEMENTED {
307
        display       "Hardware FPU implemented"
308
        flavor        bool
309
        default_value 0
310
        description   "
311
            Select this option only if FPU is implemented."
312
    }
313
 
314 838 skrzyp
    cdl_option CYGHWR_BRANCH_SLOT_IMPLEMENTED {
315
        display       "Branch slot implemented"
316
        flavor        bool
317
        default_value 1
318
        description   "
319
            Select this option if your implementation of OpenRISC
320
            has branch slot."
321
    }
322
 
323 791 skrzyp
    cdl_component CYGHWR_ICACHE_IMPLEMENTED {
324
        display       "Instruction cache implemented"
325
        flavor        bool
326
        default_value 1
327
        description   "
328
            Select this option only if instruction cache is
329
            implemented."
330
 
331
        cdl_option CYGHWR_ICACHE_SIZE {
332
            display       "Size of instruction cache"
333
            flavor        data
334
            legal_values  0x1000 0x2000 0x4000 0x8000
335
            default_value 0x2000
336
            description   "
337
                Size of the instruction cache. Default is 8kB."
338
        }
339
    }
340
 
341
    cdl_component CYGHWR_DCACHE_IMPLEMENTED {
342
        display       "Data cache implemented"
343
        flavor        bool
344
        default_value 1
345
        description   "
346
            Select this option only if data cache is
347
            implemented."
348
 
349
        cdl_option CYGHWR_DCACHE_SIZE {
350
            display       "Size of data cache"
351
            active_if     CYGHWR_DCACHE_IMPLEMENTED
352
            flavor        data
353
            legal_values  0x200 0x1000 0x2000 0x4000 0x8000
354
            default_value 0x1000
355
            description   "
356
                Size of the data cache. Default is 4kB."
357
        }
358
 
359
        cdl_option CYGHWR_DCACHE_MODE {
360
            display       "DATA cache mode"
361
            flavor        data
362
            legal_values  { "WRITETHROUGH" "WRITEBACK" }
363
            default_value { "WRITETHROUGH" }
364
            description   "
365
                Speficy synthesized cache."
366
        }
367
    }
368
 
369
 
370
 
371
    cdl_option CYGHWR_RAM_SIZE {
372
        display       "Size of RAM memory"
373
        flavor        data
374
        default_value 0x2000000
375
        description   "
376
            Size of RAM memory. This value is used to generate linker script.
377
            Default is 32MB."
378
    }
379
 
380
    cdl_option CYGHWR_ROM_SIZE {
381
        display       "Size of ROM memory"
382
        flavor        data
383
        default_value 0x40000
384
        description   "
385
            Size of ROM memory. This value is used to generate linker script.
386
            Default is 256kB."
387
    }
388
 
389 786 skrzyp
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {
390
        display       "Diagnostic serial port baud rate"
391
        flavor        data
392
        legal_values  9600 19200 38400 57600 115200 230400 460800 921600
393
        default_value 115200
394
        description   "
395
            This option selects the baud rate used for the diagnostic console.
396
            Note: this should match the value chosen for the GDB port if the
397
            diagnostic and GDB port are the same.
398
            Note: very high baud rates are useful during simulation."
399
    }
400
 
401
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {
402
        display       "GDB serial port baud rate"
403
        flavor        data
404
        legal_values  9600 19200 38400 57600 115200 230400 460800 921600
405
        default_value 115200
406
        description   "
407
            This option controls the baud rate used for the GDB connection.
408
            Note: very high baud rates are useful during simulation."
409
    }
410
 
411
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
412
        display      "Number of communication channels on the board"
413
        flavor       data
414
        default_value  1
415
    }
416
 
417
    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
418
        display          "Debug serial port"
419
        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
420
        flavor data
421
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
422
        default_value    0
423
        description      "
424
           The ORP platform has at least one serial port, but it can potentially have several.
425
           This option chooses which port will be used to connect to a host
426
           running GDB."
427
    }
428
 
429
     cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
430
        display          "Diagnostic serial port"
431
        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
432
        flavor data
433
        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
434
        default_value    0
435
        description      "
436
           The ORP platform has at least one serial port, but it can potentially have several.
437
           This option chooses which port will be used for diagnostic output."
438
     }
439
 
440
    define_proc {
441
        puts $cdl_header "#define CYGHWR_HAL_VSR_TABLE    0"
442
        puts $cdl_header "#define CYGHWR_HAL_VIRTUAL_VECTOR_TABLE 0xF00"
443
    }
444
}
445
 
446
# EOF hal_openrisc_orpsoc.cdl

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