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https://opencores.org/ocsvn/openverifla/openverifla/trunk
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laurentiud |
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// Data input width and indentical samples bits must be multiple of 8.
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parameter LA_DATA_INPUT_WORDLEN_BITS=16;
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// Trigger
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parameter LA_TRIGGER_VALUE=16'h0204,
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//16'h0200,
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//{LA_DATA_INPUT_WORDLEN_BITS{1'b0}},
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LA_TRIGGER_MASK=16'hffff,
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//16'hff00,
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//{{(LA_DATA_INPUT_WORDLEN_BITS - 10){1'b0}}, 2'b11, 8'h00},
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LA_TRACE_MASK=16'hffff;
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//16'hff00;
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//{LA_DATA_INPUT_WORDLEN_BITS{1'b1}};
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parameter LA_IDENTICAL_SAMPLES_BITS=8;
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parameter LA_MEM_WORDLEN_BITS=(LA_DATA_INPUT_WORDLEN_BITS+LA_IDENTICAL_SAMPLES_BITS);
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parameter LA_MEM_WORDLEN_OCTETS=((LA_MEM_WORDLEN_BITS+7)/8);
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parameter LA_MEM_ADDRESS_BITS=6;
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parameter LA_MEM_FIRST_ADDR=0,
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LA_MEM_LAST_ADDR=((1<<LA_MEM_ADDRESS_BITS)-1);
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parameter LA_BT_QUEUE_TAIL_ADDRESS=LA_MEM_LAST_ADDR;
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// constraint: (LA_MEM_FIRST_ADDR + 4) <= LA_TRIGGER_MATCH_MEM_ADDR <= (LA_MEM_LAST_ADDR - 4)
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parameter LA_TRIGGER_MATCH_MEM_ADDR=8, //((1 << LA_MEM_ADDRESS_BITS) >> 3),
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LA_MEM_LAST_ADDR_BEFORE_TRIGGER=(LA_TRIGGER_MATCH_MEM_ADDR-1);
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parameter LA_MAX_SAMPLES_AFTER_TRIGGER_BITS=26,
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LA_MAX_SAMPLES_AFTER_TRIGGER={1'b0, {(LA_MAX_SAMPLES_AFTER_TRIGGER_BITS-1){1'b1}}};
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// Identical samples
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parameter LA_MAX_IDENTICAL_SAMPLES=((1 << LA_IDENTICAL_SAMPLES_BITS) - 2);
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/*
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Reserved mem words:
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LA_MEM_EMPTY_SLOT which represents an empty and not used memory slot.
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*/
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parameter LA_MEM_EMPTY_SLOT={LA_MEM_WORDLEN_BITS{1'b0}};
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//`define DEBUG_LA
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