URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_40/] [or1ksim/] [AUTHORS] - Blame information for rev 1765

Details | Compare with Previous | View Log


 
Authors of the OpenRISC 1000 architectural simulator
====================================================
 
Damjan Lampret, 
  Original author of the simulator.
 
Johan Rydberg, 
  Added support for GNU readline aswell as adopted
  it to GNU autoconf and automake.
 
Jimmy Chen-Min Chen, 
  Defined and Added support for OR16 ISA(cpu/or16).
  05/04/2000
 
Richard Prescott, 
  Added channels for peripheral to communicate with host

Line No.	Rev	Author	Line
1	15	jrydberg
2			`Authors of the OpenRISC 1000 architectural simulator`
3			`====================================================`
4
5			`Damjan Lampret,`
6			`Original author of the simulator.`
7
8			`Johan Rydberg,`
9			`Added support for GNU readline aswell as adopted`
10			`it to GNU autoconf and automake.`
11
12	21	cmchen	`Jimmy Chen-Min Chen,`
13			`Defined and Added support for OR16 ISA(cpu/or16).`
14			`05/04/2000`
15	1072	rprescott
16			`Richard Prescott,`
17			`Added channels for peripheral to communicate with host`

Browse

Tools

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_40/] [or1ksim/] [AUTHORS] - Blame information for rev 1765