OpenCores
URL https://opencores.org/ocsvn/pavr/pavr/trunk

Subversion Repositories pavr

[/] [pavr/] [trunk/] [src/] [pavr_constants.vhd] - Blame information for rev 6

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 doru
-- <File header>
2
-- Project
3
--    pAVR (pipelined AVR) is an 8 bit RISC controller, compatible with Atmel's
4
--    AVR core, but about 3x faster in terms of both clock frequency and MIPS.
5
--    The increase in speed comes from a relatively deep pipeline. The original
6
--    AVR core has only two pipeline stages (fetch and execute), while pAVR has
7
--    6 pipeline stages:
8
--       1. PM    (read Program Memory)
9
--       2. INSTR (load Instruction)
10
--       3. RFRD  (decode Instruction and read Register File)
11
--       4. OPS   (load Operands)
12
--       5. ALU   (execute ALU opcode or access Unified Memory)
13
--       6. RFWR  (write Register File)
14
-- Version
15
--    0.32
16
-- Date
17
--    2002 August 07
18
-- Author
19
--    Doru Cuturela, doruu@yahoo.com
20
-- License
21
--    This program is free software; you can redistribute it and/or modify
22
--    it under the terms of the GNU General Public License as published by
23
--    the Free Software Foundation; either version 2 of the License, or
24
--    (at your option) any later version.
25
--    This program is distributed in the hope that it will be useful,
26
--    but WITHOUT ANY WARRANTY; without even the implied warranty of
27
--    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
28
--    GNU General Public License for more details.
29
--    You should have received a copy of the GNU General Public License
30
--    along with this program; if not, write to the Free Software
31
--    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
32
-- </File header>
33
 
34
 
35
 
36
-- <File info>
37
-- This file defines the constants needed by pAVR.
38
-- When costumizing pAVR, modify model-specific settings.
39
-- However, don't touch family-specific settings.
40
-- </File info>
41
 
42
 
43
 
44
-- <File body>
45
library work;
46
use work.std_util.all;
47
use work.pavr_util.all;
48
library ieee;
49
use ieee.std_logic_1164.all;
50
 
51
 
52
 
53
package pavr_constants is
54
 
55
   ----------------------------------------------------------------------------
56
   -- Controller model-specific settings. Modify here to costumize pAVR.
57
 
58
 
59
 
60
   -- Data memory RAM-related constants. Take care, these must be self-consistent.
61
   -- Data memory length and address width
62
   constant pavr_dm_len    : natural := 4096;
63
   constant pavr_dm_addr_w : natural := 12;
64
 
65
   -- Is data memory bigger than  256 bytes? (to be corellated with the
66
   --    above) We need this to know whether to update both bytes of pointer
67
   --    registers, or only the low byte, in loads/stores with pre/post
68
   --    de/increment.
69
   -- This is basically a boolean (=1 -> true; =0 -> false).
70
   constant pavr_dm_bigger_than_256: std_logic := '1';
71
 
72
   -- Is data memory bigger than 64KB? (to be corellated with the above) We need
73
   --    this to know whether if to make use of data ramp registers or not. That
74
   --    is, ramp registers RAMPX, RAMPY and RAMPZ.
75
   constant pavr_dm_bigger_than_64K: std_logic := '0';
76
 
77
 
78
 
79
   -- Program memory-related constants
80
   -- Is program memory bigger than 64KB? We need this to know whether or not to
81
   --    make use of ramp registers when accessing the Program Memory. These
82
   --    registers are: ramp register EIND (for instructions EICALL and EIJMP)
83
   --    and RAMPZ (for instruction ELPM).
84
   constant pavr_pm_bigger_than_64K: std_logic := '1';
85
 
86
 
87
 
88
   -- IOF registers addresses
89
   -- Kernel registers
90
   constant pavr_sreg_addr    : natural := 16#3F#;
91
   constant pavr_sph_addr     : natural := 16#3E#;
92
   constant pavr_spl_addr     : natural := 16#3D#;
93
   constant pavr_rampx_addr   : natural := 16#39#;
94
   constant pavr_rampy_addr   : natural := 16#3a#;
95
   constant pavr_rampz_addr   : natural := 16#3b#;
96
   constant pavr_rampd_addr   : natural := 16#30#;
97
   constant pavr_eind_addr    : natural := 16#31#;
98
 
99
   -- Feature registers
100
   -- Microcontroller control
101
   constant pavr_mcucr_addr   : natural := 16#35#;
102
   -- General interrupt mask
103
   constant pavr_gimsk_addr   : natural := 16#34#;
104
   -- General interrupt flags
105
   constant pavr_gifr_addr    : natural := 16#38#;
106
   -- Timer 0
107
   constant pavr_tcnt0_addr   : natural := 16#32#;
108
   constant pavr_tccr0_addr   : natural := 16#33#;
109
   constant pavr_tifr_addr    : natural := 16#36#;
110
   constant pavr_timsk_addr   : natural := 16#37#;
111
   -- Port A
112
   constant pavr_porta_addr   : natural := 16#1B#;
113
   constant pavr_ddra_addr    : natural := 16#1A#;
114
   constant pavr_pina_addr    : natural := 16#19#;
115
 
116
 
117
 
118
   -- Interrupt priorities
119
   constant pavr_int0_int_pri:   natural := 16#05#;
120
   constant pavr_tov0_int_pri:   natural := 16#09#;
121
 
122
 
123
 
124
   -- Interrupt vectors
125
   -- These can be anywhere in the 22 bit wide addressing space.
126
   constant pavr_int0_int_vec:   natural := 16#000001#;
127
   constant pavr_tov0_int_vec:   natural := 16#000006#;
128
 
129
 
130
 
131
   ----------------------------------------------------------------------------
132
   -- Family-specific settings. That is, don't touch.
133
 
134
   -- ALU
135
   constant pavr_alu_opcode_w          : natural := 5;
136
      constant pavr_alu_opcode_nop        : natural :=  0;
137
      constant pavr_alu_opcode_op1        : natural :=  1;
138
      constant pavr_alu_opcode_op2        : natural :=  2;
139
      constant pavr_alu_opcode_add8       : natural :=  3;
140
      constant pavr_alu_opcode_adc8       : natural :=  4;
141
      constant pavr_alu_opcode_sub8       : natural :=  5;
142
      constant pavr_alu_opcode_sbc8       : natural :=  6;
143
      constant pavr_alu_opcode_and8       : natural :=  7;
144
      constant pavr_alu_opcode_eor8       : natural :=  8;
145
      constant pavr_alu_opcode_or8        : natural :=  9;
146
      constant pavr_alu_opcode_inc8       : natural := 10;
147
      constant pavr_alu_opcode_dec8       : natural := 11;
148
      constant pavr_alu_opcode_com8       : natural := 12;
149
      constant pavr_alu_opcode_neg8       : natural := 13;
150
      constant pavr_alu_opcode_swap8      : natural := 14;
151
      constant pavr_alu_opcode_lsr8       : natural := 15;
152
      constant pavr_alu_opcode_asr8       : natural := 16;
153
      constant pavr_alu_opcode_ror8       : natural := 17;
154
      constant pavr_alu_opcode_add16      : natural := 18;
155
      constant pavr_alu_opcode_sub16      : natural := 19;
156
      constant pavr_alu_opcode_mul8       : natural := 20;
157
      constant pavr_alu_opcode_muls8      : natural := 21;
158
      constant pavr_alu_opcode_mulsu8     : natural := 22;
159
      constant pavr_alu_opcode_fmul8      : natural := 23;
160
      constant pavr_alu_opcode_fmuls8     : natural := 24;
161
      constant pavr_alu_opcode_fmulsu8    : natural := 25;
162
   -- Select operand 1's higher 8 bits source.
163
   constant pavr_alu_op1_hi8_sel_w           : natural := 1;
164
      constant pavr_alu_op1_hi8_sel_zero        : std_logic := '0';
165
      constant pavr_alu_op1_hi8_sel_op1bpu      : std_logic := '1';
166
   -- Select operand 2's source.
167
   constant pavr_alu_op2_sel_w            : natural := 2;
168
      constant pavr_alu_op2_sel_op2bpu       : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "00";
169
      constant pavr_alu_op2_sel_k8           : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "01";
170
      constant pavr_alu_op2_sel_1            : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "10";
171
      constant pavr_alu_op2_sel_minus1       : std_logic_vector(pavr_alu_op2_sel_w - 1 downto 0) := "11";
172
   -- Flags
173
   constant pavr_alu_h_sel_w        : natural := 2;
174
     constant pavr_alu_h_sel_same      : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "00";
175
     constant pavr_alu_h_sel_add8      : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "01";
176
     constant pavr_alu_h_sel_sub8      : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "10";
177
     constant pavr_alu_h_sel_neg8      : std_logic_vector(pavr_alu_h_sel_w - 1 downto 0) := "11";
178
   constant pavr_alu_s_sel_w        : natural := 1;
179
      constant pavr_alu_s_sel_same     : std_logic := '0';
180
      constant pavr_alu_s_sel_nxorv    : std_logic := '1';
181
   constant pavr_alu_v_sel_w        : natural := 4;
182
     constant pavr_alu_v_sel_same      : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0000";
183
     constant pavr_alu_v_sel_add8      : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0001";
184
     constant pavr_alu_v_sel_sub8      : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0010";
185
     constant pavr_alu_v_sel_z         : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0011";
186
     constant pavr_alu_v_sel_inc8      : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0100";
187
     constant pavr_alu_v_sel_dec8      : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0101";
188
     constant pavr_alu_v_sel_neg8      : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0110";
189
     constant pavr_alu_v_sel_nxorc     : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "0111";
190
     constant pavr_alu_v_sel_add16     : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "1000";
191
     constant pavr_alu_v_sel_sub16     : std_logic_vector(pavr_alu_v_sel_w - 1 downto 0) := "1001";
192
   constant pavr_alu_n_sel_w        : natural := 2;
193
     constant pavr_alu_n_sel_same      : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "00";
194
     constant pavr_alu_n_sel_msb8      : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "01";
195
     constant pavr_alu_n_sel_z         : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "10";
196
     constant pavr_alu_n_sel_msb16     : std_logic_vector(pavr_alu_n_sel_w - 1 downto 0) := "11";
197
   constant pavr_alu_z_sel_w        : natural := 2;
198
      constant pavr_alu_z_sel_same     : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "00";
199
      constant pavr_alu_z_sel_z8       : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "01";
200
      constant pavr_alu_z_sel_z8c      : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "10";
201
      constant pavr_alu_z_sel_z16      : std_logic_vector(pavr_alu_z_sel_w - 1 downto 0) := "11";
202
   constant pavr_alu_c_sel_w        : natural := 3;
203
      constant pavr_alu_c_sel_same     : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "000";
204
      constant pavr_alu_c_sel_add8     : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "001";
205
      constant pavr_alu_c_sel_sub8     : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "010";
206
      constant pavr_alu_c_sel_one      : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "011";
207
      constant pavr_alu_c_sel_neg8     : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "100";
208
      constant pavr_alu_c_sel_lsbop1   : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "101";
209
      constant pavr_alu_c_sel_add16    : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "110";
210
      constant pavr_alu_c_sel_sub16    : std_logic_vector(pavr_alu_c_sel_w - 1 downto 0) := "111";
211
 
212
   -- IOF
213
   constant pavr_iof_opcode_w          : natural := 3;
214
      constant pavr_iof_opcode_nop        : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "000";
215
      constant pavr_iof_opcode_rdbyte     : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "001";
216
      constant pavr_iof_opcode_wrbyte     : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "010";
217
      constant pavr_iof_opcode_clrbit     : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "011";
218
      constant pavr_iof_opcode_setbit     : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "100";
219
      constant pavr_iof_opcode_ldbit      : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "101";
220
      constant pavr_iof_opcode_stbit      : std_logic_vector(pavr_iof_opcode_w - 1 downto 0) := "110";
221
 
222
   -- DACU
223
   constant pavr_dacudo_sel_w             : natural := 2;
224
      constant pavr_dacudo_sel_rfrd1do       : std_logic_vector(pavr_dacudo_sel_w - 1 downto 0) := "00";
225
      constant pavr_dacudo_sel_iofdo         : std_logic_vector(pavr_dacudo_sel_w - 1 downto 0) := "01";
226
      constant pavr_dacudo_sel_dmdo          : std_logic_vector(pavr_dacudo_sel_w - 1 downto 0) := "10";
227
   constant pavr_dacu_device_sel_w        : natural := 2;
228
     constant pavr_dacu_device_sel_rf        : std_logic_vector(pavr_dacu_device_sel_w - 1 downto 0) := "00";
229
     constant pavr_dacu_device_sel_iof       : std_logic_vector(pavr_dacu_device_sel_w - 1 downto 0) := "01";
230
     constant pavr_dacu_device_sel_dm        : std_logic_vector(pavr_dacu_device_sel_w - 1 downto 0) := "10";
231
 
232
   -- PM
233
   constant pavr_pc_sel_w        : natural := 1;
234
      constant pavr_pc_sel_same     : std_logic := '0';
235
      constant pavr_pc_sel_inc      : std_logic := '1';
236
 
237
   -- SFU
238
   constant pavr_s5_skip_cond_sel_w             : natural := 2;
239
      constant pavr_s5_skip_cond_sel_zflag         : std_logic_vector(pavr_s5_skip_cond_sel_w - 1 downto 0) := "00";
240
      constant pavr_s5_skip_cond_sel_bitrf         : std_logic_vector(pavr_s5_skip_cond_sel_w - 1 downto 0) := "01";
241
      constant pavr_s5_skip_cond_sel_notbitrf      : std_logic_vector(pavr_s5_skip_cond_sel_w - 1 downto 0) := "10";
242
   constant pavr_s6_skip_cond_sel_w             : natural := 1;
243
      constant pavr_s6_skip_cond_sel_bitiof        : std_logic := '0';
244
      constant pavr_s6_skip_cond_sel_notbitiof     : std_logic := '1';
245
   constant pavr_s5_skip_bitrf_sel_w      : natural := 3;
246
   constant pavr_s6_skip_bitiof_sel_w     : natural := 3;
247
   constant pavr_s5_branch_cond_sel_w              : natural := 1;
248
      constant pavr_s5_branch_cond_sel_bitsreg        : std_logic := '0';
249
      constant pavr_s5_branch_cond_sel_notbitsreg     : std_logic := '1';
250
 
251
end;
252
-- </File body>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.