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[/] [pavr/] [trunk/] [test/] [gentest/] [m103def.inc] - Blame information for rev 6

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;***************************************************************************
;* A P P L I C A T I O N   N O T E   F O R   T H E   A V R   F A M I L Y
;*
;* Number               :AVR000
;* File Name            :"m103def.inc"
;* Title                :Register/Bit Definitions for the ATmega103
;* Date                 :99.01.28
;* Version              :1.30
;* Support telephone    :+47 72 88 43 88 (ATMEL Norway)
;* Support fax          :+47 72 88 43 99 (ATMEL Norway)
;* Support E-mail       :avr@atmel.com
;* Target MCU           :ATmega103
;*
;* DESCRIPTION
;* When including this file in the assembly program file, all I/O register
;* names and I/O register bit names appearing in the data book can be used.
;* In addition, the six registers forming the three data pointers X, Y and
;* Z have been assigned names XL - ZH. Highest RAM address for Internal
;* SRAM is also defined
;*
;* The Register names are represented by their hexadecimal address.
;*
;* The Register Bit names are represented by their bit number (0-7).
;*
;* Please observe the difference in using the bit names with instructions
;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
;* (skip if bit in register set/cleared). The following example illustrates
;* this:
;*
;* in   r16,PORTB               ;read PORTB latch
;* sbr  r16,(1<
;* out  PORTB,r16               ;output to PORTB
;*
;* in   r16,TIFR                ;read the Timer Interrupt Flag Register
;* sbrc r16,TOV0                ;test the overflow flag (use bit#)
;* rjmp TOV0_is_set             ;jump if set
;* ...                          ;otherwise do something else
;***************************************************************************
 
;***** Specify Device
.device ATmega103
 
;***** I/O Register Definitions
.equ    SREG    =$3f
.equ    SPH     =$3e
.equ    SPL     =$3d
.equ    XDIV    =$3c
.equ    RAMPZ   =$3b
.equ    EICR    =$3a
.equ    EIMSK   =$39
.equ    EIFR    =$38
.equ    TIMSK   =$37
.equ    TIFR    =$36
.equ    MCUCR   =$35
.equ    MCUSR   =$34
 
.equ    TCCR0   =$33
.equ    TCNT0   =$32
.equ    OCR0    =$31
.equ    ASSR0   =$30
 
.equ    TCCR1A  =$2f
.equ    TCCR1B  =$2e
.equ    TCNT1H  =$2d
.equ    TCNT1L  =$2c
.equ    OCR1AH  =$2b
.equ    OCR1AL  =$2a
.equ    OCR1BH  =$29
.equ    OCR1BL  =$28
.equ    ICR1H   =$27
.equ    ICR1L   =$26
 
.equ    TCCR2   =$25
.equ    TCNT2   =$24
.equ    OCR2    =$23
.equ    WDTCR   =$21
 
.equ    EEARH   =$1f
.equ    EEARL   =$1e
.equ    EEDR    =$1d
.equ    EECR    =$1c
 
.equ    PORTA   =$1b
.equ    DDRA    =$1a
.equ    PINA    =$19
.equ    PORTB   =$18
.equ    DDRB    =$17
.equ    PINB    =$16
.equ    PORTC   =$15
.equ    PORTD   =$12
.equ    DDRD    =$11
.equ    PIND    =$10
 
.equ    SPDR    =$0f
.equ    SPSR    =$0e
.equ    SPCR    =$0d
.equ    UDR     =$0c
.equ    USR     =$0b
.equ    UCR     =$0a
.equ    UBRR    =$09
.equ    ACSR    =$08
.equ    ADMUX   =$07
.equ    ADCSR   =$06
.equ    ADCH    =$05
.equ    ADCL    =$04
.equ    PORTE   =$03
.equ    DDRE    =$02
.equ    PINE    =$01
.equ    PINF    =$00
 
;***** Bit Definitions
 
.equ    RAMPZ0  =0
 
.equ    SRE     =7
.equ    SRW     =6
.equ    SE      =5
.equ    SM1     =4
.equ    SM0     =3
 
.equ    XDIVEN  =7
.equ    XDIV6   =6
.equ    XDIV5   =5
.equ    XDIV4   =4
.equ    XDIV3   =3
.equ    XDIV2   =2
.equ    XDIV1   =1
.equ    XDIV0   =0
 
.equ    EXTRF   =1
.equ    PORF    =0
 
.equ    INT7    =7
.equ    INT6    =6
.equ    INT5    =5
.equ    INT4    =4
.equ    INT3    =3
.equ    INT2    =2
.equ    INT1    =1
.equ    INT0    =0
 
.equ    INTF7   =7
.equ    INTF6   =6
.equ    INTF5   =5
.equ    INTF4   =4
 
.equ    ISC71   =7
.equ    ISC70   =6
.equ    ISC61   =5
.equ    ISC60   =4
.equ    ISC51   =3
.equ    ISC50   =2
.equ    ISC41   =1
.equ    ISC40   =0
 
.equ    OCIE2   =7
.equ    TOIE2   =6
.equ    TICIE1  =5
.equ    OCIE1A  =4
.equ    OCIE1B  =3
.equ    TOIE1   =2
.equ    OCIE0   =1
.equ    TOIE0   =0
 
.equ    OCF2    =7
.equ    TOV2    =6
.equ    ICF1    =5
.equ    OCF1A   =4
.equ    OCF1B   =3
.equ    TOV1    =2
.equ    OCF0    =1
.equ    TOV0    =0
 
.equ    PWM0    =6
.equ    COM01   =5
.equ    COM00   =4
.equ    CTC0    =3
.equ    CS02    =2
.equ    CS01    =1
.equ    CS00    =0
 
.equ    PWM2    =6
.equ    COM21   =5
.equ    COM20   =4
.equ    CTC2    =3
.equ    CS22    =2
.equ    CS21    =1
.equ    CS20    =0
 
.equ    AS0     =3
.equ    TCN0UB  =2
.equ    OCR0UB  =1
.equ    TCR0UB  =0
 
.equ    COM1A1  =7
.equ    COM1A0  =6
.equ    COM1B1  =5
.equ    COM1B0  =4
.equ    PWM11   =1
.equ    PWM10   =0
 
.equ    ICNC1   =7
.equ    ICES1   =6
.equ    CTC1    =3
.equ    CS12    =2
.equ    CS11    =1
.equ    CS10    =0
 
.equ    WDTOE   =4
.equ    WDE     =3
.equ    WDP2    =2
.equ    WDP1    =1
.equ    WDP0    =0
 
.equ    EERIE   =3
.equ    EEMWE   =2
.equ    EEWE    =1
.equ    EERE    =0
 
.equ    PA7     =7
.equ    PA6     =6
.equ    PA5     =5
.equ    PA4     =4
.equ    PA3     =3
.equ    PA2     =2
.equ    PA1     =1
.equ    PA0     =0
 
.equ    PINA7   =7
.equ    PINA6   =6
.equ    PINA5   =5
.equ    PINA4   =4
.equ    PINA3   =3
.equ    PINA2   =2
.equ    PINA1   =1
.equ    PINA0   =0
 
.equ    DDA7    =7
.equ    DDA6    =6
.equ    DDA5    =5
.equ    DDA4    =4
.equ    DDA3    =3
.equ    DDA2    =2
.equ    DDA1    =1
.equ    DDA0    =0
 
.equ    PB7     =7
.equ    PB6     =6
.equ    PB5     =5
.equ    PB4     =4
.equ    PB3     =3
.equ    PB2     =2
.equ    PB1     =1
.equ    PB0     =0
 
.equ    DDB7    =7
.equ    DDB6    =6
.equ    DDB5    =5
.equ    DDB4    =4
.equ    DDB3    =3
.equ    DDB2    =2
.equ    DDB1    =1
.equ    DDB0    =0
 
.equ    PINB7   =7
.equ    PINB6   =6
.equ    PINB5   =5
.equ    PINB4   =4
.equ    PINB3   =3
.equ    PINB2   =2
.equ    PINB1   =1
.equ    PINB0   =0
 
.equ    PC7     =7
.equ    PC6     =6
.equ    PC5     =5
.equ    PC4     =4
.equ    PC3     =3
.equ    PC2     =2
.equ    PC1     =1
.equ    PC0     =0
 
.equ    PD7     =7
.equ    PD6     =6
.equ    PD5     =5
.equ    PD4     =4
.equ    PD3     =3
.equ    PD2     =2
.equ    PD1     =1
.equ    PD0     =0
 
.equ    DDD7    =7
.equ    DDD6    =6
.equ    DDD5    =5
.equ    DDD4    =4
.equ    DDD3    =3
.equ    DDD2    =2
.equ    DDD1    =1
.equ    DDD0    =0
 
.equ    PIND7   =7
.equ    PIND6   =6
.equ    PIND5   =5
.equ    PIND4   =4
.equ    PIND3   =3
.equ    PIND2   =2
.equ    PIND1   =1
.equ    PIND0   =0
 
.equ    PE7     =7
.equ    PE6     =6
.equ    PE5     =5
.equ    PE4     =4
.equ    PE3     =3
.equ    PE2     =2
.equ    PE1     =1
.equ    PE0     =0
 
.equ    DDE7    =7
.equ    DDE6    =6
.equ    DDE5    =5
.equ    DDE4    =4
.equ    DDE3    =3
.equ    DDE2    =2
.equ    DDE1    =1
.equ    DDE0    =0
 
.equ    PINE7   =7
.equ    PINE6   =6
.equ    PINE5   =5
.equ    PINE4   =4
.equ    PINE3   =3
.equ    PINE2   =2
.equ    PINE1   =1
.equ    PINE0   =0
 
.Equ    PINF7   =7
.Equ    PINF6   =6
.Equ    PINF5   =5
.Equ    PINF4   =4
.Equ    PINF3   =3
.Equ    PINF2   =2
.Equ    PINF1   =1
.Equ    PINF0   =0
 
.equ    SPIE    =7
.equ    SPE     =6
.equ    DORD    =5
.equ    MSTR    =4
.equ    CPOL    =3
.equ    CPHA    =2
.equ    SPR1    =1
.equ    SPR0    =0
 
.equ    SPIF    =7
.equ    WCOL    =6
 
.equ    RXC     =7
.equ    TXC     =6
.equ    UDRE    =5
.equ    FE      =4
.equ    OR      =3
 
.equ    RXCIE   =7
.equ    TXCIE   =6
.equ    UDRIE   =5
.equ    RXEN    =4
.equ    TXEN    =3
.equ    CHR9    =2
.equ    RXB8    =1
.equ    TXB8    =0
 
.equ    ACD     =7
.equ    ACO     =5
.equ    ACI     =4
.equ    ACIE    =3
.equ    ACIC    =2
.equ    ACIS1   =1
.equ    ACIS0   =0
 
.equ    ADEN    =7
.equ    ADSC    =6
.equ    ADFR    =5
.equ    ADIF    =4
.equ    ADIE    =3
.equ    ADPS2   =2
.equ    ADPS1   =1
.equ    ADPS0   =0
 
.equ    MUX2    =2
.equ    MUX1    =1
.equ    MUX0    =0
 
.def    XL      =r26
.def    XH      =r27
.def    YL      =r28
.def    YH      =r29
.def    ZL      =r30
.def    ZH      =r31
 
.equ    RAMEND  =$0FFF  ;Last On-Chip SRAM Location
.equ    XRAMEND =$FFFF
.equ    E2END   =$0FFF
.equ    FLASHEND=$FFFF
 
.equ    INT0addr=$002   ;External Interrupt0 Vector Address
.equ    INT1addr=$004   ;External Interrupt1 Vector Address
.equ    INT2addr=$006   ;External Interrupt2 Vector Address
.equ    INT3addr=$008   ;External Interrupt3 Vector Address
.equ    INT4addr=$00a   ;External Interrupt4 Vector Address
.equ    INT5addr=$00c   ;External Interrupt5 Vector Address
.equ    INT6addr=$00e   ;External Interrupt6 Vector Address
.equ    INT7addr=$010   ;External Interrupt7 Vector Address
.equ    OC2addr =$012   ;Output Compare2 Interrupt Vector Address
.equ    OVF2addr=$014   ;Overflow2 Interrupt Vector Address
.equ    ICP1addr=$016   ;Input Capture1 Interrupt Vector Address
.equ    OC1Aaddr=$018   ;Output Compare1A Interrupt Vector Address
.equ    OC1Baddr=$01a   ;Output Compare1B Interrupt Vector Address
.equ    OVF1addr=$01c   ;Overflow1 Interrupt Vector Address
.equ    OC0addr =$01e   ;Output Compare0 Interrupt Vector Address
.equ    OVF0addr=$020   ;Overflow0 Interrupt Vector Address
.equ    SPIaddr =$022   ;SPI Interrupt Vector Address
.equ    URXCaddr=$024   ;UART Receive Complete Interrupt Vector Address
.equ    UDREaddr=$026   ;UART Data Register Empty Interrupt Vector Address
.equ    UTXCaddr=$028   ;UART Transmit Complete Interrupt Vector Address
.equ    ADCCaddr=$02a   ;ADC Conversion Complete Handle
.equ    EEWRaddr=$02c   ;EEPROM Write Complete Handle
.equ    ACIaddr =$02e   ;Analog Comparator Interrupt Vector Address
 

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[/] [pavr/] [trunk/] [test/] [gentest/] [m103def.inc] - Blame information for rev 6

Line No.	Rev	Author	Line
1	4	doru	`;***************************************************************************`
2			`;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y`
3			`;*`
4			`;* Number :AVR000`
5			`;* File Name :"m103def.inc"`
6			`;* Title :Register/Bit Definitions for the ATmega103`
7			`;* Date :99.01.28`
8			`;* Version :1.30`
9			`;* Support telephone :+47 72 88 43 88 (ATMEL Norway)`
10			`;* Support fax :+47 72 88 43 99 (ATMEL Norway)`
11			`;* Support E-mail :avr@atmel.com`
12			`;* Target MCU :ATmega103`
13			`;*`
14			`;* DESCRIPTION`
15			`;* When including this file in the assembly program file, all I/O register`
16			`;* names and I/O register bit names appearing in the data book can be used.`
17			`;* In addition, the six registers forming the three data pointers X, Y and`
18			`;* Z have been assigned names XL - ZH. Highest RAM address for Internal`
19			`;* SRAM is also defined`
20			`;*`
21			`;* The Register names are represented by their hexadecimal address.`
22			`;*`
23			`;* The Register Bit names are represented by their bit number (0-7).`
24			`;*`
25			`;* Please observe the difference in using the bit names with instructions`
26			`;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"`
27			`;* (skip if bit in register set/cleared). The following example illustrates`
28			`;* this:`
29			`;*`
30			`;* in r16,PORTB ;read PORTB latch`
31			`;* sbr r16,(1<`
32			`;* out PORTB,r16 ;output to PORTB`
33			`;*`
34			`;* in r16,TIFR ;read the Timer Interrupt Flag Register`
35			`;* sbrc r16,TOV0 ;test the overflow flag (use bit#)`
36			`;* rjmp TOV0_is_set ;jump if set`
37			`;* ... ;otherwise do something else`
38			`;***************************************************************************`
39
40			`;***** Specify Device`
41			`.device ATmega103`
42
43			`;***** I/O Register Definitions`
44			`.equ SREG =$3f`
45			`.equ SPH =$3e`
46			`.equ SPL =$3d`
47			`.equ XDIV =$3c`
48			`.equ RAMPZ =$3b`
49			`.equ EICR =$3a`
50			`.equ EIMSK =$39`
51			`.equ EIFR =$38`
52			`.equ TIMSK =$37`
53			`.equ TIFR =$36`
54			`.equ MCUCR =$35`
55			`.equ MCUSR =$34`
56
57			`.equ TCCR0 =$33`
58			`.equ TCNT0 =$32`
59			`.equ OCR0 =$31`
60			`.equ ASSR0 =$30`
61
62			`.equ TCCR1A =$2f`
63			`.equ TCCR1B =$2e`
64			`.equ TCNT1H =$2d`
65			`.equ TCNT1L =$2c`
66			`.equ OCR1AH =$2b`
67			`.equ OCR1AL =$2a`
68			`.equ OCR1BH =$29`
69			`.equ OCR1BL =$28`
70			`.equ ICR1H =$27`
71			`.equ ICR1L =$26`
72
73			`.equ TCCR2 =$25`
74			`.equ TCNT2 =$24`
75			`.equ OCR2 =$23`
76			`.equ WDTCR =$21`
77
78			`.equ EEARH =$1f`
79			`.equ EEARL =$1e`
80			`.equ EEDR =$1d`
81			`.equ EECR =$1c`
82
83			`.equ PORTA =$1b`
84			`.equ DDRA =$1a`
85			`.equ PINA =$19`
86			`.equ PORTB =$18`
87			`.equ DDRB =$17`
88			`.equ PINB =$16`
89			`.equ PORTC =$15`
90			`.equ PORTD =$12`
91			`.equ DDRD =$11`
92			`.equ PIND =$10`
93
94			`.equ SPDR =$0f`
95			`.equ SPSR =$0e`
96			`.equ SPCR =$0d`
97			`.equ UDR =$0c`
98			`.equ USR =$0b`
99			`.equ UCR =$0a`
100			`.equ UBRR =$09`
101			`.equ ACSR =$08`
102			`.equ ADMUX =$07`
103			`.equ ADCSR =$06`
104			`.equ ADCH =$05`
105			`.equ ADCL =$04`
106			`.equ PORTE =$03`
107			`.equ DDRE =$02`
108			`.equ PINE =$01`
109			`.equ PINF =$00`
110
111			`;***** Bit Definitions`
112
113			`.equ RAMPZ0 =0`
114
115			`.equ SRE =7`
116			`.equ SRW =6`
117			`.equ SE =5`
118			`.equ SM1 =4`
119			`.equ SM0 =3`
120
121			`.equ XDIVEN =7`
122			`.equ XDIV6 =6`
123			`.equ XDIV5 =5`
124			`.equ XDIV4 =4`
125			`.equ XDIV3 =3`
126			`.equ XDIV2 =2`
127			`.equ XDIV1 =1`
128			`.equ XDIV0 =0`
129
130			`.equ EXTRF =1`
131			`.equ PORF =0`
132
133			`.equ INT7 =7`
134			`.equ INT6 =6`
135			`.equ INT5 =5`
136			`.equ INT4 =4`
137			`.equ INT3 =3`
138			`.equ INT2 =2`
139			`.equ INT1 =1`
140			`.equ INT0 =0`
141
142			`.equ INTF7 =7`
143			`.equ INTF6 =6`
144			`.equ INTF5 =5`
145			`.equ INTF4 =4`
146
147			`.equ ISC71 =7`
148			`.equ ISC70 =6`
149			`.equ ISC61 =5`
150			`.equ ISC60 =4`
151			`.equ ISC51 =3`
152			`.equ ISC50 =2`
153			`.equ ISC41 =1`
154			`.equ ISC40 =0`
155
156			`.equ OCIE2 =7`
157			`.equ TOIE2 =6`
158			`.equ TICIE1 =5`
159			`.equ OCIE1A =4`
160			`.equ OCIE1B =3`
161			`.equ TOIE1 =2`
162			`.equ OCIE0 =1`
163			`.equ TOIE0 =0`
164
165			`.equ OCF2 =7`
166			`.equ TOV2 =6`
167			`.equ ICF1 =5`
168			`.equ OCF1A =4`
169			`.equ OCF1B =3`
170			`.equ TOV1 =2`
171			`.equ OCF0 =1`
172			`.equ TOV0 =0`
173
174			`.equ PWM0 =6`
175			`.equ COM01 =5`
176			`.equ COM00 =4`
177			`.equ CTC0 =3`
178			`.equ CS02 =2`
179			`.equ CS01 =1`
180			`.equ CS00 =0`
181
182			`.equ PWM2 =6`
183			`.equ COM21 =5`
184			`.equ COM20 =4`
185			`.equ CTC2 =3`
186			`.equ CS22 =2`
187			`.equ CS21 =1`
188			`.equ CS20 =0`
189
190			`.equ AS0 =3`
191			`.equ TCN0UB =2`
192			`.equ OCR0UB =1`
193			`.equ TCR0UB =0`
194
195			`.equ COM1A1 =7`
196			`.equ COM1A0 =6`
197			`.equ COM1B1 =5`
198			`.equ COM1B0 =4`
199			`.equ PWM11 =1`
200			`.equ PWM10 =0`
201
202			`.equ ICNC1 =7`
203			`.equ ICES1 =6`
204			`.equ CTC1 =3`
205			`.equ CS12 =2`
206			`.equ CS11 =1`
207			`.equ CS10 =0`
208
209			`.equ WDTOE =4`
210			`.equ WDE =3`
211			`.equ WDP2 =2`
212			`.equ WDP1 =1`
213			`.equ WDP0 =0`
214
215			`.equ EERIE =3`
216			`.equ EEMWE =2`
217			`.equ EEWE =1`
218			`.equ EERE =0`
219
220			`.equ PA7 =7`
221			`.equ PA6 =6`
222			`.equ PA5 =5`
223			`.equ PA4 =4`
224			`.equ PA3 =3`
225			`.equ PA2 =2`
226			`.equ PA1 =1`
227			`.equ PA0 =0`
228
229			`.equ PINA7 =7`
230			`.equ PINA6 =6`
231			`.equ PINA5 =5`
232			`.equ PINA4 =4`
233			`.equ PINA3 =3`
234			`.equ PINA2 =2`
235			`.equ PINA1 =1`
236			`.equ PINA0 =0`
237
238			`.equ DDA7 =7`
239			`.equ DDA6 =6`
240			`.equ DDA5 =5`
241			`.equ DDA4 =4`
242			`.equ DDA3 =3`
243			`.equ DDA2 =2`
244			`.equ DDA1 =1`
245			`.equ DDA0 =0`
246
247			`.equ PB7 =7`
248			`.equ PB6 =6`
249			`.equ PB5 =5`
250			`.equ PB4 =4`
251			`.equ PB3 =3`
252			`.equ PB2 =2`
253			`.equ PB1 =1`
254			`.equ PB0 =0`
255
256			`.equ DDB7 =7`
257			`.equ DDB6 =6`
258			`.equ DDB5 =5`
259			`.equ DDB4 =4`
260			`.equ DDB3 =3`
261			`.equ DDB2 =2`
262			`.equ DDB1 =1`
263			`.equ DDB0 =0`
264
265			`.equ PINB7 =7`
266			`.equ PINB6 =6`
267			`.equ PINB5 =5`
268			`.equ PINB4 =4`
269			`.equ PINB3 =3`
270			`.equ PINB2 =2`
271			`.equ PINB1 =1`
272			`.equ PINB0 =0`
273
274			`.equ PC7 =7`
275			`.equ PC6 =6`
276			`.equ PC5 =5`
277			`.equ PC4 =4`
278			`.equ PC3 =3`
279			`.equ PC2 =2`
280			`.equ PC1 =1`
281			`.equ PC0 =0`
282
283			`.equ PD7 =7`
284			`.equ PD6 =6`
285			`.equ PD5 =5`
286			`.equ PD4 =4`
287			`.equ PD3 =3`
288			`.equ PD2 =2`
289			`.equ PD1 =1`
290			`.equ PD0 =0`
291
292			`.equ DDD7 =7`
293			`.equ DDD6 =6`
294			`.equ DDD5 =5`
295			`.equ DDD4 =4`
296			`.equ DDD3 =3`
297			`.equ DDD2 =2`
298			`.equ DDD1 =1`
299			`.equ DDD0 =0`
300
301			`.equ PIND7 =7`
302			`.equ PIND6 =6`
303			`.equ PIND5 =5`
304			`.equ PIND4 =4`
305			`.equ PIND3 =3`
306			`.equ PIND2 =2`
307			`.equ PIND1 =1`
308			`.equ PIND0 =0`
309
310			`.equ PE7 =7`
311			`.equ PE6 =6`
312			`.equ PE5 =5`
313			`.equ PE4 =4`
314			`.equ PE3 =3`
315			`.equ PE2 =2`
316			`.equ PE1 =1`
317			`.equ PE0 =0`
318
319			`.equ DDE7 =7`
320			`.equ DDE6 =6`
321			`.equ DDE5 =5`
322			`.equ DDE4 =4`
323			`.equ DDE3 =3`
324			`.equ DDE2 =2`
325			`.equ DDE1 =1`
326			`.equ DDE0 =0`
327
328			`.equ PINE7 =7`
329			`.equ PINE6 =6`
330			`.equ PINE5 =5`
331			`.equ PINE4 =4`
332			`.equ PINE3 =3`
333			`.equ PINE2 =2`
334			`.equ PINE1 =1`
335			`.equ PINE0 =0`
336
337			`.Equ PINF7 =7`
338			`.Equ PINF6 =6`
339			`.Equ PINF5 =5`
340			`.Equ PINF4 =4`
341			`.Equ PINF3 =3`
342			`.Equ PINF2 =2`
343			`.Equ PINF1 =1`
344			`.Equ PINF0 =0`
345
346			`.equ SPIE =7`
347			`.equ SPE =6`
348			`.equ DORD =5`
349			`.equ MSTR =4`
350			`.equ CPOL =3`
351			`.equ CPHA =2`
352			`.equ SPR1 =1`
353			`.equ SPR0 =0`
354
355			`.equ SPIF =7`
356			`.equ WCOL =6`
357
358			`.equ RXC =7`
359			`.equ TXC =6`
360			`.equ UDRE =5`
361			`.equ FE =4`
362			`.equ OR =3`
363
364			`.equ RXCIE =7`
365			`.equ TXCIE =6`
366			`.equ UDRIE =5`
367			`.equ RXEN =4`
368			`.equ TXEN =3`
369			`.equ CHR9 =2`
370			`.equ RXB8 =1`
371			`.equ TXB8 =0`
372
373			`.equ ACD =7`
374			`.equ ACO =5`
375			`.equ ACI =4`
376			`.equ ACIE =3`
377			`.equ ACIC =2`
378			`.equ ACIS1 =1`
379			`.equ ACIS0 =0`
380
381			`.equ ADEN =7`
382			`.equ ADSC =6`
383			`.equ ADFR =5`
384			`.equ ADIF =4`
385			`.equ ADIE =3`
386			`.equ ADPS2 =2`
387			`.equ ADPS1 =1`
388			`.equ ADPS0 =0`
389
390			`.equ MUX2 =2`
391			`.equ MUX1 =1`
392			`.equ MUX0 =0`
393
394			`.def XL =r26`
395			`.def XH =r27`
396			`.def YL =r28`
397			`.def YH =r29`
398			`.def ZL =r30`
399			`.def ZH =r31`
400
401			`.equ RAMEND =$0FFF ;Last On-Chip SRAM Location`
402			`.equ XRAMEND =$FFFF`
403			`.equ E2END =$0FFF`
404			`.equ FLASHEND=$FFFF`
405
406			`.equ INT0addr=$002 ;External Interrupt0 Vector Address`
407			`.equ INT1addr=$004 ;External Interrupt1 Vector Address`
408			`.equ INT2addr=$006 ;External Interrupt2 Vector Address`
409			`.equ INT3addr=$008 ;External Interrupt3 Vector Address`
410			`.equ INT4addr=$00a ;External Interrupt4 Vector Address`
411			`.equ INT5addr=$00c ;External Interrupt5 Vector Address`
412			`.equ INT6addr=$00e ;External Interrupt6 Vector Address`
413			`.equ INT7addr=$010 ;External Interrupt7 Vector Address`
414			`.equ OC2addr =$012 ;Output Compare2 Interrupt Vector Address`
415			`.equ OVF2addr=$014 ;Overflow2 Interrupt Vector Address`
416			`.equ ICP1addr=$016 ;Input Capture1 Interrupt Vector Address`
417			`.equ OC1Aaddr=$018 ;Output Compare1A Interrupt Vector Address`
418			`.equ OC1Baddr=$01a ;Output Compare1B Interrupt Vector Address`
419			`.equ OVF1addr=$01c ;Overflow1 Interrupt Vector Address`
420			`.equ OC0addr =$01e ;Output Compare0 Interrupt Vector Address`
421			`.equ OVF0addr=$020 ;Overflow0 Interrupt Vector Address`
422			`.equ SPIaddr =$022 ;SPI Interrupt Vector Address`
423			`.equ URXCaddr=$024 ;UART Receive Complete Interrupt Vector Address`
424			`.equ UDREaddr=$026 ;UART Data Register Empty Interrupt Vector Address`
425			`.equ UTXCaddr=$028 ;UART Transmit Complete Interrupt Vector Address`
426			`.equ ADCCaddr=$02a ;ADC Conversion Complete Handle`
427			`.equ EEWRaddr=$02c ;EEPROM Write Complete Handle`
428			`.equ ACIaddr =$02e ;Analog Comparator Interrupt Vector Address`
429