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[/] [pcie_mini_axi4s_wb/] [trunk/] [rtl/] [pcie_axi4s2trn_wrapper.vhd] - Blame information for rev 2

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1 2 buenos 
------------------------------------------------------------------------------------
2 
-- AXI4STREAM TO TRN WRAPPER FOR PCIE
3 
-- WRITTEN BY: ISTVAN NAGY, 2019 10 03
4 
--
5 
--THIS IS A WRAPPER FILE FOR CONENCTING THE AXI4STREAM BASED NEW XILINX PCIE-EP-IP
6 
--TO THE OLD PCIE_MINI PROJECT THAT EXPECTS THE PCIE EP IP TO HAVE A TRN INTERFACE.
7 
--LOGIC: AN AXI4STREAM INTERFACE, A TRN INTERFACE AND AN AXI4 DESCRIPTOR HANDLER.
8 
--
9 
--Example design is 1-lane 5Gbps, status and eye capture ports enabled,
10 
--device used was Ultrascale+ xcku3p-ffva676-3-e
11 
-- Usage:
12 
--  Thius file is a wrapper for converting the axi4s interface of the new Ultrascal+
13 
--  FPGA PCIE endpoint IP, to TRN, that works with the pcie_mini logic. The pcie_mini
14 
--  is also modified to implement the new header encoding, while this file is just
15 
--  for the bit timing signals conversion.
16 
--How this works: from UG672-appendix-J the TRN-AXI4S bit signal conversion/migration.
17 
--AXI4S does not provide original TLP header, only AXI4s header, handled in other file.
18 
-- naming: m_axis_cq = TRN_RX, while s_axis_cc = TRN_RX, on completion EP interface.
19 
------------------------------------------------------------------------------------
20 
library IEEE;
21 
use IEEE.STD_LOGIC_1164.ALL;
22 
use IEEE.STD_LOGIC_ARITH.ALL;
23 
use IEEE.STD_LOGIC_UNSIGNED.ALL;
24 
--entity header ----------------------------------------------------------------
25 
entity pcie is
26 
  generic (
27 
    TL_TX_RAM_RADDR_LATENCY           : integer    := 0;
28 
    TL_TX_RAM_RDATA_LATENCY           : integer    := 2;
29 
    TL_RX_RAM_RADDR_LATENCY           : integer    := 0;
30 
    TL_RX_RAM_RDATA_LATENCY           : integer    := 2;
31 
    TL_RX_RAM_WRITE_LATENCY           : integer    := 0;
32 
    VC0_TX_LASTPACKET                 : integer    := 14;
33 
    VC0_RX_RAM_LIMIT                  : bit_vector := x"7FF";
34 
    VC0_TOTAL_CREDITS_PH              : integer    := 32;
35 
    VC0_TOTAL_CREDITS_PD              : integer    := 211;
36 
    VC0_TOTAL_CREDITS_NPH             : integer    := 8;
37 
    VC0_TOTAL_CREDITS_CH              : integer    := 40;
38 
    VC0_TOTAL_CREDITS_CD              : integer    := 211;
39 
    VC0_CPL_INFINITE                  : boolean    := TRUE;
40 
    BAR0                              : bit_vector := x"F0000000";
41 
    BAR1                              : bit_vector := x"00000000";
42 
    BAR2                              : bit_vector := x"00000000";
43 
    BAR3                              : bit_vector := x"00000000";
44 
    BAR4                              : bit_vector := x"00000000";
45 
    BAR5                              : bit_vector := x"00000000";
46 
    EXPANSION_ROM                     : bit_vector := "0000000000000000000000";
47 
    DISABLE_BAR_FILTERING             : boolean    := FALSE;
48 
    DISABLE_ID_CHECK                  : boolean    := FALSE;
49 
    TL_TFC_DISABLE                    : boolean    := FALSE;
50 
    TL_TX_CHECKS_DISABLE              : boolean    := FALSE;
51 
    USR_CFG                           : boolean    := FALSE;
52 
    USR_EXT_CFG                       : boolean    := FALSE;
53 
    DEV_CAP_MAX_PAYLOAD_SUPPORTED     : integer    := 2;
54 
    CLASS_CODE                        : bit_vector := x"068000";
55 
    CARDBUS_CIS_POINTER               : bit_vector := x"00000000";
56 
    PCIE_CAP_CAPABILITY_VERSION       : bit_vector := x"1";
57 
    PCIE_CAP_DEVICE_PORT_TYPE         : bit_vector := x"1";
58 
    PCIE_CAP_SLOT_IMPLEMENTED         : boolean    := FALSE;
59 
    PCIE_CAP_INT_MSG_NUM              : bit_vector := "00000";
60 
    DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT : integer    := 0;
61 
    DEV_CAP_EXT_TAG_SUPPORTED         : boolean    := FALSE;
62 
    DEV_CAP_ENDPOINT_L0S_LATENCY      : integer    := 7;
63 
    DEV_CAP_ENDPOINT_L1_LATENCY       : integer    := 7;
64 
    SLOT_CAP_ATT_BUTTON_PRESENT       : boolean    := FALSE;
65 
    SLOT_CAP_ATT_INDICATOR_PRESENT    : boolean    := FALSE;
66 
    SLOT_CAP_POWER_INDICATOR_PRESENT  : boolean    := FALSE;
67 
    DEV_CAP_ROLE_BASED_ERROR          : boolean    := TRUE;
68 
    LINK_CAP_ASPM_SUPPORT             : integer    := 1;
69 
    LINK_CAP_L0S_EXIT_LATENCY         : integer    := 7;
70 
    LINK_CAP_L1_EXIT_LATENCY          : integer    := 7;
71 
    LL_ACK_TIMEOUT                    : bit_vector := x"0000";
72 
    LL_ACK_TIMEOUT_EN                 : boolean    := FALSE;
73 
    LL_REPLAY_TIMEOUT                 : bit_vector := x"0000";
74 
    LL_REPLAY_TIMEOUT_EN              : boolean    := FALSE;
75 
    MSI_CAP_MULTIMSGCAP               : integer    := 0;
76 
    MSI_CAP_MULTIMSG_EXTENSION        : integer    := 0;
77 
    LINK_STATUS_SLOT_CLOCK_CONFIG     : boolean    := FALSE;
78 
    PLM_AUTO_CONFIG                   : boolean    := FALSE;
79 
    FAST_TRAIN                        : boolean    := FALSE;
80 
    ENABLE_RX_TD_ECRC_TRIM            : boolean    := FALSE;
81 
    DISABLE_SCRAMBLING                : boolean    := FALSE;
82 
    PM_CAP_VERSION                    : integer    := 3;
83 
    PM_CAP_PME_CLOCK                  : boolean    := FALSE;
84 
    PM_CAP_DSI                        : boolean    := FALSE;
85 
    PM_CAP_AUXCURRENT                 : integer    := 0;
86 
    PM_CAP_D1SUPPORT                  : boolean    := TRUE;
87 
    PM_CAP_D2SUPPORT                  : boolean    := TRUE;
88 
    PM_CAP_PMESUPPORT                 : bit_vector := x"0F";
89 
    PM_DATA0                          : bit_vector := x"04";
90 
    PM_DATA_SCALE0                    : bit_vector := x"0";
91 
    PM_DATA1                          : bit_vector := x"00";
92 
    PM_DATA_SCALE1                    : bit_vector := x"0";
93 
    PM_DATA2                          : bit_vector := x"00";
94 
    PM_DATA_SCALE2                    : bit_vector := x"0";
95 
    PM_DATA3                          : bit_vector := x"00";
96 
    PM_DATA_SCALE3                    : bit_vector := x"0";
97 
    PM_DATA4                          : bit_vector := x"04";
98 
    PM_DATA_SCALE4                    : bit_vector := x"0";
99 
    PM_DATA5                          : bit_vector := x"00";
100 
    PM_DATA_SCALE5                    : bit_vector := x"0";
101 
    PM_DATA6                          : bit_vector := x"00";
102 
    PM_DATA_SCALE6                    : bit_vector := x"0";
103 
    PM_DATA7                          : bit_vector := x"00";
104 
    PM_DATA_SCALE7                    : bit_vector := x"0";
105 
    PCIE_GENERIC                      : bit_vector := "000011101111";
106 
    GTP_SEL                           : integer    := 0;
107 
    CFG_VEN_ID                        : std_logic_vector(15 downto 0) := x"10EE";
108 
    CFG_DEV_ID                        : std_logic_vector(15 downto 0) := x"ABCD";
109 
    CFG_REV_ID                        : std_logic_vector(7 downto 0)  := x"00";
110 
    CFG_SUBSYS_VEN_ID                 : std_logic_vector(15 downto 0) := x"10EE";
111 
    CFG_SUBSYS_ID                     : std_logic_vector(15 downto 0) := x"1234";
112 
    REF_CLK_FREQ                      : integer    := 0
113 
  );
114 
  port (
115 
    -- PCI Express Fabric Interface
116 
    pci_exp_txp             : out std_logic;
117 
    pci_exp_txn             : out std_logic;
118 
    pci_exp_rxp             : in  std_logic;
119 
    pci_exp_rxn             : in  std_logic;
120 
 
121 
    -- Transaction (TRN) Interface
122 
    trn_lnk_up_n            : out std_logic;
123 
 
124 
    -- Tx
125 
    trn_td                  : in  std_logic_vector(63 downto 0);
126 
    trn_tsof_n              : in  std_logic;
127 
    trn_teof_n              : in  std_logic;
128 
    trn_tsrc_rdy_n          : in  std_logic;
129 
    trn_tdst_rdy_n          : out std_logic;
130 
    trn_terr_drop_n         : out std_logic;
131 
    trn_tsrc_dsc_n          : in  std_logic;
132 
    trn_terrfwd_n           : in  std_logic;
133 
    trn_tbuf_av             : out std_logic_vector(5 downto 0);
134 
    trn_tstr_n              : in  std_logic;
135 
    trn_tcfg_req_n          : out std_logic;
136 
    trn_tcfg_gnt_n          : in  std_logic;
137 
    --trn_trem_n          : in  std_logic; --this might be needed for correct number of bytes transfer ?????????
138 
 
139 
    -- Rx
140 
    trn_rd                  : out std_logic_vector(63 downto 0);
141 
    trn_rsof_n              : out std_logic;
142 
    trn_reof_n              : out std_logic;
143 
    trn_rsrc_rdy_n          : out std_logic;
144 
    trn_rsrc_dsc_n          : out std_logic;
145 
    trn_rdst_rdy_n          : in  std_logic;
146 
    trn_rerrfwd_n           : out std_logic;
147 
    trn_rnp_ok_n            : in  std_logic;
148 
    trn_rbar_hit_n          : out std_logic_vector(6 downto 0);
149 
    trn_fc_sel              : in  std_logic_vector(2 downto 0);
150 
    trn_fc_nph              : out std_logic_vector(7 downto 0);
151 
    trn_fc_npd              : out std_logic_vector(11 downto 0);
152 
    trn_fc_ph               : out std_logic_vector(7 downto 0);
153 
    trn_fc_pd               : out std_logic_vector(11 downto 0);
154 
    trn_fc_cplh             : out std_logic_vector(7 downto 0);
155 
    trn_fc_cpld             : out std_logic_vector(11 downto 0);
156 
 
157 
    -- Host (CFG) Interface
158 
    cfg_do                  : out std_logic_vector(31 downto 0);
159 
    cfg_rd_wr_done_n        : out std_logic;
160 
    cfg_dwaddr              : in  std_logic_vector(9 downto 0);
161 
    cfg_rd_en_n             : in  std_logic;
162 
    cfg_err_ur_n            : in  std_logic;
163 
    cfg_err_cor_n           : in  std_logic;
164 
    cfg_err_ecrc_n          : in  std_logic;
165 
    cfg_err_cpl_timeout_n   : in  std_logic;
166 
    cfg_err_cpl_abort_n     : in  std_logic;
167 
    cfg_err_posted_n        : in  std_logic;
168 
    cfg_err_locked_n        : in  std_logic;
169 
    cfg_err_tlp_cpl_header  : in  std_logic_vector(47 downto 0);
170 
    cfg_err_cpl_rdy_n       : out std_logic;
171 
    cfg_interrupt_n         : in  std_logic;
172 
    cfg_interrupt_rdy_n     : out std_logic;
173 
    cfg_interrupt_assert_n  : in  std_logic;
174 
    cfg_interrupt_do        : out std_logic_vector(7 downto 0);
175 
    cfg_interrupt_di        : in  std_logic_vector(7 downto 0);
176 
    cfg_interrupt_mmenable  : out std_logic_vector(2 downto 0);
177 
    cfg_interrupt_msienable : out std_logic;
178 
    cfg_turnoff_ok_n        : in  std_logic;
179 
    cfg_to_turnoff_n        : out std_logic;
180 
    cfg_pm_wake_n           : in  std_logic;
181 
    cfg_pcie_link_state_n   : out std_logic_vector(2 downto 0); --new encoding: 1xx=down, x00=no_receivers, x01=linktraining, x10=DLLinit, 011=linkUP. Spartan6 encode was different.
182 
    cfg_trn_pending_n       : in  std_logic;
183 
    cfg_dsn                 : in  std_logic_vector(63 downto 0);
184 
    cfg_bus_number          : out std_logic_vector(7 downto 0);
185 
    cfg_device_number       : out std_logic_vector(4 downto 0);
186 
    cfg_function_number     : out std_logic_vector(2 downto 0);
187 
    cfg_status              : out std_logic_vector(15 downto 0);
188 
    cfg_command             : out std_logic_vector(15 downto 0);
189 
    cfg_dstatus             : out std_logic_vector(15 downto 0);
190 
    cfg_dcommand            : out std_logic_vector(15 downto 0);
191 
    cfg_lstatus             : out std_logic_vector(15 downto 0);
192 
    cfg_lcommand            : out std_logic_vector(15 downto 0);
193 
 
194 
    -- System Interface
195 
    sys_clk                 : in  std_logic; --ref clock oscillator 100mhz
196 
    sys_clk2                 : in  std_logic;
197 
    sys_reset_n             : in  std_logic;
198 
    trn_clk                 : out std_logic; --parallel bus clock 52/125mhz
199 
    trn_reset_n             : out std_logic;
200 
    received_hot_reset      : out std_logic
201 
  );
202 
end pcie;
203 
 
204 
architecture rtl of pcie is
205 
 
206 
  --attribute CORE_GENERATION_INFO : STRING;
207 
  --attribute CORE_GENERATION_INFO of rtl : architecture is
208 
  --  "pcie,s6_pcie_v1_2,{TL_TX_RAM_RADDR_LATENCY=0,TL_TX_RAM_RDATA_LATENCY=2,TL_RX_RAM_RADDR_LATENCY=0,TL_RX_RAM_RDATA_LATENCY=2,TL_RX_RAM_WRITE_LATENCY=0,VC0_TX_LASTPACKET=14,VC0_RX_RAM_LIMIT=7FF,VC0_TOTAL_CREDITS_PH=32,VC0_TOTAL_CREDITS_PD=211,VC0_TOTAL_CREDITS_NPH=8,VC0_TOTAL_CREDITS_CH=40,VC0_TOTAL_CREDITS_CD=211,VC0_CPL_INFINITE=TRUE,BAR0=F0000000,BAR1=00000000,BAR2=00000000,BAR3=00000000,BAR4=00000000,BAR5=00000000,EXPANSION_ROM=000000,USR_CFG=FALSE,USR_EXT_CFG=FALSE,DEV_CAP_MAX_PAYLOAD_SUPPORTED=2,CLASS_CODE=068000,CARDBUS_CIS_POINTER=00000000,PCIE_CAP_CAPABILITY_VERSION=1,PCIE_CAP_DEVICE_PORT_TYPE=1,DEV_CAP_PHANTOM_FUNCTIONS_SUPPORT=0,DEV_CAP_EXT_TAG_SUPPORTED=FALSE,DEV_CAP_ENDPOINT_L0S_LATENCY=7,DEV_CAP_ENDPOINT_L1_LATENCY=7,LINK_CAP_ASPM_SUPPORT=1,MSI_CAP_MULTIMSGCAP=0,MSI_CAP_MULTIMSG_EXTENSION=0,LINK_STATUS_SLOT_CLOCK_CONFIG=FALSE,ENABLE_RX_TD_ECRC_TRIM=FALSE,DISABLE_SCRAMBLING=FALSE,PM_CAP_DSI=FALSE,PM_CAP_D1SUPPORT=TRUE,PM_CAP_D2SUPPORT=TRUE,PM_CAP_PMESUPPORT=0F,PM_DATA0=04,PM_DATA_SCALE0=0,PM_DATA1=00,PM_DATA_SCALE1=0,PM_DATA2=00,PM_DATA_SCALE2=0,PM_DATA3=00,PM_DATA_SCALE3=0,PM_DATA4=04,PM_DATA_SCALE4=0,PM_DATA5=00,PM_DATA_SCALE5=0,PM_DATA6=00,PM_DATA_SCALE6=0,PM_DATA7=00,PM_DATA_SCALE7=0,PCIE_GENERIC=000010101111,GTP_SEL=0,CFG_VEN_ID=10EE,CFG_DEV_ID=ABCD,CFG_REV_ID=00,CFG_SUBSYS_VEN_ID=10EE,CFG_SUBSYS_ID=1234,REF_CLK_FREQ=0}";
209 
 
210 
 
211 
-- INTERNAL SIGNALS -------------------------------------------------------------
212 
SIGNAL  pl_gen2_upstream_prefer_deemph :  std_logic;
213 
SIGNAL  pl_redo_eq :  std_logic;
214 
SIGNAL  pl_redo_eq_speed :  std_logic;
215 
SIGNAL  s_axis_cc_tdata :  std_logic_vector(63 downto 0);
216 
SIGNAL  s_axis_rq_tdata :  std_logic_vector(63 downto 0);
217 
SIGNAL  s_axis_cc_tuser :  std_logic_vector(32 downto 0);
218 
SIGNAL  s_axis_rq_tlast :  std_logic;
219 
SIGNAL  s_axis_cc_tlast :  std_logic;
220 
SIGNAL  pcie_cq_np_req :  std_logic_vector(1 downto 0);
221 
SIGNAL  s_axis_rq_tuser :  std_logic_vector(61 downto 0);
222 
SIGNAL  s_axis_cc_tkeep :  std_logic_vector(1 downto 0);
223 
SIGNAL  s_axis_rq_tkeep :  std_logic_vector(1 downto 0);
224 
SIGNAL  s_axis_cc_tvalid :  std_logic;
225 
SIGNAL  s_axis_rq_tvalid :  std_logic;
226 
SIGNAL  m_axis_cq_tready :  std_logic;
227 
SIGNAL  m_axis_rc_tready :  std_logic;
228 
SIGNAL  cfg_mgmt_addr :  std_logic_vector(9 downto 0);
229 
SIGNAL  cfg_mgmt_function_number :  std_logic_vector(7 downto 0);
230 
SIGNAL  cfg_mgmt_write :  std_logic;
231 
SIGNAL  cfg_mgmt_write_data :  std_logic_vector(31 downto 0);
232 
SIGNAL  cfg_mgmt_byte_enable :  std_logic_vector(3 downto 0);
233 
SIGNAL  cfg_mgmt_read :  std_logic;
234 
SIGNAL  cfg_mgmt_debug_access :  std_logic;
235 
SIGNAL  cfg_msg_transmit :  std_logic;
236 
SIGNAL  cfg_msg_transmit_type :  std_logic_vector(2 downto 0);
237 
SIGNAL  cfg_msg_transmit_data :  std_logic_vector(31 downto 0);
238 
SIGNAL  cfg_fc_sel :  std_logic_vector(2 downto 0);
239 
SIGNAL  cfg_hot_reset_in :  std_logic;
240 
SIGNAL  cfg_config_space_enable :  std_logic;
241 
--SIGNAL  cfg_dsn :  std_logic_vector(63 downto 0);
242 
SIGNAL  cfg_dev_id_pf0 :  std_logic_vector(15 downto 0);
243 
SIGNAL  cfg_dev_id_pf1 :  std_logic_vector(15 downto 0);
244 
SIGNAL  cfg_dev_id_pf2 :  std_logic_vector(15 downto 0);
245 
SIGNAL  cfg_dev_id_pf3 :  std_logic_vector(15 downto 0);
246 
SIGNAL  cfg_vend_id :  std_logic_vector(15 downto 0);
247 
SIGNAL  cfg_rev_id_pf0 :  std_logic_vector(7 downto 0);
248 
SIGNAL  cfg_rev_id_pf1 :  std_logic_vector(7 downto 0);
249 
SIGNAL  cfg_rev_id_pf2 :  std_logic_vector(7 downto 0);
250 
SIGNAL  cfg_rev_id_pf3 :  std_logic_vector(7 downto 0);
251 
SIGNAL  cfg_subsys_id_pf0 :  std_logic_vector(15 downto 0);
252 
SIGNAL  cfg_subsys_id_pf1 :  std_logic_vector(15 downto 0);
253 
SIGNAL  cfg_subsys_id_pf2 :  std_logic_vector(15 downto 0);
254 
SIGNAL  cfg_subsys_id_pf3 :  std_logic_vector(15 downto 0);
255 
SIGNAL  cfg_subsys_vend_id :  std_logic_vector(15 downto 0);
256 
SIGNAL  cfg_ds_port_number :  std_logic_vector(7 downto 0);
257 
SIGNAL  cfg_ds_bus_number :  std_logic_vector(7 downto 0);
258 
SIGNAL  cfg_ds_device_number :  std_logic_vector(4 downto 0);
259 
SIGNAL  cfg_ds_function_number :  std_logic_vector(2 downto 0);
260 
SIGNAL  cfg_power_state_change_ack :  std_logic;
261 
SIGNAL  cfg_err_cor_in :  std_logic;
262 
SIGNAL  cfg_err_uncor_in :  std_logic;
263 
SIGNAL  cfg_flr_done :  std_logic_vector(3 downto 0);
264 
SIGNAL  cfg_req_pm_transition_l23_ready :  std_logic;
265 
SIGNAL  cfg_link_training_enable :  std_logic;
266 
SIGNAL  cfg_interrupt_int :  std_logic_vector(3 downto 0);
267 
SIGNAL  cfg_interrupt_pending :  std_logic_vector(3 downto 0);
268 
SIGNAL  cfg_interrupt_msi_int :  std_logic_vector(31 downto 0);
269 
SIGNAL  cfg_interrupt_msi_pending_status :  std_logic_vector(31 downto 0);
270 
SIGNAL  cfg_interrupt_msi_pending_status_function_num :  std_logic_vector(1 downto 0);
271 
SIGNAL  cfg_interrupt_msi_pending_status_data_enable :  std_logic;
272 
SIGNAL  cfg_interrupt_msi_select :  std_logic_vector(1 downto 0);
273 
SIGNAL  cfg_interrupt_msix_address :  std_logic_vector(63 downto 0);
274 
SIGNAL  cfg_interrupt_msix_data :  std_logic_vector(31 downto 0);
275 
SIGNAL  cfg_interrupt_msix_int :  std_logic;
276 
SIGNAL  cfg_interrupt_msix_vec_pending :  std_logic_vector(1 downto 0);
277 
SIGNAL  cfg_interrupt_msi_attr :  std_logic_vector(2 downto 0);
278 
SIGNAL  cfg_interrupt_msi_tph_present :  std_logic;
279 
SIGNAL  cfg_interrupt_msi_tph_type :  std_logic_vector(1 downto 0);
280 
SIGNAL  cfg_interrupt_msi_tph_st_tag :  std_logic_vector(7 downto 0);
281 
SIGNAL  cfg_interrupt_msi_function_number :  std_logic_vector(7 downto 0);
282 
SIGNAL  cfg_ext_read_data :  std_logic_vector(31 downto 0);
283 
SIGNAL  cfg_ext_read_data_valid :  std_logic;
284 
SIGNAL  cfg_vf_flr_func_num :  std_logic_vector(7 downto 0);
285 
SIGNAL  cfg_vf_flr_done :  std_logic_VECTOR(0 DOWNTO 0);
286 
SIGNAL  cfg_pm_aspm_l1_entry_reject :  std_logic;
287 
SIGNAL  cfg_pm_aspm_tx_l0s_entry_disable :  std_logic;
288 
SIGNAL  conf_req_type :  std_logic_vector(1 downto 0);
289 
SIGNAL  conf_req_reg_num :  std_logic_vector(3 downto 0);
290 
SIGNAL  conf_req_data :  std_logic_vector(31 downto 0);
291 
SIGNAL  conf_req_valid :  std_logic;
292 
SIGNAL  cap_gnt :  std_logic;
293 
SIGNAL  cap_rel :  std_logic;
294 
SIGNAL  sys_clk_gt :  std_logic;
295 
SIGNAL  ext_ch_gt_drpaddr :  std_logic_vector(79 downto 0);
296 
SIGNAL  ext_ch_gt_drpen :  std_logic_vector(7 downto 0);
297 
SIGNAL  ext_ch_gt_drpwe :  std_logic_vector(7 downto 0);
298 
SIGNAL  ext_ch_gt_drpdi :  std_logic_vector(127 downto 0);
299 
SIGNAL  drp_clk :  std_logic;
300 
SIGNAL  drp_en :  std_logic;
301 
SIGNAL  drp_we :  std_logic;
302 
SIGNAL  drp_addr :  std_logic_vector(9 downto 0);
303 
SIGNAL  drp_di :  std_logic_vector(15 downto 0);
304 
SIGNAL  gt_pcieuserratedone :  std_logic_vector(7 downto 0);
305 
SIGNAL  gt_loopback :  std_logic_vector(23 downto 0);
306 
SIGNAL  gt_txprbsforceerr :  std_logic_vector(7 downto 0);
307 
SIGNAL  gt_txinhibit :  std_logic_vector(7 downto 0);
308 
SIGNAL  gt_txprbssel :  std_logic_vector(31 downto 0);
309 
SIGNAL  gt_rxprbssel :  std_logic_vector(31 downto 0);
310 
SIGNAL  gt_rxprbscntreset :  std_logic_vector(7 downto 0);
311 
SIGNAL  gt_dmonfiforeset :  std_logic_vector(7 downto 0);
312 
SIGNAL  gt_dmonitorclk :  std_logic_vector(7 downto 0);
313 
SIGNAL  gt_txpmareset :  std_logic_vector(7 downto 0);
314 
SIGNAL  gt_rxpmareset :  std_logic_vector(7 downto 0);
315 
SIGNAL  gt_txpcsreset :  std_logic_vector(7 downto 0);
316 
SIGNAL  gt_rxpcsreset :  std_logic_vector(7 downto 0);
317 
SIGNAL  gt_rxbufreset :  std_logic_vector(7 downto 0);
318 
SIGNAL  gt_rxcdrreset :  std_logic_vector(7 downto 0);
319 
SIGNAL  gt_rxdfelpmreset :  std_logic_vector(7 downto 0);
320 
SIGNAL  free_run_clock :  std_logic;
321 
SIGNAL  common_commands_in :  std_logic_vector(25 downto 0);
322 
SIGNAL  pipe_rx_0_sigs :  std_logic_vector(83 downto 0);
323 
SIGNAL  pipe_rx_1_sigs :  std_logic_vector(83 downto 0);
324 
SIGNAL  pipe_rx_2_sigs :  std_logic_vector(83 downto 0);
325 
SIGNAL  pipe_rx_3_sigs :  std_logic_vector(83 downto 0);
326 
SIGNAL  pipe_rx_4_sigs :  std_logic_vector(83 downto 0);
327 
SIGNAL  pipe_rx_5_sigs :  std_logic_vector(83 downto 0);
328 
SIGNAL  pipe_rx_6_sigs :  std_logic_vector(83 downto 0);
329 
SIGNAL  pipe_rx_7_sigs :  std_logic_vector(83 downto 0);
330 
SIGNAL  pipe_rx_8_sigs :  std_logic_vector(83 downto 0);
331 
SIGNAL  pipe_rx_9_sigs :  std_logic_vector(83 downto 0);
332 
SIGNAL  pipe_rx_10_sigs :  std_logic_vector(83 downto 0);
333 
SIGNAL  pipe_rx_11_sigs :  std_logic_vector(83 downto 0);
334 
SIGNAL  pipe_rx_12_sigs :  std_logic_vector(83 downto 0);
335 
SIGNAL  pipe_rx_13_sigs :  std_logic_vector(83 downto 0);
336 
SIGNAL  pipe_rx_14_sigs :  std_logic_vector(83 downto 0);
337 
SIGNAL  pipe_rx_15_sigs :  std_logic_vector(83 downto 0);
338 
SIGNAL  ext_qpll0lock_out :  std_logic_vector(1 downto 0);
339 
SIGNAL  ext_qpll0outclk_out :  std_logic_vector(1 downto 0);
340 
SIGNAL  ext_qpll0outrefclk_out :  std_logic_vector(1 downto 0);
341 
SIGNAL  ext_qpll1lock_out :  std_logic_vector(1 downto 0);
342 
SIGNAL  ext_qpll1outclk_out :  std_logic_vector(1 downto 0);
343 
SIGNAL  ext_qpll1outrefclk_out :  std_logic_vector(1 downto 0);
344 
SIGNAL  qpll0lock_out :  std_logic_vector(1 downto 0);
345 
SIGNAL  qpll0outclk_out :  std_logic_vector(1 downto 0);
346 
SIGNAL  qpll0outrefclk_out :  std_logic_vector(1 downto 0);
347 
SIGNAL  qpll1lock_out :  std_logic_vector(1 downto 0);
348 
SIGNAL  qpll1outclk_out :  std_logic_vector(1 downto 0);
349 
SIGNAL  qpll1outrefclk_out :  std_logic_vector(1 downto 0);
350 
SIGNAL  pcierateqpllpd_out :  std_logic_vector(15 downto 0);
351 
SIGNAL  pcierateqpllreset_out :  std_logic_vector(15 downto 0);
352 
SIGNAL  bufgtce_out :  std_logic_vector(7 downto 0);
353 
SIGNAL  bufgtcemask_out :  std_logic_vector(23 downto 0);
354 
SIGNAL  bufgtdiv_out :  std_logic_vector(71 downto 0);
355 
SIGNAL  bufgtreset_out :  std_logic_vector(7 downto 0);
356 
SIGNAL  bufgtrstmask_out :  std_logic_vector(23 downto 0);
357 
SIGNAL  cplllock_out :  std_logic_vector(7 downto 0);
358 
SIGNAL  dmonitorout_out :  std_logic_vector(127 downto 0);
359 
SIGNAL  gtpowergood_out :  std_logic_vector(7 downto 0);
360 
SIGNAL  pcierategen3_out :  std_logic_vector(7 downto 0);
361 
SIGNAL  pcierateidle_out :  std_logic_vector(7 downto 0);
362 
SIGNAL  pciesynctxsyncdone_out :  std_logic_vector(7 downto 0);
363 
SIGNAL  pcieusergen3rdy_out :  std_logic_vector(7 downto 0);
364 
SIGNAL  pcieuserphystatusrst_out :  std_logic_vector(7 downto 0);
365 
SIGNAL  pcieuserratestart_out :  std_logic_vector(7 downto 0);
366 
SIGNAL  phystatus_out :  std_logic_vector(7 downto 0);
367 
SIGNAL  rxbufstatus_out :  std_logic_vector(23 downto 0);
368 
SIGNAL  rxbyteisaligned_out :  std_logic_vector(7 downto 0);
369 
SIGNAL  rxbyterealign_out :  std_logic_vector(7 downto 0);
370 
SIGNAL  rxcdrlock_out :  std_logic_vector(7 downto 0);
371 
SIGNAL  rxclkcorcnt_out :  std_logic_vector(15 downto 0);
372 
SIGNAL  rxcommadet_out :  std_logic_vector(7 downto 0);
373 
SIGNAL  rxctrl0_out :  std_logic_vector(127 downto 0);
374 
SIGNAL  rxctrl1_out :  std_logic_vector(127 downto 0);
375 
SIGNAL  rxctrl2_out :  std_logic_vector(63 downto 0);
376 
SIGNAL  rxctrl3_out :  std_logic_vector(63 downto 0);
377 
SIGNAL  rxdata_out :  std_logic_vector(1023 downto 0);
378 
SIGNAL  rxdlysresetdone_out :  std_logic_vector(7 downto 0);
379 
SIGNAL  rxelecidle_out :  std_logic_vector(7 downto 0);
380 
SIGNAL  rxoutclk_out :  std_logic_vector(7 downto 0);
381 
SIGNAL  rxoutclkfabric_out :  std_logic_vector(7 downto 0);
382 
SIGNAL  rxoutclkpcs_out :  std_logic_vector(7 downto 0);
383 
SIGNAL  rxphaligndone_out :  std_logic_vector(7 downto 0);
384 
SIGNAL  rxpmaresetdone_out :  std_logic_vector(7 downto 0);
385 
SIGNAL  rxprbserr_out :  std_logic_vector(7 downto 0);
386 
SIGNAL  rxprbslocked_out :  std_logic_vector(7 downto 0);
387 
SIGNAL  rxratedone_out :  std_logic_vector(7 downto 0);
388 
SIGNAL  rxrecclkout_out :  std_logic_vector(7 downto 0);
389 
SIGNAL  rxresetdone_out :  std_logic_vector(7 downto 0);
390 
SIGNAL  rxstatus_out :  std_logic_vector(23 downto 0);
391 
SIGNAL  rxsyncdone_out :  std_logic_vector(7 downto 0);
392 
SIGNAL  rxvalid_out :  std_logic_vector(7 downto 0);
393 
SIGNAL  txdlysresetdone_out :  std_logic_vector(7 downto 0);
394 
SIGNAL  txoutclk_out :  std_logic_vector(7 downto 0);
395 
SIGNAL  txoutclkfabric_out :  std_logic_vector(7 downto 0);
396 
SIGNAL  txoutclkpcs_out :  std_logic_vector(7 downto 0);
397 
SIGNAL  txphaligndone_out :  std_logic_vector(7 downto 0);
398 
SIGNAL  txphinitdone_out :  std_logic_vector(7 downto 0);
399 
SIGNAL  txpmaresetdone_out :  std_logic_vector(7 downto 0);
400 
SIGNAL  txprgdivresetdone_out :  std_logic_vector(7 downto 0);
401 
SIGNAL  txresetdone_out :  std_logic_vector(7 downto 0);
402 
SIGNAL  txsyncdone_out :  std_logic_vector(7 downto 0);
403 
SIGNAL  txsyncout_out :  std_logic_vector(7 downto 0);
404 
SIGNAL  drprdy_out :  std_logic_vector(7 downto 0);
405 
SIGNAL  drpdo_out :  std_logic_vector(127 downto 0);
406 
SIGNAL  ext_phy_clk_pclk2_gt :  std_logic;
407 
SIGNAL  ext_phy_clk_int_clock :  std_logic;
408 
SIGNAL  ext_phy_clk_pclk :  std_logic;
409 
SIGNAL  ext_phy_clk_phy_pclk2 :  std_logic;
410 
SIGNAL  ext_phy_clk_phy_coreclk :  std_logic;
411 
SIGNAL  ext_phy_clk_phy_userclk :  std_logic;
412 
SIGNAL  ext_phy_clk_phy_mcapclk :  std_logic;
413 
SIGNAL  prst_clk :  std_logic;
414 
SIGNAL  pl_eq_in_progress :  std_logic;
415 
SIGNAL  pl_eq_phase :  std_logic_vector(1 downto 0);
416 
SIGNAL  pl_eq_mismatch :  std_logic;
417 
SIGNAL  pl_redo_eq_pending :  std_logic;
418 
SIGNAL  m_axis_cq_tdata :  std_logic_vector(63 downto 0);
419 
SIGNAL  m_axis_rc_tdata :  std_logic_vector(63 downto 0);
420 
SIGNAL  m_axis_cq_tuser :  std_logic_vector(87 downto 0);
421 
SIGNAL  m_axis_cq_tlast :  std_logic;
422 
SIGNAL  m_axis_rc_tlast :  std_logic;
423 
SIGNAL  pcie_cq_np_req_count :  std_logic_vector(5 downto 0);
424 
SIGNAL  m_axis_rc_tuser :  std_logic_vector(74 downto 0);
425 
SIGNAL  m_axis_cq_tkeep :  std_logic_vector(1 downto 0);
426 
SIGNAL  m_axis_rc_tkeep :  std_logic_vector(1 downto 0);
427 
SIGNAL  m_axis_cq_tvalid :  std_logic;
428 
SIGNAL  m_axis_rc_tvalid :  std_logic;
429 
SIGNAL  s_axis_cc_tready :  std_logic_vector(3 downto 0);
430 
SIGNAL  s_axis_rq_tready :  std_logic_vector(3 downto 0);
431 
SIGNAL  pcie_rq_seq_num0 :  std_logic_vector(5 downto 0);
432 
SIGNAL  pcie_rq_seq_num_vld0 :  std_logic;
433 
SIGNAL  pcie_rq_seq_num1 :  std_logic_vector(5 downto 0);
434 
SIGNAL  pcie_rq_seq_num_vld1 :  std_logic;
435 
SIGNAL  pcie_rq_tag0 :  std_logic_vector(7 downto 0);
436 
SIGNAL  pcie_rq_tag_vld0 :  std_logic;
437 
SIGNAL  pcie_rq_tag1 :  std_logic_vector(7 downto 0);
438 
SIGNAL  pcie_rq_tag_vld1 :  std_logic;
439 
SIGNAL  pcie_tfc_nph_av :  std_logic_vector(3 downto 0);
440 
SIGNAL  pcie_tfc_npd_av :  std_logic_vector(3 downto 0);
441 
SIGNAL  pcie_rq_tag_av :  std_logic_vector(3 downto 0);
442 
SIGNAL  cfg_mgmt_read_data :  std_logic_vector(31 downto 0);
443 
SIGNAL  cfg_mgmt_read_write_done :  std_logic;
444 
SIGNAL  cfg_phy_link_down :  std_logic;
445 
SIGNAL  cfg_phy_link_status :  std_logic_vector(1 downto 0);
446 
SIGNAL  cfg_negotiated_width :  std_logic_vector(2 downto 0);
447 
SIGNAL  cfg_current_speed :  std_logic_vector(1 downto 0);
448 
SIGNAL  cfg_max_payload :  std_logic_vector(1 downto 0);
449 
SIGNAL  cfg_max_read_req :  std_logic_vector(2 downto 0);
450 
SIGNAL  cfg_function_status :  std_logic_vector(15 downto 0);
451 
SIGNAL  cfg_function_power_state :  std_logic_vector(11 downto 0);
452 
SIGNAL  cfg_link_power_state :  std_logic_vector(1 downto 0);
453 
SIGNAL  cfg_err_cor_out :  std_logic;
454 
SIGNAL  cfg_err_nonfatal_out :  std_logic;
455 
SIGNAL  cfg_err_fatal_out :  std_logic;
456 
SIGNAL  cfg_local_error_valid :  std_logic;
457 
SIGNAL  cfg_local_error_out :  std_logic_vector(4 downto 0);
458 
SIGNAL  cfg_ltssm_state :  std_logic_vector(5 downto 0);
459 
SIGNAL  cfg_rx_pm_state :  std_logic_vector(1 downto 0);
460 
SIGNAL  cfg_tx_pm_state :  std_logic_vector(1 downto 0);
461 
SIGNAL  cfg_rcb_status :  std_logic_vector(3 downto 0);
462 
SIGNAL  cfg_obff_enable :  std_logic_vector(1 downto 0);
463 
SIGNAL  cfg_pl_status_change :  std_logic;
464 
SIGNAL  cfg_tph_requester_enable :  std_logic_vector(3 downto 0);
465 
SIGNAL  cfg_tph_st_mode :  std_logic_vector(11 downto 0);
466 
SIGNAL  cfg_msg_received :  std_logic;
467 
SIGNAL  cfg_msg_received_data :  std_logic_vector(7 downto 0);
468 
SIGNAL  cfg_msg_received_type :  std_logic_vector(4 downto 0);
469 
SIGNAL  cfg_msg_transmit_done :  std_logic;
470 
SIGNAL  cfg_fc_ph :  std_logic_vector(7 downto 0);
471 
SIGNAL  cfg_fc_pd :  std_logic_vector(11 downto 0);
472 
SIGNAL  cfg_fc_nph :  std_logic_vector(7 downto 0);
473 
SIGNAL  cfg_fc_npd :  std_logic_vector(11 downto 0);
474 
SIGNAL  cfg_fc_cplh :  std_logic_vector(7 downto 0);
475 
SIGNAL  cfg_fc_cpld :  std_logic_vector(11 downto 0);
476 
SIGNAL  cfg_hot_reset_out :  std_logic;
477 
--SIGNAL  cfg_bus_number :  std_logic_vector(7 downto 0);
478 
SIGNAL  cfg_power_state_change_interrupt :  std_logic;
479 
SIGNAL  cfg_flr_in_process :  std_logic_vector(3 downto 0);
480 
SIGNAL  cfg_interrupt_sent :  std_logic;
481 
SIGNAL  cfg_interrupt_msi_enable :  std_logic_vector(3 downto 0);
482 
SIGNAL  cfg_interrupt_msi_sent :  std_logic;
483 
SIGNAL  cfg_interrupt_msi_fail :  std_logic;
484 
SIGNAL  cfg_interrupt_msi_mmenable :  std_logic_vector(11 downto 0);
485 
SIGNAL  cfg_interrupt_msi_mask_update :  std_logic;
486 
SIGNAL  cfg_interrupt_msi_data :  std_logic_vector(31 downto 0);
487 
SIGNAL  cfg_interrupt_msix_enable :  std_logic_vector(3 downto 0);
488 
SIGNAL  cfg_interrupt_msix_mask :  std_logic_vector(3 downto 0);
489 
SIGNAL  cfg_interrupt_msix_vec_pending_status :  std_logic;
490 
SIGNAL  cfg_ext_read_received :  std_logic;
491 
SIGNAL  cfg_ext_write_received :  std_logic;
492 
SIGNAL  cfg_ext_register_number :  std_logic_vector(9 downto 0);
493 
SIGNAL  cfg_ext_function_number :  std_logic_vector(7 downto 0);
494 
SIGNAL  cfg_ext_write_data :  std_logic_vector(31 downto 0);
495 
SIGNAL  cfg_ext_write_byte_enable :  std_logic_vector(3 downto 0);
496 
SIGNAL  rbar_bar_size :  std_logic_vector(5 downto 0);
497 
SIGNAL  rbar_function_number :  std_logic_vector(7 downto 0);
498 
SIGNAL  rbar_write_enable_bar0 :  std_logic;
499 
SIGNAL  rbar_write_enable_bar1 :  std_logic;
500 
SIGNAL  rbar_write_enable_bar2 :  std_logic;
501 
SIGNAL  rbar_write_enable_bar3 :  std_logic;
502 
SIGNAL  rbar_write_enable_bar4 :  std_logic;
503 
SIGNAL  rbar_write_enable_bar5 :  std_logic;
504 
SIGNAL  cfg_vf_flr_in_process :  std_logic_vector(251 downto 0);
505 
SIGNAL  cfg_vf_status :  std_logic_vector(503 downto 0);
506 
SIGNAL  cfg_vf_power_state :  std_logic_vector(755 downto 0);
507 
SIGNAL  cfg_vf_tph_requester_enable :  std_logic_vector(251 downto 0);
508 
SIGNAL  cfg_vf_tph_st_mode :  std_logic_vector(755 downto 0);
509 
SIGNAL  cfg_interrupt_msix_vf_enable :  std_logic_vector(251 downto 0);
510 
SIGNAL  cfg_interrupt_msix_vf_mask :  std_logic_vector(251 downto 0);
511 
SIGNAL  conf_req_ready :  std_logic;
512 
SIGNAL  conf_resp_rdata :  std_logic_vector(31 downto 0);
513 
SIGNAL  conf_resp_valid :  std_logic;
514 
SIGNAL  cap_req :  std_logic;
515 
SIGNAL  mcap_design_switch :  std_logic;
516 
SIGNAL  user_clk :  std_logic;
517 
SIGNAL  core_clk :  std_logic;
518 
SIGNAL  gt_drp_clk :  std_logic;
519 
SIGNAL  user_reset :  std_logic;
520 
SIGNAL  user_lnk_up :  std_logic;
521 
SIGNAL  sys_clk_ce_out :  std_logic;
522 
SIGNAL  ext_ch_gt_drpclk :  std_logic;
523 
SIGNAL  ext_ch_gt_drprdy :  std_logic_vector(7 downto 0);
524 
SIGNAL  ext_ch_gt_drpdo :  std_logic_vector(127 downto 0);
525 
SIGNAL  drp_rdy :  std_logic;
526 
SIGNAL  drp_do :  std_logic_vector(15 downto 0);
527 
SIGNAL  gt_txelecidle :  std_logic_vector(7 downto 0);
528 
SIGNAL  gt_txresetdone :  std_logic_vector(7 downto 0);
529 
SIGNAL  gt_rxresetdone :  std_logic_vector(7 downto 0);
530 
SIGNAL  gt_rxpmaresetdone :  std_logic_vector(7 downto 0);
531 
SIGNAL  gt_txphaligndone :  std_logic_vector(7 downto 0);
532 
SIGNAL  gt_txphinitdone :  std_logic_vector(7 downto 0);
533 
SIGNAL  gt_txdlysresetdone :  std_logic_vector(7 downto 0);
534 
SIGNAL  gt_rxphaligndone :  std_logic_vector(7 downto 0);
535 
SIGNAL  gt_rxdlysresetdone :  std_logic_vector(7 downto 0);
536 
SIGNAL  gt_rxsyncdone :  std_logic_vector(7 downto 0);
537 
SIGNAL  gt_eyescandataerror :  std_logic_vector(7 downto 0);
538 
SIGNAL  gt_rxprbserr :  std_logic_vector(7 downto 0);
539 
SIGNAL  gt_dmonitorout :  std_logic_vector(127 downto 0);
540 
SIGNAL  gt_rxcommadet :  std_logic_vector(7 downto 0);
541 
SIGNAL  gt_phystatus :  std_logic_vector(7 downto 0);
542 
SIGNAL  gt_rxvalid :  std_logic_vector(7 downto 0);
543 
SIGNAL  gt_rxcdrlock :  std_logic_vector(7 downto 0);
544 
SIGNAL  gt_pcierateidle :  std_logic_vector(7 downto 0);
545 
SIGNAL  gt_pcieuserratestart :  std_logic_vector(7 downto 0);
546 
SIGNAL  gt_gtpowergood :  std_logic_vector(7 downto 0);
547 
SIGNAL  gt_cplllock :  std_logic_vector(7 downto 0);
548 
SIGNAL  gt_rxoutclk :  std_logic_vector(7 downto 0);
549 
SIGNAL  gt_rxrecclkout :  std_logic_vector(7 downto 0);
550 
SIGNAL  gt_qpll0lock :  std_logic_vector(1 downto 0);
551 
SIGNAL  gt_qpll1lock :  std_logic_vector(1 downto 0);
552 
SIGNAL  gt_rxstatus :  std_logic_vector(23 downto 0);
553 
SIGNAL  gt_rxbufstatus :  std_logic_vector(23 downto 0);
554 
SIGNAL  gt_bufgtdiv :  std_logic_vector(8 downto 0);
555 
SIGNAL  phy_txeq_ctrl :  std_logic_vector(15 downto 0);
556 
SIGNAL  phy_txeq_preset :  std_logic_vector(31 downto 0);
557 
SIGNAL  phy_rst_fsm :  std_logic_vector(3 downto 0);
558 
SIGNAL  phy_txeq_fsm :  std_logic_vector(23 downto 0);
559 
SIGNAL  phy_rxeq_fsm :  std_logic_vector(23 downto 0);
560 
SIGNAL  phy_rst_idle :  std_logic;
561 
SIGNAL  phy_rrst_n :  std_logic;
562 
SIGNAL  phy_prst_n :  std_logic;
563 
SIGNAL  gt_gen34_eios_det :  std_logic_vector(7 downto 0);
564 
SIGNAL  gt_txoutclk :  std_logic_vector(7 downto 0);
565 
SIGNAL  gt_txoutclkfabric :  std_logic_vector(7 downto 0);
566 
SIGNAL  gt_rxoutclkfabric :  std_logic_vector(7 downto 0);
567 
SIGNAL  gt_txoutclkpcs :  std_logic_vector(7 downto 0);
568 
SIGNAL  gt_rxoutclkpcs :  std_logic_vector(7 downto 0);
569 
SIGNAL  gt_txprogdivresetdone :  std_logic_vector(7 downto 0);
570 
SIGNAL  gt_txpmaresetdone :  std_logic_vector(7 downto 0);
571 
SIGNAL  gt_txsyncdone :  std_logic_vector(7 downto 0);
572 
SIGNAL  gt_rxprbslocked :  std_logic_vector(7 downto 0);
573 
SIGNAL  common_commands_out :  std_logic_vector(25 downto 0);
574 
SIGNAL  pipe_tx_0_sigs :  std_logic_vector(83 downto 0);
575 
SIGNAL  pipe_tx_1_sigs :  std_logic_vector(83 downto 0);
576 
SIGNAL  pipe_tx_2_sigs :  std_logic_vector(83 downto 0);
577 
SIGNAL  pipe_tx_3_sigs :  std_logic_vector(83 downto 0);
578 
SIGNAL  pipe_tx_4_sigs :  std_logic_vector(83 downto 0);
579 
SIGNAL  pipe_tx_5_sigs :  std_logic_vector(83 downto 0);
580 
SIGNAL  pipe_tx_6_sigs :  std_logic_vector(83 downto 0);
581 
SIGNAL  pipe_tx_7_sigs :  std_logic_vector(83 downto 0);
582 
SIGNAL  pipe_tx_8_sigs :  std_logic_vector(83 downto 0);
583 
SIGNAL  pipe_tx_9_sigs :  std_logic_vector(83 downto 0);
584 
SIGNAL  pipe_tx_10_sigs :  std_logic_vector(83 downto 0);
585 
SIGNAL  pipe_tx_11_sigs :  std_logic_vector(83 downto 0);
586 
SIGNAL  pipe_tx_12_sigs :  std_logic_vector(83 downto 0);
587 
SIGNAL  pipe_tx_13_sigs :  std_logic_vector(83 downto 0);
588 
SIGNAL  pipe_tx_14_sigs :  std_logic_vector(83 downto 0);
589 
SIGNAL  pipe_tx_15_sigs :  std_logic_vector(83 downto 0);
590 
SIGNAL  int_qpll0lock_out :  std_logic_vector(1 downto 0);
591 
SIGNAL  int_qpll0outrefclk_out :  std_logic_vector(1 downto 0);
592 
SIGNAL  int_qpll0outclk_out :  std_logic_vector(1 downto 0);
593 
SIGNAL  int_qpll1lock_out :  std_logic_vector(1 downto 0);
594 
SIGNAL  int_qpll1outrefclk_out :  std_logic_vector(1 downto 0);
595 
SIGNAL  int_qpll1outclk_out :  std_logic_vector(1 downto 0);
596 
SIGNAL  ext_qpllxrefclk :  std_logic_vector(1 downto 0);
597 
SIGNAL  ext_qpllxrate :  std_logic_vector(5 downto 0);
598 
SIGNAL  ext_qpllxrcalenb :  std_logic;
599 
SIGNAL  ext_qpll0pd :  std_logic_vector(1 downto 0);
600 
SIGNAL  ext_qpll0reset :  std_logic_vector(1 downto 0);
601 
SIGNAL  ext_qpll1pd :  std_logic_vector(1 downto 0);
602 
SIGNAL  ext_qpll1reset :  std_logic_vector(1 downto 0);
603 
SIGNAL  gtrefclk01_in :  std_logic_vector(1 downto 0);
604 
SIGNAL  gtrefclk00_in :  std_logic_vector(1 downto 0);
605 
SIGNAL  pcierateqpll0_in :  std_logic_vector(5 downto 0);
606 
SIGNAL  pcierateqpll1_in :  std_logic_vector(5 downto 0);
607 
SIGNAL  qpll0pd_in :  std_logic_vector(1 downto 0);
608 
SIGNAL  qpll0reset_in :  std_logic_vector(1 downto 0);
609 
SIGNAL  qpll1pd_in :  std_logic_vector(1 downto 0);
610 
SIGNAL  qpll1reset_in :  std_logic_vector(1 downto 0);
611 
SIGNAL  qpll0freqlock_in :  std_logic_vector(7 downto 0);
612 
SIGNAL  qpll1freqlock_in :  std_logic_vector(7 downto 0);
613 
SIGNAL  rcalenb_in :  std_logic_vector(1 downto 0);
614 
SIGNAL  txpisopd_in :  std_logic_vector(7 downto 0);
615 
SIGNAL  cpllfreqlock_in :  std_logic_vector(7 downto 0);
616 
SIGNAL  cpllpd_in :  std_logic_vector(7 downto 0);
617 
SIGNAL  cpllreset_in :  std_logic_vector(7 downto 0);
618 
SIGNAL  dmonfiforeset_in :  std_logic_vector(7 downto 0);
619 
SIGNAL  dmonitorclk_in :  std_logic_vector(7 downto 0);
620 
SIGNAL  eyescanreset_in :  std_logic_vector(7 downto 0);
621 
SIGNAL  gtrefclk0_in :  std_logic_vector(7 downto 0);
622 
SIGNAL  gtrxreset_in :  std_logic_vector(7 downto 0);
623 
SIGNAL  gttxreset_in :  std_logic_vector(7 downto 0);
624 
SIGNAL  gtwiz_reset_rx_done_in :  std_logic;
625 
SIGNAL  gtwiz_reset_tx_done_in :  std_logic;
626 
SIGNAL  gtwiz_userclk_rx_active_in :  std_logic;
627 
SIGNAL  gtwiz_userclk_tx_active_in :  std_logic;
628 
SIGNAL  loopback_in :  std_logic_vector(23 downto 0);
629 
SIGNAL  pcieeqrxeqadaptdone_in :  std_logic_vector(7 downto 0);
630 
SIGNAL  pcierstidle_in :  std_logic_vector(7 downto 0);
631 
SIGNAL  pciersttxsyncstart_in :  std_logic_vector(7 downto 0);
632 
SIGNAL  pcieuserratedone_in :  std_logic_vector(7 downto 0);
633 
SIGNAL  resetovrd_in :  std_logic_vector(7 downto 0);
634 
SIGNAL  rx8b10ben_in :  std_logic_vector(7 downto 0);
635 
SIGNAL  rxbufreset_in :  std_logic_vector(7 downto 0);
636 
SIGNAL  rxcdrfreqreset_in :  std_logic_vector(7 downto 0);
637 
SIGNAL  rxcdrhold_in :  std_logic_vector(7 downto 0);
638 
SIGNAL  rxcdrreset_in :  std_logic_vector(7 downto 0);
639 
SIGNAL  rxcommadeten_in :  std_logic_vector(7 downto 0);
640 
SIGNAL  rxdfeagchold_in :  std_logic_vector(7 downto 0);
641 
SIGNAL  rxdfecfokhold_in :  std_logic_vector(7 downto 0);
642 
SIGNAL  rxdfekhhold_in :  std_logic_vector(7 downto 0);
643 
SIGNAL  rxdfelfhold_in :  std_logic_vector(7 downto 0);
644 
SIGNAL  rxdfelpmreset_in :  std_logic_vector(7 downto 0);
645 
SIGNAL  rxdfetap10hold_in :  std_logic_vector(7 downto 0);
646 
SIGNAL  rxdfetap11hold_in :  std_logic_vector(7 downto 0);
647 
SIGNAL  rxdfetap12hold_in :  std_logic_vector(7 downto 0);
648 
SIGNAL  rxdfetap13hold_in :  std_logic_vector(7 downto 0);
649 
SIGNAL  rxdfetap14hold_in :  std_logic_vector(7 downto 0);
650 
SIGNAL  rxdfetap15hold_in :  std_logic_vector(7 downto 0);
651 
SIGNAL  rxdfetap2hold_in :  std_logic_vector(7 downto 0);
652 
SIGNAL  rxdfetap3hold_in :  std_logic_vector(7 downto 0);
653 
SIGNAL  rxdfetap4hold_in :  std_logic_vector(7 downto 0);
654 
SIGNAL  rxdfetap5hold_in :  std_logic_vector(7 downto 0);
655 
SIGNAL  rxdfetap6hold_in :  std_logic_vector(7 downto 0);
656 
SIGNAL  rxdfetap7hold_in :  std_logic_vector(7 downto 0);
657 
SIGNAL  rxdfetap8hold_in :  std_logic_vector(7 downto 0);
658 
SIGNAL  rxdfetap9hold_in :  std_logic_vector(7 downto 0);
659 
SIGNAL  rxdfeuthold_in :  std_logic_vector(7 downto 0);
660 
SIGNAL  rxdfevphold_in :  std_logic_vector(7 downto 0);
661 
SIGNAL  rxlpmen_in :  std_logic_vector(7 downto 0);
662 
SIGNAL  rxlpmgchold_in :  std_logic_vector(7 downto 0);
663 
SIGNAL  rxlpmhfhold_in :  std_logic_vector(7 downto 0);
664 
SIGNAL  rxlpmlfhold_in :  std_logic_vector(7 downto 0);
665 
SIGNAL  rxlpmoshold_in :  std_logic_vector(7 downto 0);
666 
SIGNAL  rxmcommaalignen_in :  std_logic_vector(7 downto 0);
667 
SIGNAL  rxoshold_in :  std_logic_vector(7 downto 0);
668 
SIGNAL  rxpcommaalignen_in :  std_logic_vector(7 downto 0);
669 
SIGNAL  rxpcsreset_in :  std_logic_vector(7 downto 0);
670 
SIGNAL  rxpd_in :  std_logic_vector(15 downto 0);
671 
SIGNAL  rxpmareset_in :  std_logic_vector(7 downto 0);
672 
SIGNAL  rxpolarity_in :  std_logic_vector(7 downto 0);
673 
SIGNAL  rxprbscntreset_in :  std_logic_vector(7 downto 0);
674 
SIGNAL  rxprbssel_in :  std_logic_vector(31 downto 0);
675 
SIGNAL  rxprogdivreset_in :  std_logic_vector(7 downto 0);
676 
SIGNAL  rxrate_in :  std_logic_vector(23 downto 0);
677 
SIGNAL  rxslide_in :  std_logic_vector(7 downto 0);
678 
SIGNAL  rxtermination_in :  std_logic_vector(7 downto 0);
679 
SIGNAL  rxuserrdy_in :  std_logic_vector(7 downto 0);
680 
SIGNAL  rxusrclk2_in :  std_logic_vector(7 downto 0);
681 
SIGNAL  rxusrclk_in :  std_logic_vector(7 downto 0);
682 
SIGNAL  tx8b10ben_in :  std_logic_vector(7 downto 0);
683 
SIGNAL  txctrl0_in :  std_logic_vector(127 downto 0);
684 
SIGNAL  txctrl1_in :  std_logic_vector(127 downto 0);
685 
SIGNAL  txctrl2_in :  std_logic_vector(63 downto 0);
686 
SIGNAL  txdata_in :  std_logic_vector(1023 downto 0);
687 
SIGNAL  txdeemph_in :  std_logic_vector(15 downto 0);
688 
SIGNAL  txdetectrx_in :  std_logic_vector(7 downto 0);
689 
SIGNAL  txdiffctrl_in :  std_logic_vector(39 downto 0);
690 
SIGNAL  txdlybypass_in :  std_logic_vector(7 downto 0);
691 
SIGNAL  txdlyen_in :  std_logic_vector(7 downto 0);
692 
SIGNAL  txdlyhold_in :  std_logic_vector(7 downto 0);
693 
SIGNAL  txdlyovrden_in :  std_logic_vector(7 downto 0);
694 
SIGNAL  txdlysreset_in :  std_logic_vector(7 downto 0);
695 
SIGNAL  txdlyupdown_in :  std_logic_vector(7 downto 0);
696 
SIGNAL  txelecidle_in :  std_logic_vector(7 downto 0);
697 
SIGNAL  txmaincursor_in :  std_logic_vector(55 downto 0);
698 
SIGNAL  txmargin_in :  std_logic_vector(23 downto 0);
699 
SIGNAL  txoutclksel_in :  std_logic_vector(23 downto 0);
700 
SIGNAL  txpcsreset_in :  std_logic_vector(7 downto 0);
701 
SIGNAL  txpd_in :  std_logic_vector(15 downto 0);
702 
SIGNAL  txphalign_in :  std_logic_vector(7 downto 0);
703 
SIGNAL  txphalignen_in :  std_logic_vector(7 downto 0);
704 
SIGNAL  txphdlypd_in :  std_logic_vector(7 downto 0);
705 
SIGNAL  txphdlyreset_in :  std_logic_vector(7 downto 0);
706 
SIGNAL  txphdlytstclk_in :  std_logic_vector(7 downto 0);
707 
SIGNAL  txphinit_in :  std_logic_vector(7 downto 0);
708 
SIGNAL  txphovrden_in :  std_logic_vector(7 downto 0);
709 
SIGNAL  rxratemode_in :  std_logic_vector(7 downto 0);
710 
SIGNAL  txpmareset_in :  std_logic_vector(7 downto 0);
711 
SIGNAL  txpostcursor_in :  std_logic_vector(39 downto 0);
712 
SIGNAL  txprbsforceerr_in :  std_logic_vector(7 downto 0);
713 
SIGNAL  txprbssel_in :  std_logic_vector(31 downto 0);
714 
SIGNAL  txprecursor_in :  std_logic_vector(39 downto 0);
715 
SIGNAL  txprogdivreset_in :  std_logic_vector(7 downto 0);
716 
SIGNAL  txrate_in :  std_logic_vector(23 downto 0);
717 
SIGNAL  txswing_in :  std_logic_vector(7 downto 0);
718 
SIGNAL  txsyncallin_in :  std_logic_vector(7 downto 0);
719 
SIGNAL  txsyncin_in :  std_logic_vector(7 downto 0);
720 
SIGNAL  txsyncmode_in :  std_logic_vector(7 downto 0);
721 
SIGNAL  txuserrdy_in :  std_logic_vector(7 downto 0);
722 
SIGNAL  txusrclk2_in :  std_logic_vector(7 downto 0);
723 
SIGNAL  txusrclk_in :  std_logic_vector(7 downto 0);
724 
SIGNAL  drpclk_in :  std_logic;
725 
SIGNAL  drpaddr_in :  std_logic_vector(79 downto 0);
726 
SIGNAL  drpen_in :  std_logic_vector(7 downto 0);
727 
SIGNAL  drprst_in :  std_logic_vector(7 downto 0);
728 
SIGNAL  drpwe_in :  std_logic_vector(7 downto 0);
729 
SIGNAL  drpdi_in :  std_logic_vector(127 downto 0);
730 
SIGNAL  ext_phy_clk_bufg_gt_ce :  std_logic;
731 
SIGNAL  ext_phy_clk_bufg_gt_reset :  std_logic;
732 
SIGNAL  ext_phy_clk_rst_idle :  std_logic;
733 
SIGNAL  ext_phy_clk_txoutclk :  std_logic;
734 
SIGNAL  ext_phy_clk_bufgtcemask :  std_logic;
735 
SIGNAL  ext_phy_clk_gt_bufgtrstmask :  std_logic;
736 
SIGNAL  ext_phy_clk_bufgtdiv :  std_logic_vector(8 downto 0);
737 
SIGNAL  phy_rdy_out :  std_logic;
738 
SIGNAL  sys_reset :  std_logic;
739 
SIGNAL  in_packet_reg :  std_logic;
740 
SIGNAL cfg_bus_number_sub :  std_logic_vector(7 downto 0);
741 
SIGNAL cfg_dsn_sub :  std_logic_vector(63 downto 0);
742 
SIGNAL cfg_flr_done_sub :  std_logic_vector(3 downto 0);
743 
SIGNAL cfg_vf_flr_done_sub  :  std_logic_vector(0 downto 0);
744 
SIGNAL sys_clk_sub :  std_logic;
745 
 
746 
 
747 
 
748 
  CONSTANT          PL_LINK_CAP_MAX_LINK_WIDTH     : integer := 1;  -- 1- X1; 2 - X2; 4 - X4; 8 - X8; 16 - X16
749 
  CONSTANT          C_DATA_WIDTH                   : integer := 64;         -- RX/TX interface data width
750 
  CONSTANT          AXISTEN_IF_MC_RX_STRADDLE      : integer := 0;
751 
  CONSTANT          PL_LINK_CAP_MAX_LINK_SPEED     : integer := 2;  -- 1- GEN1; 2 - GEN2; 4 - GEN3; 8 - GEN4
752 
  CONSTANT          KEEP_WIDTH                     : integer := C_DATA_WIDTH / 32;
753 
  CONSTANT          EXT_PIPE_SIM                   : BOOLEAN := FALSE;  -- This CONSTANT has effect on selecting Enable External PIPE Interface in GUI.
754 
  CONSTANT          AXISTEN_IF_CC_ALIGNMENT_MODE   : BOOLEAN := FALSE;
755 
  CONSTANT          AXISTEN_IF_CQ_ALIGNMENT_MODE   : BOOLEAN := FALSE;
756 
  CONSTANT          AXISTEN_IF_RQ_ALIGNMENT_MODE   : BOOLEAN := FALSE;
757 
  CONSTANT          AXISTEN_IF_RC_ALIGNMENT_MODE   : BOOLEAN := FALSE;
758 
  CONSTANT          AXI4_CQ_TUSER_WIDTH            : integer := 88;
759 
  CONSTANT          AXI4_CC_TUSER_WIDTH            : integer := 33;
760 
  CONSTANT          AXI4_RQ_TUSER_WIDTH            : integer := 62;
761 
  CONSTANT          AXI4_RC_TUSER_WIDTH            : integer := 75;
762 
  CONSTANT          AXISTEN_IF_ENABLE_CLIENT_TAG   : integer := 0;
763 
  CONSTANT          RQ_AVAIL_TAG_IDX               : integer := 8;
764 
  CONSTANT          RQ_AVAIL_TAG                   : integer := 256;
765 
  CONSTANT          AXISTEN_IF_RQ_PARITY_CHECK     : integer := 0;
766 
  CONSTANT          AXISTEN_IF_CC_PARITY_CHECK     : integer := 0;
767 
  CONSTANT          AXISTEN_IF_RC_PARITY_CHECK     : integer := 0;
768 
  CONSTANT          AXISTEN_IF_CQ_PARITY_CHECK     : integer := 0;
769 
  CONSTANT          AXISTEN_IF_ENABLE_RX_MSG_INTFC : BOOLEAN := FALSE;
770 
  --CONSTANT          AXISTEN_IF_ENABLE_MSG_ROUTE    : std_logic_vector(17 downto 0) := X"2FFFF";
771 
 
772 
 
773 
 
774 
 
775 
--------- COMPONENT DECLARATIONS (introducing the IPs) --------------------------
776 
COMPONENT pcie4_uscale_plus_0
777 
  PORT (
778 
    pci_exp_txn : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
779 
    pci_exp_txp : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
780 
    pci_exp_rxn : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
781 
    pci_exp_rxp : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
782 
    user_clk : OUT STD_LOGIC;
783 
    user_reset : OUT STD_LOGIC;
784 
    user_lnk_up : OUT STD_LOGIC;
785 
    s_axis_rq_tdata : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
786 
    s_axis_rq_tkeep : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
787 
    s_axis_rq_tlast : IN STD_LOGIC;
788 
    s_axis_rq_tready : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
789 
    s_axis_rq_tuser : IN STD_LOGIC_VECTOR(61 DOWNTO 0);
790 
    s_axis_rq_tvalid : IN STD_LOGIC;
791 
    m_axis_rc_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
792 
    m_axis_rc_tkeep : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
793 
    m_axis_rc_tlast : OUT STD_LOGIC;
794 
    m_axis_rc_tready : IN STD_LOGIC;
795 
    m_axis_rc_tuser : OUT STD_LOGIC_VECTOR(74 DOWNTO 0);
796 
    m_axis_rc_tvalid : OUT STD_LOGIC;
797 
    m_axis_cq_tdata : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
798 
    m_axis_cq_tkeep : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
799 
    m_axis_cq_tlast : OUT STD_LOGIC;
800 
    m_axis_cq_tready : IN STD_LOGIC;
801 
    m_axis_cq_tuser : OUT STD_LOGIC_VECTOR(87 DOWNTO 0);
802 
    m_axis_cq_tvalid : OUT STD_LOGIC;
803 
    s_axis_cc_tdata : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
804 
    s_axis_cc_tkeep : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
805 
    s_axis_cc_tlast : IN STD_LOGIC;
806 
    s_axis_cc_tready : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
807 
    s_axis_cc_tuser : IN STD_LOGIC_VECTOR(32 DOWNTO 0);
808 
    s_axis_cc_tvalid : IN STD_LOGIC;
809 
    pcie_rq_seq_num0 : OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
810 
    pcie_rq_seq_num_vld0 : OUT STD_LOGIC;
811 
    pcie_rq_seq_num1 : OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
812 
    pcie_rq_seq_num_vld1 : OUT STD_LOGIC;
813 
    pcie_rq_tag0 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
814 
    pcie_rq_tag1 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
815 
    pcie_rq_tag_av : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
816 
    pcie_rq_tag_vld0 : OUT STD_LOGIC;
817 
    pcie_rq_tag_vld1 : OUT STD_LOGIC;
818 
    pcie_tfc_nph_av : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
819 
    pcie_tfc_npd_av : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
820 
    pcie_cq_np_req : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
821 
    pcie_cq_np_req_count : OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
822 
    cfg_phy_link_down : OUT STD_LOGIC;
823 
    cfg_phy_link_status : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
824 
    cfg_negotiated_width : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
825 
    cfg_current_speed : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
826 
    cfg_max_payload : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
827 
    cfg_max_read_req : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
828 
    cfg_function_status : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
829 
    cfg_function_power_state : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
830 
    cfg_vf_status : OUT STD_LOGIC_VECTOR(503 DOWNTO 0);
831 
    cfg_vf_power_state : OUT STD_LOGIC_VECTOR(755 DOWNTO 0);
832 
    cfg_link_power_state : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
833 
    cfg_mgmt_addr : IN STD_LOGIC_VECTOR(9 DOWNTO 0);
834 
    cfg_mgmt_function_number : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
835 
    cfg_mgmt_write : IN STD_LOGIC;
836 
    cfg_mgmt_write_data : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
837 
    cfg_mgmt_byte_enable : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
838 
    cfg_mgmt_read : IN STD_LOGIC;
839 
    cfg_mgmt_read_data : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
840 
    cfg_mgmt_read_write_done : OUT STD_LOGIC;
841 
    cfg_mgmt_debug_access : IN STD_LOGIC;
842 
    cfg_err_cor_out : OUT STD_LOGIC;
843 
    cfg_err_nonfatal_out : OUT STD_LOGIC;
844 
    cfg_err_fatal_out : OUT STD_LOGIC;
845 
    cfg_local_error_valid : OUT STD_LOGIC;
846 
    cfg_local_error_out : OUT STD_LOGIC_VECTOR(4 DOWNTO 0);
847 
    cfg_ltssm_state : OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
848 
    cfg_rx_pm_state : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
849 
    cfg_tx_pm_state : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
850 
    cfg_rcb_status : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
851 
    cfg_obff_enable : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
852 
    cfg_pl_status_change : OUT STD_LOGIC;
853 
    cfg_tph_requester_enable : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
854 
    cfg_tph_st_mode : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
855 
    cfg_vf_tph_requester_enable : OUT STD_LOGIC_VECTOR(251 DOWNTO 0);
856 
    cfg_vf_tph_st_mode : OUT STD_LOGIC_VECTOR(755 DOWNTO 0);
857 
    cfg_msg_received : OUT STD_LOGIC;
858 
    cfg_msg_received_data : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
859 
    cfg_msg_received_type : OUT STD_LOGIC_VECTOR(4 DOWNTO 0);
860 
    cfg_msg_transmit : IN STD_LOGIC;
861 
    cfg_msg_transmit_type : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
862 
    cfg_msg_transmit_data : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
863 
    cfg_msg_transmit_done : OUT STD_LOGIC;
864 
    cfg_fc_ph : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
865 
    cfg_fc_pd : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
866 
    cfg_fc_nph : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
867 
    cfg_fc_npd : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
868 
    cfg_fc_cplh : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
869 
    cfg_fc_cpld : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
870 
    cfg_fc_sel : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
871 
    cfg_dsn : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
872 
    cfg_bus_number : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
873 
    cfg_power_state_change_ack : IN STD_LOGIC;
874 
    cfg_power_state_change_interrupt : OUT STD_LOGIC;
875 
    cfg_err_cor_in : IN STD_LOGIC;
876 
    cfg_err_uncor_in : IN STD_LOGIC;
877 
    cfg_flr_in_process : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
878 
    cfg_flr_done : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
879 
    cfg_vf_flr_in_process : OUT STD_LOGIC_VECTOR(251 DOWNTO 0);
880 
    cfg_vf_flr_func_num : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
881 
    cfg_vf_flr_done : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
882 
    cfg_link_training_enable : IN STD_LOGIC;
883 
    cfg_interrupt_int : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
884 
    cfg_interrupt_pending : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
885 
    cfg_interrupt_sent : OUT STD_LOGIC;
886 
    cfg_interrupt_msi_enable : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
887 
    cfg_interrupt_msi_mmenable : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
888 
    cfg_interrupt_msi_mask_update : OUT STD_LOGIC;
889 
    cfg_interrupt_msi_data : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
890 
    cfg_interrupt_msi_select : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
891 
    cfg_interrupt_msi_int : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
892 
    cfg_interrupt_msi_pending_status : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
893 
    cfg_interrupt_msi_pending_status_data_enable : IN STD_LOGIC;
894 
    cfg_interrupt_msi_pending_status_function_num : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
895 
    cfg_interrupt_msi_sent : OUT STD_LOGIC;
896 
    cfg_interrupt_msi_fail : OUT STD_LOGIC;
897 
    cfg_interrupt_msi_attr : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
898 
    cfg_interrupt_msi_tph_present : IN STD_LOGIC;
899 
    cfg_interrupt_msi_tph_type : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
900 
    cfg_interrupt_msi_tph_st_tag : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
901 
    cfg_interrupt_msi_function_number : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
902 
    cfg_pm_aspm_l1_entry_reject : IN STD_LOGIC;
903 
    cfg_pm_aspm_tx_l0s_entry_disable : IN STD_LOGIC;
904 
    cfg_hot_reset_out : OUT STD_LOGIC;
905 
    cfg_config_space_enable : IN STD_LOGIC;
906 
    cfg_req_pm_transition_l23_ready : IN STD_LOGIC;
907 
    cfg_hot_reset_in : IN STD_LOGIC;
908 
    cfg_ds_port_number : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
909 
    cfg_ds_bus_number : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
910 
    cfg_ds_device_number : IN STD_LOGIC_VECTOR(4 DOWNTO 0);
911 
    sys_clk : IN STD_LOGIC;
912 
    sys_clk_gt : IN STD_LOGIC;
913 
    sys_reset : IN STD_LOGIC;
914 
    gt_pcieuserratedone : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
915 
    gt_loopback : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
916 
    gt_txprbsforceerr : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
917 
    gt_txinhibit : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
918 
    gt_txprbssel : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
919 
    gt_rxprbssel : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
920 
    gt_rxprbscntreset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
921 
    gt_txelecidle : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
922 
    gt_txresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
923 
    gt_rxresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
924 
    gt_rxpmaresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
925 
    gt_txphaligndone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
926 
    gt_txphinitdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
927 
    gt_txdlysresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
928 
    gt_rxphaligndone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
929 
    gt_rxdlysresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
930 
    gt_rxsyncdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
931 
    gt_eyescandataerror : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
932 
    gt_rxprbserr : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
933 
    gt_dmonfiforeset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
934 
    gt_dmonitorclk : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
935 
    gt_dmonitorout : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
936 
    gt_rxcommadet : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
937 
    gt_phystatus : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
938 
    gt_rxvalid : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
939 
    gt_rxcdrlock : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
940 
    gt_pcierateidle : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
941 
    gt_pcieuserratestart : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
942 
    gt_gtpowergood : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
943 
    gt_cplllock : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
944 
    gt_rxoutclk : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
945 
    gt_rxrecclkout : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
946 
    gt_qpll1lock : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
947 
    gt_qpll0lock : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
948 
    gt_rxstatus : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
949 
    gt_rxbufstatus : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
950 
    gt_bufgtdiv : OUT STD_LOGIC_VECTOR(8 DOWNTO 0);
951 
    phy_txeq_ctrl : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
952 
    phy_txeq_preset : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
953 
    phy_rst_fsm : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
954 
    phy_txeq_fsm : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
955 
    phy_rxeq_fsm : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
956 
    phy_rst_idle : OUT STD_LOGIC;
957 
    phy_rrst_n : OUT STD_LOGIC;
958 
    phy_prst_n : OUT STD_LOGIC;
959 
    gt_gen34_eios_det : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
960 
    gt_txoutclk : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
961 
    gt_txoutclkfabric : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
962 
    gt_rxoutclkfabric : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
963 
    gt_txoutclkpcs : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
964 
    gt_rxoutclkpcs : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
965 
    gt_txpmareset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
966 
    gt_rxpmareset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
967 
    gt_txpcsreset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
968 
    gt_rxpcsreset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
969 
    gt_rxbufreset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
970 
    gt_rxcdrreset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
971 
    gt_rxdfelpmreset : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
972 
    gt_txprogdivresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
973 
    gt_txpmaresetdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
974 
    gt_txsyncdone : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
975 
    gt_rxprbslocked : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
976 
    phy_rdy_out : OUT STD_LOGIC
977 
  );
978 
END COMPONENT;
979 
 
980 
 
981 
 
982 
--architecture body start -------------------------------------------------------
983 
begin
984 
--------- COMPONENT INSTALLATIONS (connecting the IPs to local signals) ---------
985 
xilinx_pcie_ip : pcie4_uscale_plus_0
986 
  PORT MAP (
987 
    pci_exp_txn(0) => pci_exp_txn,
988 
    pci_exp_txp(0) => pci_exp_txp,
989 
    pci_exp_rxn(0) => pci_exp_rxn,
990 
    pci_exp_rxp(0) => pci_exp_rxp,
991 
        user_clk                                        =>  user_clk ,
992 
        user_reset                                      =>  user_reset ,
993 
        user_lnk_up                                     =>  user_lnk_up ,
994 
        phy_rdy_out                                     =>  phy_rdy_out ,
995 
        s_axis_rq_tlast                                 =>  s_axis_rq_tlast ,
996 
        s_axis_rq_tdata                                 =>  s_axis_rq_tdata ,
997 
        s_axis_rq_tuser                                 =>  s_axis_rq_tuser ,
998 
        s_axis_rq_tkeep                                 =>  s_axis_rq_tkeep ,
999 
        s_axis_rq_tready                                =>  s_axis_rq_tready ,
1000 
        s_axis_rq_tvalid                                =>  s_axis_rq_tvalid ,
1001 
        m_axis_rc_tdata                                 =>  m_axis_rc_tdata ,
1002 
        m_axis_rc_tuser                                 =>  m_axis_rc_tuser ,
1003 
        m_axis_rc_tlast                                 =>  m_axis_rc_tlast ,
1004 
        m_axis_rc_tkeep                                 =>  m_axis_rc_tkeep ,
1005 
        m_axis_rc_tvalid                                =>  m_axis_rc_tvalid ,
1006 
        m_axis_rc_tready                                =>  m_axis_rc_tready ,
1007 
        m_axis_cq_tdata                                 =>  m_axis_cq_tdata ,
1008 
        m_axis_cq_tuser                                 =>  m_axis_cq_tuser ,
1009 
        m_axis_cq_tlast                                 =>  m_axis_cq_tlast ,
1010 
        m_axis_cq_tkeep                                 =>  m_axis_cq_tkeep ,
1011 
        m_axis_cq_tvalid                                =>  m_axis_cq_tvalid ,
1012 
        m_axis_cq_tready                                =>  m_axis_cq_tready ,
1013 
        s_axis_cc_tdata                                 =>  s_axis_cc_tdata ,
1014 
        s_axis_cc_tuser                                 =>  s_axis_cc_tuser ,
1015 
        s_axis_cc_tlast                                 =>  s_axis_cc_tlast ,
1016 
        s_axis_cc_tkeep                                 =>  s_axis_cc_tkeep ,
1017 
        s_axis_cc_tvalid                                =>  s_axis_cc_tvalid ,
1018 
        s_axis_cc_tready                                =>  s_axis_cc_tready ,
1019 
        gt_pcieuserratedone  => (OTHERS => '0'),
1020 
        gt_loopback          => (OTHERS => '0'),
1021 
        gt_txprbsforceerr    => (OTHERS => '0'),
1022 
        gt_txinhibit         => (OTHERS => '0'),
1023 
        gt_txprbssel         => (OTHERS => '0'),
1024 
        gt_rxprbssel         => (OTHERS => '0'),
1025 
        gt_rxprbscntreset    => (OTHERS => '0'),
1026 
--      gt_rxcdrlock         => ,
1027 
--      gt_pcierateidle      => ,
1028 
--      gt_pcieuserratestart => ,
1029 
--      gt_gtpowergood       => ,
1030 
--      gt_rxoutclk          => ,
1031 
--      gt_rxrecclkout       => ,
1032 
--      gt_txresetdone       => ,
1033 
--      gt_rxpmaresetdone    => ,
1034 
--      gt_rxresetdone       => ,
1035 
--      gt_rxbufstatus       => ,
1036 
--      gt_txphaligndone     => ,
1037 
--      gt_txphinitdone      => ,
1038 
--      gt_txdlysresetdone   => ,
1039 
--      gt_rxphaligndone     => ,
1040 
--      gt_rxdlysresetdone   => ,
1041 
--      gt_rxsyncdone        => ,
1042 
--      gt_cplllock          => ,
1043 
--      gt_qpll0lock         => ,
1044 
--      gt_qpll1lock         => ,
1045 
--      gt_eyescandataerror  => ,
1046 
--      gt_rxprbserr         => ,
1047 
--      gt_dmonitorout       => ,
1048 
        gt_dmonfiforeset     => (OTHERS => '0'),
1049 
        gt_dmonitorclk       => (OTHERS => '0'),
1050 
--      gt_rxcommadet        => ,
1051 
--      gt_txelecidle        => ,
1052 
--      gt_rxvalid           => ,
1053 
--      gt_bufgtdiv          => ,
1054 
--      phy_rrst_n           => ,
1055 
--      phy_txeq_ctrl        => ,
1056 
--      phy_txeq_preset      => ,
1057 
--      phy_txeq_fsm         => ,
1058 
--      phy_rxeq_fsm         => ,
1059 
--      phy_rst_idle         => ,
1060 
--      gt_gen34_eios_det    => ,
1061 
--      gt_txoutclk          => ,
1062 
--      gt_txoutclkfabric    => ,
1063 
--      gt_rxoutclkfabric    => ,
1064 
--      gt_txoutclkpcs       => ,
1065 
--      gt_rxoutclkpcs       => ,
1066 
        gt_txpmareset        => (OTHERS => '0'),
1067 
        gt_rxpmareset        => (OTHERS => '0'),
1068 
        gt_txpcsreset        => (OTHERS => '0'),
1069 
        gt_rxpcsreset        => (OTHERS => '0'),
1070 
        gt_rxbufreset        => (OTHERS => '0'),
1071 
        gt_rxcdrreset        => (OTHERS => '0'),
1072 
        gt_rxdfelpmreset     => (OTHERS => '0'),
1073 
--      gt_txprogdivresetdone  => ,
1074 
--      gt_txpmaresetdone      => ,
1075 
--      gt_txsyncdone          => ,
1076 
--      gt_rxprbslocked        => ,
1077 
--      phy_prst_n           => ,
1078 
--      phy_rst_fsm          => ,
1079 
--      gt_phystatus         => ,
1080 
--      gt_rxstatus          => ,
1081 
        pcie_tfc_nph_av                                 =>  pcie_tfc_nph_av ,
1082 
        pcie_tfc_npd_av                                 =>  pcie_tfc_npd_av ,
1083 
        pcie_rq_seq_num0                                =>  pcie_rq_seq_num0      ,
1084 
        pcie_rq_seq_num_vld0                            =>  pcie_rq_seq_num_vld0  ,
1085 
        pcie_rq_seq_num1                                =>  pcie_rq_seq_num1      ,
1086 
        pcie_rq_seq_num_vld1                            =>  pcie_rq_seq_num_vld1  ,
1087 
--      pcie_rq_tag0                                    =>   ,
1088 
--      pcie_rq_tag1                                    =>   ,
1089 
--      pcie_rq_tag_av                                  =>   ,
1090 
--      pcie_rq_tag_vld0                                =>   ,
1091 
--      pcie_rq_tag_vld1                                =>   ,
1092 
        pcie_cq_np_req                                  =>  pcie_cq_np_req ,
1093 
        pcie_cq_np_req_count                            =>  pcie_cq_np_req_count ,
1094 
        cfg_phy_link_down                               =>  cfg_phy_link_down ,
1095 
--      cfg_phy_link_status                             =>  ,
1096 
        cfg_negotiated_width                            =>  cfg_negotiated_width ,
1097 
        cfg_current_speed                               =>  cfg_current_speed ,
1098 
        cfg_max_payload                                 =>  cfg_max_payload ,
1099 
        cfg_max_read_req                                =>  cfg_max_read_req ,
1100 
        cfg_function_status                             =>  cfg_function_status ,
1101 
        cfg_function_power_state                        =>  cfg_function_power_state ,
1102 
        cfg_vf_status                                   =>  cfg_vf_status ,
1103 
--      cfg_vf_power_state                              =>  ,
1104 
        cfg_link_power_state                            =>  cfg_link_power_state ,
1105 
        cfg_err_cor_out                                 =>  cfg_err_cor_out ,
1106 
        cfg_err_nonfatal_out                            =>  cfg_err_nonfatal_out ,
1107 
        cfg_err_fatal_out                               =>  cfg_err_fatal_out ,
1108 
--      cfg_local_error_out                                 =>  ,
1109 
--      cfg_local_error_valid                           =>  ,
1110 
        cfg_ltssm_state                                 =>  cfg_ltssm_state ,
1111 
--      cfg_rx_pm_state                                 =>  ,
1112 
--      cfg_tx_pm_state                                 =>  ,
1113 
        cfg_rcb_status                                  =>  cfg_rcb_status ,
1114 
        cfg_obff_enable                                 =>  cfg_obff_enable ,
1115 
        cfg_pl_status_change                            =>  cfg_pl_status_change ,
1116 
--      cfg_tph_requester_enable                        =>  ,
1117 
--      cfg_tph_st_mode                                 =>  ,
1118 
--      cfg_vf_tph_requester_enable                     =>  ,
1119 
--      cfg_vf_tph_st_mode                              =>  ,
1120 
        cfg_mgmt_addr                                   =>  cfg_mgmt_addr ,
1121 
        cfg_mgmt_write                                  =>  cfg_mgmt_write ,
1122 
        cfg_mgmt_write_data                             =>  cfg_mgmt_write_data ,
1123 
        cfg_mgmt_byte_enable                            =>  cfg_mgmt_byte_enable ,
1124 
        cfg_mgmt_read                                   =>  cfg_mgmt_read ,
1125 
        cfg_mgmt_read_data                              =>  cfg_mgmt_read_data ,
1126 
        cfg_mgmt_read_write_done                        =>  cfg_mgmt_read_write_done ,
1127 
        cfg_mgmt_debug_access                           => '0',
1128 
        cfg_mgmt_function_number                        => (OTHERS => '0'),
1129 
        cfg_pm_aspm_l1_entry_reject                     => '0',
1130 
        cfg_pm_aspm_tx_l0s_entry_disable                => '1',
1131 
        cfg_msg_received                                =>  cfg_msg_received ,
1132 
        cfg_msg_received_data                           =>  cfg_msg_received_data ,
1133 
        cfg_msg_received_type                           =>  cfg_msg_received_type ,
1134 
        cfg_msg_transmit                                =>  cfg_msg_transmit ,
1135 
        cfg_msg_transmit_type                           =>  cfg_msg_transmit_type ,
1136 
        cfg_msg_transmit_data                           =>  cfg_msg_transmit_data ,
1137 
        cfg_msg_transmit_done                           =>  cfg_msg_transmit_done ,
1138 
        cfg_fc_ph                                       =>  cfg_fc_ph ,
1139 
        cfg_fc_pd                                       =>  cfg_fc_pd ,
1140 
        cfg_fc_nph                                      =>  cfg_fc_nph ,
1141 
        cfg_fc_npd                                      =>  cfg_fc_npd ,
1142 
        cfg_fc_cplh                                     =>  cfg_fc_cplh ,
1143 
        cfg_fc_cpld                                     =>  cfg_fc_cpld ,
1144 
        cfg_fc_sel                                      =>  cfg_fc_sel ,
1145 
        cfg_bus_number                                  =>  cfg_bus_number_sub,
1146 
        cfg_dsn                                         =>  cfg_dsn_sub ,
1147 
        cfg_power_state_change_ack                      =>  cfg_power_state_change_ack ,
1148 
        cfg_power_state_change_interrupt                =>  cfg_power_state_change_interrupt ,
1149 
        cfg_err_cor_in                                  =>  cfg_err_cor_in ,
1150 
        cfg_err_uncor_in                                =>  cfg_err_uncor_in ,
1151 
        cfg_flr_in_process                              =>  cfg_flr_in_process ,
1152 
        cfg_flr_done                                    =>  cfg_flr_done_sub ,
1153 
        cfg_vf_flr_in_process                           =>  cfg_vf_flr_in_process ,
1154 
        cfg_vf_flr_done                                 =>  cfg_vf_flr_done_sub ,
1155 
        cfg_link_training_enable                        =>  cfg_link_training_enable ,
1156 
        cfg_hot_reset_out                               =>  cfg_hot_reset_out ,
1157 
        cfg_config_space_enable                         =>  cfg_config_space_enable ,
1158 
        cfg_req_pm_transition_l23_ready                 =>  cfg_req_pm_transition_l23_ready ,
1159 
        cfg_hot_reset_in                                =>  cfg_hot_reset_in ,
1160 
        cfg_ds_bus_number                               =>  cfg_ds_bus_number ,
1161 
        cfg_ds_device_number                            =>  cfg_ds_device_number ,
1162 
        cfg_ds_port_number                              =>  cfg_ds_port_number ,
1163 
        cfg_vf_flr_func_num                             =>  cfg_vf_flr_func_num,
1164 
        cfg_interrupt_int                               =>  cfg_interrupt_int ,
1165 
        cfg_interrupt_pending                           =>  cfg_interrupt_pending ,
1166 
        cfg_interrupt_sent                              =>  cfg_interrupt_sent ,
1167 
        cfg_interrupt_msi_enable                        =>  cfg_interrupt_msi_enable ,
1168 
        cfg_interrupt_msi_mmenable                      =>  cfg_interrupt_msi_mmenable ,
1169 
        cfg_interrupt_msi_mask_update                   =>  cfg_interrupt_msi_mask_update ,
1170 
        cfg_interrupt_msi_data                          =>  cfg_interrupt_msi_data ,
1171 
        cfg_interrupt_msi_select                        =>  cfg_interrupt_msi_select ,
1172 
        cfg_interrupt_msi_int                           =>  cfg_interrupt_msi_int ,
1173 
        cfg_interrupt_msi_pending_status                =>  cfg_interrupt_msi_pending_status (31 downto 0),
1174 
        cfg_interrupt_msi_sent                          =>  cfg_interrupt_msi_sent ,
1175 
        cfg_interrupt_msi_fail                          =>  cfg_interrupt_msi_fail ,
1176 
        cfg_interrupt_msi_attr                          =>  cfg_interrupt_msi_attr ,
1177 
        cfg_interrupt_msi_tph_present                   =>  cfg_interrupt_msi_tph_present ,
1178 
        cfg_interrupt_msi_tph_type                      =>  cfg_interrupt_msi_tph_type ,
1179 
        cfg_interrupt_msi_tph_st_tag                    =>  cfg_interrupt_msi_tph_st_tag ,
1180 
        cfg_interrupt_msi_pending_status_function_num   =>  "00",
1181 
        cfg_interrupt_msi_pending_status_data_enable    =>  '0',
1182 
        cfg_interrupt_msi_function_number               =>  cfg_interrupt_msi_function_number ,
1183 
        sys_clk                                         =>  sys_clk_sub ,
1184 
        sys_clk_gt                                      =>  sys_clk_gt ,
1185 
        sys_reset                                       =>  sys_reset
1186 
  );
1187 
 
1188 
-- local Logic ------------------------------------------------------------------
1189 
sys_reset <= not sys_reset_n;
1190 
 
1191 
 
1192 
 
1193 
--AXI4S-TRN conversions:
1194 
--start of frame, remainder-keep logic, data path DWORD-endian-reordering
1195 
--general rule: TRN_T* to S_AXIS_CC*, while TRN_R* to M_AXIS_CQ*, TRN_FC* to CFG_FC*.
1196 
 
1197 
-- SIGNALS TO THIS FILE TOP OUTPUTS.
1198 
    trn_lnk_up_n                <=      not user_lnk_up ;
1199 
    -- Tx
1200 
    trn_tdst_rdy_n              <=      not s_axis_cc_tready(0) ;
1201 
    trn_terr_drop_n             <=      '1';
1202 
    trn_tbuf_av                 <=      "000000";
1203 
    trn_tcfg_req_n              <=      '1';
1204 
    -- Rx
1205 
    trn_rd(63 downto 32) <= m_axis_cq_tdata(31 downto 0); --endian swap
1206 
    trn_rd(31 downto 0) <= m_axis_cq_tdata(63 downto 32);
1207 
    trn_rsof_n                  <=      not (m_axis_cq_tvalid and (not in_packet_reg));
1208 
    process ( sys_reset_n, user_clk)
1209 
    begin
1210 
       if (sys_reset_n = '0') then
1211 
           in_packet_reg <='0';
1212 
       elsif (user_clk'event and user_clk = '1') then
1213 
         if (m_axis_cq_tvalid='1' and m_axis_cq_tready='1') then
1214 
             in_packet_reg <= not m_axis_cq_tlast;
1215 
         end if;
1216 
       end if;
1217 
    end process;
1218 
    trn_reof_n                  <=      not m_axis_cq_tlast ;
1219 
    trn_rsrc_rdy_n              <=      not m_axis_cq_tvalid;
1220 
    trn_rsrc_dsc_n              <=      '0';
1221 
    trn_rerrfwd_n               <=      not m_axis_cq_tuser(1);
1222 
    trn_rbar_hit_n              <=      not m_axis_cq_tuser(8 downto 2);
1223 
    trn_fc_nph                  <=      cfg_fc_nph ;
1224 
    trn_fc_npd                  <=      cfg_fc_npd ;
1225 
    trn_fc_ph                   <=      cfg_fc_ph ;
1226 
    trn_fc_pd                   <=      cfg_fc_pd ;
1227 
    trn_fc_cplh                 <=      cfg_fc_cplh;
1228 
    trn_fc_cpld                 <=      cfg_fc_cpld;
1229 
    -- Host (CFG) Interface
1230 
    cfg_do                      <=      (OTHERS => '0');
1231 
    cfg_rd_wr_done_n            <=      not cfg_mgmt_read_write_done;
1232 
    cfg_err_cpl_rdy_n           <=      '1';
1233 
    cfg_interrupt_rdy_n         <=      '1';
1234 
    cfg_interrupt_do            <=      (OTHERS => '0');
1235 
    cfg_interrupt_mmenable      <=      (OTHERS => '0');
1236 
    cfg_interrupt_msienable     <=      cfg_interrupt_msi_enable(0);
1237 
    cfg_to_turnoff_n            <=      '1';
1238 
    cfg_pcie_link_state_n(1 downto 0)    <=      cfg_phy_link_status;
1239 
    cfg_pcie_link_state_n(2)    <=      cfg_phy_link_down;
1240 
    cfg_bus_number              <=      cfg_bus_number_sub;
1241 
    cfg_device_number           <=      (OTHERS => '0'); --the new core doesnt provide this, so we assume 0. On PCI-express, each device is on a different bus, and device number=0. this core is simple, so func.num=0 too.
1242 
    cfg_function_number         <=      (OTHERS => '0');
1243 
    cfg_status                  <=      (OTHERS => '0');
1244 
    cfg_command                 <=      (OTHERS => '0');
1245 
    cfg_dstatus                 <=      (OTHERS => '0');
1246 
    cfg_dcommand                <=      (OTHERS => '0');
1247 
    cfg_lstatus                 <=      (OTHERS => '0');
1248 
    cfg_lcommand                <=      (OTHERS => '0');
1249 
    -- System Interface
1250 
    trn_clk                     <=      user_clk;
1251 
    trn_reset_n                 <=      not user_reset;
1252 
    received_hot_reset          <=      cfg_hot_reset_out;
1253 
 
1254 
 
1255 
--IP BELOW INPUTS:
1256 
    s_axis_rq_tdata     <=      (OTHERS => '0');
1257 
    s_axis_rq_tkeep     <=      (OTHERS => '0');
1258 
    s_axis_rq_tlast     <=      '0';
1259 
    s_axis_rq_tuser     <=      (OTHERS => '0');
1260 
    s_axis_rq_tvalid    <=      '0';
1261 
    m_axis_rc_tready    <=      '0';
1262 
    m_axis_cq_tready    <=      not trn_rdst_rdy_n; --CQ=RX
1263 
    s_axis_cc_tdata(63 downto 32)       <=      trn_td(31 downto 0); --endian swap. CC=TX
1264 
    s_axis_cc_tdata(31 downto 0)         <=      trn_td(63 downto 32);
1265 
    --since the trn_term signal is missing on TRN, I try to re-creste it here:
1266 
    --s_axis_cc_tkeep   <=      "11"; --try to force this to all dwords always valid = "11"
1267 
    --s_axis_cc_tkeep   <=      "01"; --try to force this to 32bit valid = "01" or "10" ???
1268 
    --it would be correct like this, but trn_term is missing, xilinx suggestion:
1269 
    --process ( sys_reset_n, user_clk)
1270 
    --begin
1271 
       --if (sys_reset_n = '0') then
1272 
           --s_axis_cc_tkeep  <=(OTHERS => '0');
1273 
       --elsif (user_clk'event and user_clk = '1') then
1274 
         --if (s_axis_cc_tlast ='1') then
1275 
             --if (trn_trem_n='1') then --missing signal on TRN interface. signal last dword of burst
1276 
                --s_axis_cc_tkeep  <= "01";
1277 
             --else
1278 
                --s_axis_cc_tkeep  <= "11";
1279 
             --end if;
1280 
         --else
1281 
             --s_axis_cc_tkeep  <= "11";
1282 
         --end if;
1283 
       --end if;
1284 
    --end process;
1285 
    --or try another trick, using end of frame: (async, so slow timing, but should work at 62MHz)
1286 
    process ( sys_reset_n, user_clk, s_axis_cc_tlast, trn_teof_n)
1287 
    begin
1288 
       if (sys_reset_n = '0') then
1289 
           s_axis_cc_tkeep  <=(OTHERS => '0');
1290 
       else --elsif (user_clk'event and user_clk = '1') then
1291 
         if (s_axis_cc_tlast ='1') then
1292 
             if (trn_teof_n='0') then
1293 
                s_axis_cc_tkeep  <= "01";
1294 
             else
1295 
                s_axis_cc_tkeep  <= "11";
1296 
             end if;
1297 
         else
1298 
             s_axis_cc_tkeep  <= "11";
1299 
         end if;
1300 
       end if;
1301 
    end process;
1302 
    s_axis_cc_tlast     <=      not trn_teof_n;
1303 
    s_axis_cc_tuser(3)  <=      not trn_tsrc_dsc_n;
1304 
    s_axis_cc_tuser(2)  <=      not trn_tstr_n;
1305 
    s_axis_cc_tuser(1)  <=      not trn_terrfwd_n;
1306 
    s_axis_cc_tuser(0)   <=      '0';
1307 
    s_axis_cc_tvalid    <=      not trn_tsrc_rdy_n;
1308 
    pcie_cq_np_req      <=      "00";
1309 
    cfg_mgmt_addr       <=      (OTHERS => '0');
1310 
    cfg_mgmt_function_number    <=      (OTHERS => '0');
1311 
    cfg_mgmt_write      <=      '0';
1312 
    cfg_mgmt_write_data         <=      (OTHERS => '0');
1313 
    cfg_mgmt_byte_enable        <=      (OTHERS => '0');
1314 
    cfg_mgmt_read       <=      '0';
1315 
    cfg_mgmt_debug_access       <=      '0';
1316 
    cfg_msg_transmit    <=      '0';
1317 
    cfg_msg_transmit_type       <=      (OTHERS => '0');
1318 
    cfg_msg_transmit_data       <=      (OTHERS => '0');
1319 
    cfg_fc_sel  <=      trn_fc_sel;
1320 
    cfg_dsn_sub         <=      (OTHERS => '0'); --or cfg_dsn;
1321 
    cfg_power_state_change_ack  <=      '0';
1322 
    cfg_err_cor_in      <=      '0';
1323 
    cfg_err_uncor_in    <=      '0';
1324 
    cfg_flr_done_sub    <= (OTHERS => '0'); --or cfg_flr_done;
1325 
    cfg_vf_flr_func_num         <=      (OTHERS => '0');
1326 
    cfg_vf_flr_done_sub         <= (OTHERS => '0'); --or cfg_vf_flr_done;
1327 
    cfg_link_training_enable    <=      '1';
1328 
    cfg_interrupt_int   <=      (OTHERS => '0');
1329 
    cfg_interrupt_pending       <=      (OTHERS => '0');
1330 
    cfg_interrupt_msi_select    <=      (OTHERS => '0');
1331 
    cfg_interrupt_msi_int       <=      (OTHERS => '0');
1332 
    cfg_interrupt_msi_pending_status    <=      (OTHERS => '0');
1333 
    cfg_interrupt_msi_pending_status_data_enable        <=      '0';
1334 
    cfg_interrupt_msi_pending_status_function_num       <=      (OTHERS => '0');
1335 
    cfg_interrupt_msi_attr      <=      (OTHERS => '0');
1336 
    cfg_interrupt_msi_tph_present       <=      '0';
1337 
    cfg_interrupt_msi_tph_type  <=      (OTHERS => '0');
1338 
    cfg_interrupt_msi_tph_st_tag        <=      (OTHERS => '0');
1339 
    cfg_interrupt_msi_function_number   <=      (OTHERS => '0');
1340 
    cfg_pm_aspm_l1_entry_reject         <=      '0';
1341 
    cfg_pm_aspm_tx_l0s_entry_disable    <=      '0';
1342 
    cfg_config_space_enable     <=      '1';
1343 
    cfg_req_pm_transition_l23_ready     <=      '0';
1344 
    cfg_hot_reset_in    <=      '0';
1345 
    cfg_ds_port_number  <=      (OTHERS => '0');
1346 
    cfg_ds_bus_number   <=      (OTHERS => '0');
1347 
    cfg_ds_device_number        <=      (OTHERS => '0');
1348 
    sys_clk_sub         <=      sys_clk; --the 100/125/250M reference clock
1349 
    sys_clk_gt  <=      sys_clk2;
1350 
    sys_reset   <=      not sys_reset_n;
1351 
    gt_pcieuserratedone         <=      (OTHERS => '0');
1352 
    gt_loopback         <=      (OTHERS => '0');
1353 
    gt_txprbsforceerr   <=      (OTHERS => '0');
1354 
    gt_txinhibit        <=      (OTHERS => '0');
1355 
    gt_txprbssel        <=      (OTHERS => '0');
1356 
    gt_rxprbssel        <=      (OTHERS => '0');
1357 
    gt_rxprbscntreset   <=      (OTHERS => '0');
1358 
    gt_dmonfiforeset    <=      (OTHERS => '0');
1359 
    gt_dmonitorclk      <=      (OTHERS => '0');
1360 
    gt_txpmareset       <=      (OTHERS => '0');
1361 
    gt_rxpmareset       <=      (OTHERS => '0');
1362 
    gt_txpcsreset       <=      (OTHERS => '0');
1363 
    gt_rxpcsreset       <=      (OTHERS => '0');
1364 
    gt_rxbufreset       <=      (OTHERS => '0');
1365 
    gt_rxcdrreset       <=      (OTHERS => '0');
1366 
    gt_rxdfelpmreset    <=      (OTHERS => '0');
1367 
 
1368 
 
1369 
 
1370 
 
1371 
 
1372 
 
1373 
--end file ----------------------------------------------------------------------
1374 
end rtl;

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