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Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [MyUserLogic/] [UserLogic_00/] [top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/] [synth_model/] [_xmsgs/] [ngcbuild.xmsgs] - Blame information for rev 13

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1 13 barabba
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The TNM 'clk_54e96cfd', does not directly or indirectly drive any flip-flops, latches and/or RAMS and cannot be actively used by the referencing Period constraint 'TS_clk_54e96cfd'. If clock manager blocks are directly or indirectly driven, a new TNM constraint will not be derived even though the referencing constraint is a PERIOD constraint unless an output of the clock manager drives flip-flops, latches or RAMs. This TNM is used in the following user PERIOD specification:
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<TIMESPEC "TS_clk_54e96cfd" = PERIOD "clk_54e96cfd" 5.0 ns HIGH 50 %;> [inout_logic_cw.ucf(5)]
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The following specification is invalid because the referenced TNM constraint was removed:
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<TIMESPEC "TS_clk_54e96cfd" = PERIOD "clk_54e96cfd" 5.0 ns HIGH 50 %;> [inout_logic_cw.ucf(5)]
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Could not find any associations for the following constraint:
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    '<NET "clk" TNM_NET = "clk_54e96cfd";> [inout_logic_cw.ucf(4)]'
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