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[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [MyUserLogic/] [UserLogic_00/] [top_level_1_PCIe_UserLogic_00_USER_LOGIC/] [PCIe_UserLogic_00.cdc] - Blame information for rev 13

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Line No. Rev Author Line
1 13 barabba
#ChipScope Core Generator Project File Version 3.0
2
# Produced by System Generator
3
SignalExport.clockChannel=CLK
4
SignalExport.bus<0>.channelList=0 1 2 3 4 5 6 7 8 9 10 11
5
SignalExport.bus<0>.name=BRAM_addr
6
SignalExport.bus<0>.offset=0.0
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SignalExport.bus<0>.precision=0
8
SignalExport.bus<0>.radix=Unsigned
9
SignalExport.bus<0>.scaleFactor=1.0
10
SignalExport.bus<1>.channelList=12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
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SignalExport.bus<1>.name=BRAM_data
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SignalExport.bus<1>.offset=0.0
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SignalExport.bus<1>.precision=0
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SignalExport.bus<1>.radix=Unsigned
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SignalExport.bus<1>.scaleFactor=1.0
16
SignalExport.bus<2>.channelList=76
17
SignalExport.bus<2>.name=FIFO_empty
18
SignalExport.bus<2>.offset=0.0
19
SignalExport.bus<2>.precision=0
20
SignalExport.bus<2>.radix=Unsigned
21
SignalExport.bus<2>.scaleFactor=1.0
22
SignalExport.bus<3>.channelList=77
23
SignalExport.bus<3>.name=FIFo_rd_en
24
SignalExport.bus<3>.offset=0.0
25
SignalExport.bus<3>.precision=0
26
SignalExport.bus<3>.radix=Unsigned
27
SignalExport.bus<3>.scaleFactor=1.0
28
SignalExport.bus<4>.channelList=78
29
SignalExport.bus<4>.name=FIFO_wr_en
30
SignalExport.bus<4>.offset=0.0
31
SignalExport.bus<4>.precision=0
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SignalExport.bus<4>.radix=Unsigned
33
SignalExport.bus<4>.scaleFactor=1.0
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SignalExport.bus<5>.channelList=79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150
35
SignalExport.bus<5>.name=FIFO_data_in_out
36
SignalExport.bus<5>.offset=0.0
37
SignalExport.bus<5>.precision=0
38
SignalExport.bus<5>.radix=Unsigned
39
SignalExport.bus<5>.scaleFactor=1.0
40
SignalExport.bus<6>.channelList=151
41
SignalExport.bus<6>.name=FIFO_rd_pempty
42
SignalExport.bus<6>.offset=0.0
43
SignalExport.bus<6>.precision=0
44
SignalExport.bus<6>.radix=Unsigned
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SignalExport.bus<6>.scaleFactor=1.0
46
SignalExport.bus<7>.channelList=152 153 154 155 156 157 158 159 160 161 162 163 164 165 166
47
SignalExport.bus<7>.name=FIFO_rd_count
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SignalExport.bus<7>.offset=0.0
49
SignalExport.bus<7>.precision=0
50
SignalExport.bus<7>.radix=Unsigned
51
SignalExport.bus<7>.scaleFactor=1.0
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SignalExport.bus<8>.channelList=167
53
SignalExport.bus<8>.name=FIFO_wr_full
54
SignalExport.bus<8>.offset=0.0
55
SignalExport.bus<8>.precision=0
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SignalExport.bus<8>.radix=Unsigned
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SignalExport.bus<8>.scaleFactor=1.0
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SignalExport.bus<9>.channelList=168
59
SignalExport.bus<9>.name=FIFO_wr_pfull
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SignalExport.bus<9>.offset=0.0
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SignalExport.bus<9>.precision=0
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SignalExport.bus<9>.radix=Unsigned
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SignalExport.bus<9>.scaleFactor=1.0
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SignalExport.bus<10>.channelList=169 170 171 172 173 174 175 176 177 178 179 180 181 182 183
65
SignalExport.bus<10>.name=FIFO_wr_count
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SignalExport.bus<10>.offset=0.0
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SignalExport.bus<10>.precision=0
68
SignalExport.bus<10>.radix=Unsigned
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SignalExport.bus<10>.scaleFactor=1.0
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SignalExport.dataEqualsTrigger=true
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SignalExport.triggerPortIsData<0>=true
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SignalExport.triggerPortIsData<1>=true
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SignalExport.triggerPortIsData<2>=true
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SignalExport.triggerPortIsData<3>=true
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SignalExport.triggerPortIsData<4>=true
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SignalExport.triggerPortIsData<5>=true
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SignalExport.triggerPortIsData<6>=true
78
SignalExport.triggerPortIsData<7>=true
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SignalExport.triggerPortIsData<8>=true
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SignalExport.triggerPortIsData<9>=true
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SignalExport.triggerPortIsData<10>=true
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SignalExport.triggerChannel<0><000>=BRAM_addr[0]
83
SignalExport.triggerChannel<0><001>=BRAM_addr[1]
84
SignalExport.triggerChannel<0><002>=BRAM_addr[2]
85
SignalExport.triggerChannel<0><003>=BRAM_addr[3]
86
SignalExport.triggerChannel<0><004>=BRAM_addr[4]
87
SignalExport.triggerChannel<0><005>=BRAM_addr[5]
88
SignalExport.triggerChannel<0><006>=BRAM_addr[6]
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SignalExport.triggerChannel<0><007>=BRAM_addr[7]
90
SignalExport.triggerChannel<0><008>=BRAM_addr[8]
91
SignalExport.triggerChannel<0><009>=BRAM_addr[9]
92
SignalExport.triggerChannel<0><010>=BRAM_addr[10]
93
SignalExport.triggerChannel<0><011>=BRAM_addr[11]
94
SignalExport.triggerChannel<1><000>=BRAM_data[0]
95
SignalExport.triggerChannel<1><001>=BRAM_data[1]
96
SignalExport.triggerChannel<1><002>=BRAM_data[2]
97
SignalExport.triggerChannel<1><003>=BRAM_data[3]
98
SignalExport.triggerChannel<1><004>=BRAM_data[4]
99
SignalExport.triggerChannel<1><005>=BRAM_data[5]
100
SignalExport.triggerChannel<1><006>=BRAM_data[6]
101
SignalExport.triggerChannel<1><007>=BRAM_data[7]
102
SignalExport.triggerChannel<1><008>=BRAM_data[8]
103
SignalExport.triggerChannel<1><009>=BRAM_data[9]
104
SignalExport.triggerChannel<1><010>=BRAM_data[10]
105
SignalExport.triggerChannel<1><011>=BRAM_data[11]
106
SignalExport.triggerChannel<1><012>=BRAM_data[12]
107
SignalExport.triggerChannel<1><013>=BRAM_data[13]
108
SignalExport.triggerChannel<1><014>=BRAM_data[14]
109
SignalExport.triggerChannel<1><015>=BRAM_data[15]
110
SignalExport.triggerChannel<1><016>=BRAM_data[16]
111
SignalExport.triggerChannel<1><017>=BRAM_data[17]
112
SignalExport.triggerChannel<1><018>=BRAM_data[18]
113
SignalExport.triggerChannel<1><019>=BRAM_data[19]
114
SignalExport.triggerChannel<1><020>=BRAM_data[20]
115
SignalExport.triggerChannel<1><021>=BRAM_data[21]
116
SignalExport.triggerChannel<1><022>=BRAM_data[22]
117
SignalExport.triggerChannel<1><023>=BRAM_data[23]
118
SignalExport.triggerChannel<1><024>=BRAM_data[24]
119
SignalExport.triggerChannel<1><025>=BRAM_data[25]
120
SignalExport.triggerChannel<1><026>=BRAM_data[26]
121
SignalExport.triggerChannel<1><027>=BRAM_data[27]
122
SignalExport.triggerChannel<1><028>=BRAM_data[28]
123
SignalExport.triggerChannel<1><029>=BRAM_data[29]
124
SignalExport.triggerChannel<1><030>=BRAM_data[30]
125
SignalExport.triggerChannel<1><031>=BRAM_data[31]
126
SignalExport.triggerChannel<1><032>=BRAM_data[32]
127
SignalExport.triggerChannel<1><033>=BRAM_data[33]
128
SignalExport.triggerChannel<1><034>=BRAM_data[34]
129
SignalExport.triggerChannel<1><035>=BRAM_data[35]
130
SignalExport.triggerChannel<1><036>=BRAM_data[36]
131
SignalExport.triggerChannel<1><037>=BRAM_data[37]
132
SignalExport.triggerChannel<1><038>=BRAM_data[38]
133
SignalExport.triggerChannel<1><039>=BRAM_data[39]
134
SignalExport.triggerChannel<1><040>=BRAM_data[40]
135
SignalExport.triggerChannel<1><041>=BRAM_data[41]
136
SignalExport.triggerChannel<1><042>=BRAM_data[42]
137
SignalExport.triggerChannel<1><043>=BRAM_data[43]
138
SignalExport.triggerChannel<1><044>=BRAM_data[44]
139
SignalExport.triggerChannel<1><045>=BRAM_data[45]
140
SignalExport.triggerChannel<1><046>=BRAM_data[46]
141
SignalExport.triggerChannel<1><047>=BRAM_data[47]
142
SignalExport.triggerChannel<1><048>=BRAM_data[48]
143
SignalExport.triggerChannel<1><049>=BRAM_data[49]
144
SignalExport.triggerChannel<1><050>=BRAM_data[50]
145
SignalExport.triggerChannel<1><051>=BRAM_data[51]
146
SignalExport.triggerChannel<1><052>=BRAM_data[52]
147
SignalExport.triggerChannel<1><053>=BRAM_data[53]
148
SignalExport.triggerChannel<1><054>=BRAM_data[54]
149
SignalExport.triggerChannel<1><055>=BRAM_data[55]
150
SignalExport.triggerChannel<1><056>=BRAM_data[56]
151
SignalExport.triggerChannel<1><057>=BRAM_data[57]
152
SignalExport.triggerChannel<1><058>=BRAM_data[58]
153
SignalExport.triggerChannel<1><059>=BRAM_data[59]
154
SignalExport.triggerChannel<1><060>=BRAM_data[60]
155
SignalExport.triggerChannel<1><061>=BRAM_data[61]
156
SignalExport.triggerChannel<1><062>=BRAM_data[62]
157
SignalExport.triggerChannel<1><063>=BRAM_data[63]
158
SignalExport.triggerChannel<2><000>=FIFO_empty[0]
159
SignalExport.triggerChannel<3><000>=FIFo_rd_en[0]
160
SignalExport.triggerChannel<4><000>=FIFO_wr_en[0]
161
SignalExport.triggerChannel<5><000>=FIFO_data_in_out[0]
162
SignalExport.triggerChannel<5><001>=FIFO_data_in_out[1]
163
SignalExport.triggerChannel<5><002>=FIFO_data_in_out[2]
164
SignalExport.triggerChannel<5><003>=FIFO_data_in_out[3]
165
SignalExport.triggerChannel<5><004>=FIFO_data_in_out[4]
166
SignalExport.triggerChannel<5><005>=FIFO_data_in_out[5]
167
SignalExport.triggerChannel<5><006>=FIFO_data_in_out[6]
168
SignalExport.triggerChannel<5><007>=FIFO_data_in_out[7]
169
SignalExport.triggerChannel<5><008>=FIFO_data_in_out[8]
170
SignalExport.triggerChannel<5><009>=FIFO_data_in_out[9]
171
SignalExport.triggerChannel<5><010>=FIFO_data_in_out[10]
172
SignalExport.triggerChannel<5><011>=FIFO_data_in_out[11]
173
SignalExport.triggerChannel<5><012>=FIFO_data_in_out[12]
174
SignalExport.triggerChannel<5><013>=FIFO_data_in_out[13]
175
SignalExport.triggerChannel<5><014>=FIFO_data_in_out[14]
176
SignalExport.triggerChannel<5><015>=FIFO_data_in_out[15]
177
SignalExport.triggerChannel<5><016>=FIFO_data_in_out[16]
178
SignalExport.triggerChannel<5><017>=FIFO_data_in_out[17]
179
SignalExport.triggerChannel<5><018>=FIFO_data_in_out[18]
180
SignalExport.triggerChannel<5><019>=FIFO_data_in_out[19]
181
SignalExport.triggerChannel<5><020>=FIFO_data_in_out[20]
182
SignalExport.triggerChannel<5><021>=FIFO_data_in_out[21]
183
SignalExport.triggerChannel<5><022>=FIFO_data_in_out[22]
184
SignalExport.triggerChannel<5><023>=FIFO_data_in_out[23]
185
SignalExport.triggerChannel<5><024>=FIFO_data_in_out[24]
186
SignalExport.triggerChannel<5><025>=FIFO_data_in_out[25]
187
SignalExport.triggerChannel<5><026>=FIFO_data_in_out[26]
188
SignalExport.triggerChannel<5><027>=FIFO_data_in_out[27]
189
SignalExport.triggerChannel<5><028>=FIFO_data_in_out[28]
190
SignalExport.triggerChannel<5><029>=FIFO_data_in_out[29]
191
SignalExport.triggerChannel<5><030>=FIFO_data_in_out[30]
192
SignalExport.triggerChannel<5><031>=FIFO_data_in_out[31]
193
SignalExport.triggerChannel<5><032>=FIFO_data_in_out[32]
194
SignalExport.triggerChannel<5><033>=FIFO_data_in_out[33]
195
SignalExport.triggerChannel<5><034>=FIFO_data_in_out[34]
196
SignalExport.triggerChannel<5><035>=FIFO_data_in_out[35]
197
SignalExport.triggerChannel<5><036>=FIFO_data_in_out[36]
198
SignalExport.triggerChannel<5><037>=FIFO_data_in_out[37]
199
SignalExport.triggerChannel<5><038>=FIFO_data_in_out[38]
200
SignalExport.triggerChannel<5><039>=FIFO_data_in_out[39]
201
SignalExport.triggerChannel<5><040>=FIFO_data_in_out[40]
202
SignalExport.triggerChannel<5><041>=FIFO_data_in_out[41]
203
SignalExport.triggerChannel<5><042>=FIFO_data_in_out[42]
204
SignalExport.triggerChannel<5><043>=FIFO_data_in_out[43]
205
SignalExport.triggerChannel<5><044>=FIFO_data_in_out[44]
206
SignalExport.triggerChannel<5><045>=FIFO_data_in_out[45]
207
SignalExport.triggerChannel<5><046>=FIFO_data_in_out[46]
208
SignalExport.triggerChannel<5><047>=FIFO_data_in_out[47]
209
SignalExport.triggerChannel<5><048>=FIFO_data_in_out[48]
210
SignalExport.triggerChannel<5><049>=FIFO_data_in_out[49]
211
SignalExport.triggerChannel<5><050>=FIFO_data_in_out[50]
212
SignalExport.triggerChannel<5><051>=FIFO_data_in_out[51]
213
SignalExport.triggerChannel<5><052>=FIFO_data_in_out[52]
214
SignalExport.triggerChannel<5><053>=FIFO_data_in_out[53]
215
SignalExport.triggerChannel<5><054>=FIFO_data_in_out[54]
216
SignalExport.triggerChannel<5><055>=FIFO_data_in_out[55]
217
SignalExport.triggerChannel<5><056>=FIFO_data_in_out[56]
218
SignalExport.triggerChannel<5><057>=FIFO_data_in_out[57]
219
SignalExport.triggerChannel<5><058>=FIFO_data_in_out[58]
220
SignalExport.triggerChannel<5><059>=FIFO_data_in_out[59]
221
SignalExport.triggerChannel<5><060>=FIFO_data_in_out[60]
222
SignalExport.triggerChannel<5><061>=FIFO_data_in_out[61]
223
SignalExport.triggerChannel<5><062>=FIFO_data_in_out[62]
224
SignalExport.triggerChannel<5><063>=FIFO_data_in_out[63]
225
SignalExport.triggerChannel<5><064>=FIFO_data_in_out[64]
226
SignalExport.triggerChannel<5><065>=FIFO_data_in_out[65]
227
SignalExport.triggerChannel<5><066>=FIFO_data_in_out[66]
228
SignalExport.triggerChannel<5><067>=FIFO_data_in_out[67]
229
SignalExport.triggerChannel<5><068>=FIFO_data_in_out[68]
230
SignalExport.triggerChannel<5><069>=FIFO_data_in_out[69]
231
SignalExport.triggerChannel<5><070>=FIFO_data_in_out[70]
232
SignalExport.triggerChannel<5><071>=FIFO_data_in_out[71]
233
SignalExport.triggerChannel<6><000>=FIFO_rd_pempty[0]
234
SignalExport.triggerChannel<7><000>=FIFO_rd_count[0]
235
SignalExport.triggerChannel<7><001>=FIFO_rd_count[1]
236
SignalExport.triggerChannel<7><002>=FIFO_rd_count[2]
237
SignalExport.triggerChannel<7><003>=FIFO_rd_count[3]
238
SignalExport.triggerChannel<7><004>=FIFO_rd_count[4]
239
SignalExport.triggerChannel<7><005>=FIFO_rd_count[5]
240
SignalExport.triggerChannel<7><006>=FIFO_rd_count[6]
241
SignalExport.triggerChannel<7><007>=FIFO_rd_count[7]
242
SignalExport.triggerChannel<7><008>=FIFO_rd_count[8]
243
SignalExport.triggerChannel<7><009>=FIFO_rd_count[9]
244
SignalExport.triggerChannel<7><010>=FIFO_rd_count[10]
245
SignalExport.triggerChannel<7><011>=FIFO_rd_count[11]
246
SignalExport.triggerChannel<7><012>=FIFO_rd_count[12]
247
SignalExport.triggerChannel<7><013>=FIFO_rd_count[13]
248
SignalExport.triggerChannel<7><014>=FIFO_rd_count[14]
249
SignalExport.triggerChannel<8><000>=FIFO_wr_full[0]
250
SignalExport.triggerChannel<9><000>=FIFO_wr_pfull[0]
251
SignalExport.triggerChannel<10><000>=FIFO_wr_count[0]
252
SignalExport.triggerChannel<10><001>=FIFO_wr_count[1]
253
SignalExport.triggerChannel<10><002>=FIFO_wr_count[2]
254
SignalExport.triggerChannel<10><003>=FIFO_wr_count[3]
255
SignalExport.triggerChannel<10><004>=FIFO_wr_count[4]
256
SignalExport.triggerChannel<10><005>=FIFO_wr_count[5]
257
SignalExport.triggerChannel<10><006>=FIFO_wr_count[6]
258
SignalExport.triggerChannel<10><007>=FIFO_wr_count[7]
259
SignalExport.triggerChannel<10><008>=FIFO_wr_count[8]
260
SignalExport.triggerChannel<10><009>=FIFO_wr_count[9]
261
SignalExport.triggerChannel<10><010>=FIFO_wr_count[10]
262
SignalExport.triggerChannel<10><011>=FIFO_wr_count[11]
263
SignalExport.triggerChannel<10><012>=FIFO_wr_count[12]
264
SignalExport.triggerChannel<10><013>=FIFO_wr_count[13]
265
SignalExport.triggerChannel<10><014>=FIFO_wr_count[14]
266
SignalExport.triggerPort<0>.name=BRAM_addr
267
SignalExport.triggerPort<1>.name=BRAM_data
268
SignalExport.triggerPort<2>.name=FIFO_empty
269
SignalExport.triggerPort<3>.name=FIFo_rd_en
270
SignalExport.triggerPort<4>.name=FIFO_wr_en
271
SignalExport.triggerPort<5>.name=FIFO_data_in_out
272
SignalExport.triggerPort<6>.name=FIFO_rd_pempty
273
SignalExport.triggerPort<7>.name=FIFO_rd_count
274
SignalExport.triggerPort<8>.name=FIFO_wr_full
275
SignalExport.triggerPort<9>.name=FIFO_wr_pfull
276
SignalExport.triggerPort<10>.name=FIFO_wr_count
277
SignalExport.triggerPortCount=11
278
SignalExport.triggerPortWidth<0>=12
279
SignalExport.triggerPortWidth<1>=64
280
SignalExport.triggerPortWidth<2>=1
281
SignalExport.triggerPortWidth<3>=1
282
SignalExport.triggerPortWidth<4>=1
283
SignalExport.triggerPortWidth<5>=72
284
SignalExport.triggerPortWidth<6>=1
285
SignalExport.triggerPortWidth<7>=15
286
SignalExport.triggerPortWidth<8>=1
287
SignalExport.triggerPortWidth<9>=1
288
SignalExport.triggerPortWidth<10>=15
289
SignalExport.type=ila

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