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[/] [plasma_fpu/] [trunk/] [src/] [subunits/] [plasma_pc.vhd] - Blame information for rev 2

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1 2 __alexs__
-- --------------------------------------------------------------------------
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-- >>>>>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<<<<
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-- --------------------------------------------------------------------------
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-- TITLE:       Plasma PROGRAM COUNTER
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-- AUTHOR:      Alex Schoenberger (Alex.Schoenberger@ies.tu-darmstadt.de)
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-- COMMENT:     This project is based on Plasma CPU core by Steve Rhoads
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--
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-- www.ies.tu-darmstadt.de
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-- TU Darmstadt
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-- Institute for Integrated Systems
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-- Merckstr. 25
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-- 
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-- 64283 Darmstadt - GERMANY
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-- --------------------------------------------------------------------------
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-- PROJECT:       Plasma CPU core with FPU
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-- FILENAME:      plasma_pc.vhd
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-- --------------------------------------------------------------------------
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-- COPYRIGHT: 
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--  This project is distributed by GPLv2.0
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--  Software placed into the public domain by the author.
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--  Software 'as is' without warranty.  Author liable for nothing.
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-- --------------------------------------------------------------------------
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-- DESCRIPTION:
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--    program counter logic, pc-register, imm<->inc mux, control input
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--
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--    NOT SYNTHESIZABLE
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--
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----------------------------------------------------------------------------
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-- Revision History
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-- --------------------------------------------------------------------------
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-- Revision   Date    Author     CHANGES
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-- 1.0      4/2014    AS         initial
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-- --------------------------------------------------------------------------
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library IEEE;
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   use IEEE.std_logic_1164.ALL;
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   use IEEE.numeric_std.ALL;
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library PLASMA;
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  use PLASMA.plasma_pack.ALL;
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entity plasma_pc is
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    port(
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      control                 : in  t_main_control;
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      stall                   : in  std_logic;
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      pc_new_value            : in  t_plasma_word;
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      pc_imm_in               : in  t_plasma_word;
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      pc_out                  : out t_plasma_pc_out
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    );
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end entity plasma_pc;
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architecture structure_plasma_pc of plasma_pc is
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  -- pc register
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  signal reg_pc               : t_plasma_word  := (others => '0');
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  -- pc calculated values
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  signal i_pc_inc             : t_plasma_word;
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  signal i_pc_branch          : t_plasma_word;
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begin
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  -- INCREMENTATION
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  i_pc_inc      <= std_logic_vector(unsigned(reg_pc) + unsigned(PLASMA_INC_WORD));
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  -- BRANCH VALUE
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  i_pc_branch   <= std_logic_vector(unsigned(reg_pc) + unsigned(pc_imm_in));
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 -- PC REGISTER
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pc_register:process( control.clk )
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  begin
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    if rising_edge( control.clk ) then
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      if control.rst = '1' then
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        reg_pc          <= PLASMA_ZERO_WORD;
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      else
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        if stall = '0' then
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          reg_pc        <= pc_new_value;
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        end if;
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      end if;
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    end if;
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  end process;
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  -- OUTPUT
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  pc_out.pc_out           <= reg_pc;
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  pc_out.pc_out_inc       <= i_pc_inc;
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  pc_out.pc_out_branch    <= i_pc_branch;
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end architecture structure_plasma_pc;

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