OpenCores
URL https://opencores.org/ocsvn/popcount_gen/popcount_gen/trunk

Subversion Repositories popcount_gen

[/] [popcount_gen/] [trunk/] [FPGA_MaxPars_Gen.c] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 NikosAl 
/*  FPGA_MaxPars (version 1.0) A program to generate VHDL wrapper files
2 
 *  for the computational kernel of the Maximum Parsinomy FPGA Architecture.
3 
 *
4 
 *  Copyright March 2011 by Nikolaos Ch. Alachiotis
5 
 *
6 
 *  This program is free software; you may redistribute it and/or modify its
7 
 *  under the terms of the GNU General Public License as published by the Free
8 
 *  Software Foundation; either version 2 of the License, or (at your option)
9 
 *  any later version.
10 
 *
11 
 *  This program is distributed in the hope that it will be useful, but
12 
 *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 
 *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14 
 *  for more details.
15 
 *
16 
 *  The wrapper files generated by the FPGA_MaxPars as well as all the other
17 
 *  VHDL files that form the implementation of the Maximum Parsimony FPGA
18 
 *  Architecture can be used under the terms of the GNU General Public License.
19 
 *
20 
 *  Furthermore, the POPCOUNT component, which solves the population count problem
21 
 *  by generating a pipelined tree of adders, might as well be used outside the
22 
 *  context of the Maximum Parsimony FPGA Architecture under the terms of the
23 
 *  GNU Lesser General Public License.
24 
 *
25 
 *  The POPCOUNT module is vendor and device independent.
26 
 *
27 
 *  For any other enquiries send an Email to Nikolaos Alachiotis
28 
 *  n.alachiotis@gmail.com
29 
 */
30 
 
31 
 
32 
#include<stdio.h>
33 
#include<stdlib.h>
34 
 
35 
#define SIZE_MODE 0
36 
#define CONFIG_MODE 1
37 
#define CREATE_MODE 2
38 
 
39 
FILE * ADDER_FP;
40 
FILE * MPPRU_FP;
41 
FILE * TOP_FP;
42 
 
43 
int INPUT_LOAD;
44 
int ADDER_LOAD;
45 
int SIGNAL_LOAD;
46 
int MAX_CODE;
47 
int PPC_SIZE;
48 
int LATENCY;
49 
 
50 
int BITVEC_INDEX;
51 
int inputbitvector[16];
52 
int * registerpositions;
53 
 
54 
typedef struct{
55 
 
56 
 int inst_sz;
57 
 int inst_ind;
58 
 int inpA_num;
59 
 int inpB_num;
60 
 int outC_num;
61 
 
62 
}adder_config;
63 
 
64 
adder_config * ADD_CONFIG;
65 
int ADD_CONFIG_IND;
66 
 
67 
typedef struct{
68 
 
69 
 int type;
70 
 int code;
71 
 int size;
72 
 
73 
}signal_config;
74 
 
75 
void getbitvector(int input)
76 
{
77 
        int i=0;
78 
        int div=0;
79 
        int mod=0;
80 
 
81 
        for(i=0;i<16;i++)
82 
        {
83 
                inputbitvector[i]=0;
84 
        }
85 
 
86 
        div = input;
87 
 
88 
        i=15;
89 
 
90 
        while(div!=0)
91 
        {
92 
                mod = div%2;
93 
                div = div/2;
94 
                inputbitvector[i--]=mod;
95 
 
96 
        }
97 
 
98 
        fprintf(TOP_FP,"\ncurSIZE <= \"");
99 
        for(i=0;i<16;i++)
100 
        {
101 
                fprintf(TOP_FP, "%d",inputbitvector[i]);
102 
        }
103 
        fprintf(TOP_FP,"\";\n");
104 
}
105 
 
106 
signal_config * SIG_CONFIG;
107 
int SIG_CONFIG_IND;
108 
 
109 
int connect_input(int load, int MODE)
110 
{
111 
        int i;
112 
 
113 
        for(i=load-1;i>-1;i--)
114 
        {
115 
                if(MODE==SIZE_MODE)
116 
                {
117 
                        SIGNAL_LOAD+=2;
118 
                }
119 
                if(MODE==CONFIG_MODE)
120 
                {
121 
                        SIG_CONFIG[SIG_CONFIG_IND].type=1;
122 
                        SIG_CONFIG[SIG_CONFIG_IND].code=1;
123 
                        SIG_CONFIG[SIG_CONFIG_IND].size=i;
124 
                        SIG_CONFIG_IND++;
125 
                        SIG_CONFIG[SIG_CONFIG_IND].type=3;
126 
                        SIG_CONFIG[SIG_CONFIG_IND].code=1;
127 
                        SIG_CONFIG[SIG_CONFIG_IND].size=i;
128 
                        SIG_CONFIG_IND++;
129 
                }
130 
        }
131 
        return load;
132 
}
133 
 
134 
int connect_output_to_input_next(int pos, int load, int MODE)
135 
{
136 
        int i;
137 
        for(i=load-1;i>-1;i--)
138 
        {
139 
                if(MODE==SIZE_MODE)
140 
                {
141 
                        SIGNAL_LOAD += 3;
142 
                }
143 
                if(MODE==CONFIG_MODE)
144 
                {
145 
                        SIG_CONFIG[SIG_CONFIG_IND].type=1;
146 
                        SIG_CONFIG[SIG_CONFIG_IND].code=pos;
147 
                        SIG_CONFIG[SIG_CONFIG_IND].size=i;
148 
                        SIG_CONFIG_IND++;
149 
                        SIG_CONFIG[SIG_CONFIG_IND].type=2;
150 
                        SIG_CONFIG[SIG_CONFIG_IND].code=pos-1;
151 
                        SIG_CONFIG[SIG_CONFIG_IND].size=i;
152 
                        SIG_CONFIG_IND++;
153 
                        SIG_CONFIG[SIG_CONFIG_IND].type=4;
154 
                        SIG_CONFIG[SIG_CONFIG_IND].code=pos;
155 
                        SIG_CONFIG[SIG_CONFIG_IND].size=i;
156 
                        SIG_CONFIG_IND++;
157 
 
158 
                }
159 
                if(MODE==CREATE_MODE)
160 
                {
161 
                        fprintf(ADDER_FP,"INPUT_%d_%d <= OUTPUT_%d_%d;\n",pos,i,pos-1,i);
162 
                }
163 
 
164 
        }
165 
}
166 
 
167 
int adder_line(int line_pos, int load, int arg, int MODE)
168 
{
169 
        int next_load=0, i, i_init, i_last, sig_arg_ind;
170 
 
171 
        if(arg==1)
172 
        {
173 
           sig_arg_ind = load * 2;
174 
           i_init = load;
175 
           i_last = 0;
176 
        }
177 
        else
178 
        {
179 
                sig_arg_ind = load * 2-1;
180 
                i_init = load-1;
181 
                i_last = -1;
182 
        }
183 
 
184 
        for(i=i_init;i>i_last;i--)
185 
        {
186 
                if(MODE==SIZE_MODE)
187 
                {
188 
                        ADDER_LOAD++;
189 
                }
190 
                if(MODE==CONFIG_MODE)
191 
                {
192 
                        ADD_CONFIG[ADD_CONFIG_IND].inst_sz=line_pos;
193 
                        if(ADD_CONFIG[ADD_CONFIG_IND].inst_sz>MAX_CODE)
194 
                        {
195 
                                MAX_CODE = ADD_CONFIG[ADD_CONFIG_IND].inst_sz;
196 
                        }
197 
                        ADD_CONFIG[ADD_CONFIG_IND].inst_ind=i;
198 
                        ADD_CONFIG[ADD_CONFIG_IND].inpA_num=sig_arg_ind--;
199 
                        ADD_CONFIG[ADD_CONFIG_IND].inpB_num=sig_arg_ind--;
200 
                        ADD_CONFIG[ADD_CONFIG_IND].outC_num=i;
201 
                        ADD_CONFIG_IND++;
202 
 
203 
 
204 
                }
205 
                if(MODE==CREATE_MODE)
206 
                {
207 
                        fprintf(ADDER_FP,"ADD_%d_INST_%d: ADD_%d Port Map\n",line_pos,i,line_pos);
208 
                        fprintf(ADDER_FP,"(\n");
209 
                        fprintf(ADDER_FP," ADD_%d_IN_A => INPUT_%d_%d,\n",line_pos,line_pos,sig_arg_ind--);
210 
                        fprintf(ADDER_FP," ADD_%d_IN_B => INPUT_%d_%d,\n",line_pos,line_pos,sig_arg_ind--);
211 
                        fprintf(ADDER_FP," ADD_%d_OUT  => OUTPUT_%d_%d\n",line_pos,line_pos,i);
212 
                        fprintf(ADDER_FP,");\n");
213 
                }
214 
                next_load++;
215 
        }
216 
 
217 
        if(arg==1)
218 
        {
219 
                if(MODE==SIZE_MODE)
220 
                {
221 
                        SIGNAL_LOAD++;
222 
                }
223 
                if(MODE==CONFIG_MODE)
224 
                {
225 
                        SIG_CONFIG[SIG_CONFIG_IND].type=5;
226 
                        SIG_CONFIG[SIG_CONFIG_IND].code=line_pos;
227 
                        SIG_CONFIG[SIG_CONFIG_IND].size=0;
228 
                        SIG_CONFIG_IND++;
229 
 
230 
 
231 
                }
232 
                if(MODE==CREATE_MODE)
233 
                {
234 
                        fprintf(ADDER_FP,"OUTPUT_%d_0 <= INPUT_%d_0;\n",line_pos,line_pos);
235 
                }
236 
 
237 
                next_load++;
238 
 
239 
        }
240 
        return next_load;
241 
}
242 
 
243 
int calc_line_load(int load)
244 
{
245 
        return load/2;
246 
}
247 
int calc_line_arrangement(int load)
248 
{
249 
        if((load%2)==0)
250 
        {
251 
                return 2;
252 
        }
253 
        else
254 
        {
255 
                return 1;
256 
        }
257 
}
258 
 
259 
void connect_toplevel_input()
260 
{
261 
        int i;
262 
        for (i=0;i<SIGNAL_LOAD;i++)
263 
        {
264 
                if(SIG_CONFIG[i].type==3)
265 
                {
266 
                        fprintf(ADDER_FP,"INPUT_%d_%d(0) <= invec(%d);\n",SIG_CONFIG[i].code,SIG_CONFIG[i].size,SIG_CONFIG[i].size);
267 
                }
268 
        }
269 
}
270 
 
271 
void create_signals()
272 
{
273 
        int i;
274 
        fprintf(ADDER_FP,"\n\n");
275 
        for (i=0;i<SIGNAL_LOAD;i++)
276 
        {
277 
                if(SIG_CONFIG[i].type==1 && SIG_CONFIG[i].code<=MAX_CODE)
278 
                {
279 
                        fprintf(ADDER_FP,"signal INPUT_%d_%d : std_logic_vector(%d downto 0);\n",SIG_CONFIG[i].code,SIG_CONFIG[i].size,SIG_CONFIG[i].code-1);
280 
                }
281 
                if(SIG_CONFIG[i].type==2 && SIG_CONFIG[i].code<=MAX_CODE)
282 
                {
283 
                        fprintf(ADDER_FP,"signal OUTPUT_%d_%d : std_logic_vector(%d downto 0);\n",SIG_CONFIG[i].code,SIG_CONFIG[i].size,SIG_CONFIG[i].code);
284 
                }
285 
        }
286 
}
287 
 
288 
void instantiate_adders()
289 
{
290 
        int i;
291 
        fprintf(ADDER_FP,"\n\n");
292 
        for (i=0;i<ADDER_LOAD;i++)
293 
        {
294 
                fprintf(ADDER_FP,"ADD_%d_INST_%d: ADD_%d Port Map\n",ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].inst_ind,ADD_CONFIG[i].inst_sz);
295 
                fprintf(ADDER_FP,"(\n");
296 
                fprintf(ADDER_FP," ADD_%d_IN_A => INPUT_%d_%d,\n",ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].inpA_num);
297 
                fprintf(ADDER_FP," ADD_%d_IN_B => INPUT_%d_%d,\n",ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].inpB_num);
298 
                fprintf(ADDER_FP," ADD_%d_OUT  => OUTPUT_%d_%d\n",ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].inst_sz,ADD_CONFIG[i].outC_num);
299 
                fprintf(ADDER_FP,");\n");
300 
        }
301 
        for(i=0;i<SIGNAL_LOAD;i++)
302 
        {
303 
                if(SIG_CONFIG[i].type==5)
304 
                {
305 
                        fprintf(ADDER_FP,"OUTPUT_%d_0(%d) <= '0';\n",SIG_CONFIG[i].code,SIG_CONFIG[i].code);
306 
                        fprintf(ADDER_FP,"OUTPUT_%d_0(%d downto 0) <= INPUT_%d_0;\n",SIG_CONFIG[i].code,SIG_CONFIG[i].code-1,SIG_CONFIG[i].code);
307 
                }
308 
        }
309 
}
310 
 
311 
void make_interconnections()
312 
{
313 
        int i, registered, regindex;
314 
        fprintf(ADDER_FP,"\n\n");
315 
        registered=0;
316 
        regindex=0;
317 
 
318 
        for (i=0;i<SIGNAL_LOAD;i++)
319 
        {
320 
                if(SIG_CONFIG[i].type==4)
321 
                {
322 
                        if(SIG_CONFIG[i].code!=MAX_CODE+1)
323 
                        {
324 
                                if(SIG_CONFIG[i].code==registerpositions[regindex]+1)
325 
                                {
326 
                                        if (registered==0)
327 
                                        {
328 
                                                fprintf(ADDER_FP,"\nprocess(clk)\nbegin\nif clk'event and clk='1' then\n\n");
329 
                                                registered=1;
330 
                                        }
331 
                                }
332 
 
333 
                                if(SIG_CONFIG[i].code!=registerpositions[regindex]+1)
334 
                                {
335 
                                        if(registered==1)
336 
                                        {
337 
                                                fprintf(ADDER_FP,"\nend if;\nend process;\n\n");
338 
                                                registered=0;
339 
                                                regindex++;
340 
                                        }
341 
                                }
342 
 
343 
                                if(registered==1)
344 
                                {
345 
                                        fprintf(ADDER_FP,"\t");
346 
                                }
347 
 
348 
                                fprintf(ADDER_FP,"INPUT_%d_%d <= OUTPUT_%d_%d;\n",SIG_CONFIG[i].code,SIG_CONFIG[i].size,SIG_CONFIG[i].code-1,SIG_CONFIG[i].size);
349 
 
350 
                                if((SIG_CONFIG[i].code==registerpositions[regindex]+1) && SIG_CONFIG[i].size==0)
351 
                                {
352 
                                        if(registered==1)
353 
                                        {
354 
                                                fprintf(ADDER_FP,"\nend if;\nend process;\n\n");
355 
                                                registered=0;
356 
                                                regindex++;
357 
                                        }
358 
                                }
359 
                        }
360 
                        else
361 
                        {
362 
                                fprintf(ADDER_FP,"\n\n");
363 
                                fprintf(ADDER_FP,"process(clk)\nbegin\nif clk'event and clk='1' then\n",SIG_CONFIG[i].code);
364 
                                fprintf(ADDER_FP,"   value(31 downto %d)<= (others=>'0');\n",SIG_CONFIG[i].code);
365 
                                fprintf(ADDER_FP,"   value(%d downto 0)<= OUTPUT_%d_%d;\nend if;\nend process;",SIG_CONFIG[i].code-1,SIG_CONFIG[i].code-1,SIG_CONFIG[i].size);
366 
                                fprintf(ADDER_FP,"\n\nend Behavioral;");
367 
                        }
368 
                }
369 
        }
370 
}
371 
 
372 
void component_short_ADDER(int size, FILE * fp)
373 
{
374 
        fprintf(ADDER_FP,"\n\n");
375 
        fprintf(ADDER_FP,"component ADD_%d is\n",size);
376 
        fprintf(ADDER_FP,"Port ( ADD_%d_IN_A: in STD_LOGIC_VECTOR(%d downto 0);\n",size,size-1);
377 
        fprintf(ADDER_FP,"       ADD_%d_IN_B: in  STD_LOGIC_VECTOR(%d downto 0);\n",size,size-1);
378 
        fprintf(ADDER_FP,"       ADD_%d_OUT : out  STD_LOGIC_VECTOR(%d downto 0)\n",size,size);
379 
        fprintf(ADDER_FP,");\n");
380 
        fprintf(ADDER_FP,"end component;\n");
381 
}
382 
 
383 
void processADDER(int MODE)
384 
{
385 
        int line_load, line_load_next, line_arg, line_pos=0, i;
386 
 
387 
        if(MODE==SIZE_MODE)
388 
        {
389 
           ADDER_LOAD=0;
390 
           SIGNAL_LOAD=0;
391 
           MAX_CODE = -1;
392 
        }
393 
 
394 
        if(MODE==SIZE_MODE || MODE==CONFIG_MODE)
395 
        {
396 
                connect_input(INPUT_LOAD,MODE);
397 
 
398 
                line_load_next = INPUT_LOAD;
399 
 
400 
                while(line_load_next!=1)
401 
                {
402 
                        line_pos ++;
403 
                        line_load=calc_line_load(line_load_next);
404 
                        line_arg= calc_line_arrangement(line_load_next);
405 
                        line_load_next = adder_line(line_pos,line_load, line_arg, MODE);
406 
                        connect_output_to_input_next(line_pos+1, line_load_next,MODE);
407 
                }
408 
        }
409 
        else
410 
        {
411 
                create_signals();
412 
 
413 
                for(i=1;i<MAX_CODE+1;i++)
414 
                {
415 
                        component_short_ADDER(i, ADDER_FP);
416 
                }
417 
 
418 
                fprintf(ADDER_FP,"\n\nbegin\n\n");
419 
 
420 
                connect_toplevel_input();
421 
 
422 
                instantiate_adders();
423 
 
424 
                make_interconnections();
425 
 
426 
        }
427 
}
428 
 
429 
void preliminary_input(FILE *fp)
430 
{
431 
        fprintf(fp,"------------------------------------------------\n");
432 
        fprintf(fp,"-- Copyright (C) 2010 Nikolaos Ch. Alachiotis --\n");
433 
        fprintf(fp,"-- Contact: n.alachiotis@gmail.com            --\n");
434 
        fprintf(fp,"-- Details: This file has been generated by   --\n");
435 
        fprintf(fp,"--          the FPGA_MaxPars program.         --\n");
436 
        fprintf(fp,"------------------------------------------------\n");
437 
}
438 
 
439 
void libraries(FILE * fp)
440 
{
441 
        fprintf(fp,"\n\n");
442 
        fprintf(fp,"library IEEE;\n");
443 
        fprintf(fp,"use IEEE.STD_LOGIC_1164.ALL;\n");
444 
        fprintf(fp,"use IEEE.STD_LOGIC_ARITH.ALL;\n");
445 
        fprintf(fp,"use IEEE.STD_LOGIC_UNSIGNED.ALL;\n");
446 
 
447 
}
448 
 
449 
void entityADDER()
450 
{
451 
        fprintf(ADDER_FP,"\n\n");
452 
        fprintf(ADDER_FP,"entity POPCOUNT is\n");
453 
        fprintf(ADDER_FP,"Port ( clk : in  STD_LOGIC;\n");
454 
        fprintf(ADDER_FP,"       invec : in  STD_LOGIC_VECTOR(%d downto 0);\n",INPUT_LOAD-1);
455 
        fprintf(ADDER_FP,"       value : out  STD_LOGIC_VECTOR(31 downto 0)\n");
456 
        fprintf(ADDER_FP,");\n");
457 
        fprintf(ADDER_FP,"end POPCOUNT;\n");
458 
 
459 
}
460 
 
461 
void start_architectureADDER()
462 
{
463 
        fprintf(ADDER_FP,"\n\n");
464 
        fprintf(ADDER_FP,"architecture Behavioral of POPCOUNT is\n");
465 
}
466 
 
467 
void entity_short_ADDER(int size, FILE *fp)
468 
{
469 
        fprintf(ADDER_FP,"\n\n");
470 
        fprintf(ADDER_FP,"entity ADD_%d is\n",size);
471 
        fprintf(ADDER_FP,"Port ( ADD_%d_IN_A: in STD_LOGIC_VECTOR(%d downto 0);\n",size,size-1);
472 
        fprintf(ADDER_FP,"       ADD_%d_IN_B: in  STD_LOGIC_VECTOR(%d downto 0);\n",size,size-1);
473 
        fprintf(ADDER_FP,"       ADD_%d_OUT : out  STD_LOGIC_VECTOR(%d downto 0)\n",size,size);
474 
        fprintf(ADDER_FP,");\n");
475 
        fprintf(ADDER_FP,"end ADD_%d;\n",size);
476 
 
477 
 
478 
}
479 
 
480 
void start_architecture_short_ADDER(int size, FILE *fp)
481 
{
482 
        fprintf(fp,"\n\n");
483 
        fprintf(fp,"architecture Behavioral of ADD_%d is\n",size);
484 
}
485 
void finish_architecture_short_ADDER(int size, FILE * fp)
486 
{
487 
        fprintf(fp,"\nsignal tinput_A : std_logic_vector(%d downto 0);\n",size);
488 
        fprintf(fp,"signal tinput_B : std_logic_vector(%d downto 0);\n",size);
489 
        fprintf(fp,"signal toutput : std_logic_vector(%d downto 0);\n",size);
490 
 
491 
        fprintf(fp,"\nbegin\n\n");
492 
 
493 
        fprintf(fp,"tinput_A(%d)<='0';\ntinput_A(%d downto 0) <= ADD_%d_IN_A;\n",size,size-1,size);
494 
        fprintf(fp,"tinput_B(%d)<='0';\ntinput_B(%d downto 0) <= ADD_%d_IN_B;\n",size,size-1,size);
495 
        fprintf(fp,"toutput <= tinput_A + tinput_B;\n",size);
496 
 
497 
        fprintf(fp,"ADD_%d_OUT <= toutput;\n",size);
498 
        fprintf(fp,"\nend Behavioral;\n");
499 
 
500 
}
501 
 
502 
void create_short_adder(int size, FILE * fp)
503 
{
504 
        libraries(fp);
505 
        entity_short_ADDER(size,fp);
506 
        start_architecture_short_ADDER(size,fp);
507 
        finish_architecture_short_ADDER(size,fp);
508 
}
509 
 
510 
 
511 
void entityPPC()
512 
{
513 
        fprintf(MPPRU_FP,"\n\n");
514 
        fprintf(MPPRU_FP,"entity PPC is\n");
515 
        fprintf(MPPRU_FP,"Port ( clk : in  STD_LOGIC;\n\n");
516 
 
517 
        fprintf(MPPRU_FP,"       tip_addr : in  STD_LOGIC_VECTOR(10 downto 0);\n");
518 
        fprintf(MPPRU_FP,"       tip_we : in  STD_LOGIC_VECTOR(0 downto 0);\n");
519 
        fprintf(MPPRU_FP,"       tip_din : in  STD_LOGIC_VECTOR(7 downto 0);\n");
520 
        fprintf(MPPRU_FP,"       tip_we_nxt : out  STD_LOGIC_VECTOR(0 downto 0);\n\n");
521 
 
522 
        fprintf(MPPRU_FP,"       sel_vec : in  STD_LOGIC_VECTOR(2 downto 0);\n");
523 
        fprintf(MPPRU_FP,"       addrA : in  STD_LOGIC_VECTOR(10 downto 0);\n");
524 
        fprintf(MPPRU_FP,"       addrB : in  STD_LOGIC_VECTOR(10 downto 0);\n");
525 
        fprintf(MPPRU_FP,"       addrC : in  STD_LOGIC_VECTOR(10 downto 0);\n");
526 
        fprintf(MPPRU_FP,"       addrD : in  STD_LOGIC_VECTOR(10 downto 0);\n");
527 
        fprintf(MPPRU_FP,"       WRCNTRL : in  STD_LOGIC_VECTOR(13 downto 0);\n");
528 
        fprintf(MPPRU_FP,"       POPCOUNTvector : out  STD_LOGIC_VECTOR(%d downto 0)\n",INPUT_LOAD-1);
529 
        fprintf(MPPRU_FP,");\n");
530 
        fprintf(MPPRU_FP,"end PPC;\n");
531 
}
532 
 
533 
void start_architecturePPC()
534 
{
535 
        fprintf(MPPRU_FP,"\n\n");
536 
        fprintf(MPPRU_FP,"architecture Behavioral of PPC is\n");
537 
}
538 
 
539 
void componentPRU()
540 
{
541 
        fprintf(MPPRU_FP,"\n\n");
542 
        fprintf(MPPRU_FP,"component PRU_TOP is\n");
543 
        fprintf(MPPRU_FP,"  port (\n");
544 
        fprintf(MPPRU_FP,"    clk : in STD_LOGIC;\n");
545 
        fprintf(MPPRU_FP,"    tip_addr : in  STD_LOGIC_VECTOR(10 downto 0);\n");
546 
        fprintf(MPPRU_FP,"    tip_we : in  STD_LOGIC_VECTOR(0 downto 0);\n");
547 
        fprintf(MPPRU_FP,"    tip_din : in  STD_LOGIC_VECTOR(7 downto 0);\n");
548 
        fprintf(MPPRU_FP,"    tip_we_nxt : out  STD_LOGIC_VECTOR(0 downto 0);\n");
549 
        fprintf(MPPRU_FP,"    sel_vec : in  STD_LOGIC_VECTOR(2 downto 0);\n");
550 
        fprintf(MPPRU_FP,"    addrA : in STD_LOGIC_VECTOR(10 downto 0);\n");
551 
        fprintf(MPPRU_FP,"    addrB : in STD_LOGIC_VECTOR(10 downto 0);\n");
552 
        fprintf(MPPRU_FP,"    addrC : in STD_LOGIC_VECTOR(10 downto 0);\n");
553 
        fprintf(MPPRU_FP,"    addrD : in STD_LOGIC_VECTOR(10 downto 0);\n");
554 
        fprintf(MPPRU_FP,"    WRCNTRL : in STD_LOGIC_VECTOR(13 downto 0);\n");
555 
        fprintf(MPPRU_FP,"    countBITs : out STD_LOGIC_VECTOR(1 downto 0)\n");
556 
        fprintf(MPPRU_FP,"  );\n");
557 
        fprintf(MPPRU_FP,"end component;\n");
558 
 
559 
}
560 
 
561 
void instantiatePRU(int index)
562 
{
563 
        fprintf(MPPRU_FP,"\n-----------------------\n");
564 
        fprintf(MPPRU_FP,"-- Processing Unit %d --\n",index);
565 
        fprintf(MPPRU_FP,"-----------------------\n");
566 
        fprintf(MPPRU_FP,"PRU_INST_%d: PRU_TOP Port Map\n", index);
567 
        fprintf(MPPRU_FP,"(\n");
568 
        fprintf(MPPRU_FP,"  clk => clk,\n");
569 
        fprintf(MPPRU_FP,"  tip_addr => tip_addr,\n");
570 
        fprintf(MPPRU_FP,"  tip_we => tip_we_%d,\n",index);
571 
        fprintf(MPPRU_FP,"  tip_din => tip_din,\n");
572 
        if(index==PPC_SIZE)
573 
        {
574 
                fprintf(MPPRU_FP,"  tip_we_nxt => open,\n");
575 
        }
576 
        else
577 
        {
578 
                fprintf(MPPRU_FP,"  tip_we_nxt => tip_we_%d,\n",index+1);
579 
        }
580 
        fprintf(MPPRU_FP,"  sel_vec => sel_vec,\n");
581 
        fprintf(MPPRU_FP,"  addrA => addrA,\n");
582 
        fprintf(MPPRU_FP,"  addrB => addrB,\n");
583 
        fprintf(MPPRU_FP,"  addrC => addrC,\n");
584 
        fprintf(MPPRU_FP,"  addrD => addrD,\n");
585 
        fprintf(MPPRU_FP,"  WRCNTRL => WRCNTRL,\n");
586 
        fprintf(MPPRU_FP,"  countBITs => POPCOUNTvector(%d downto %d)\n", BITVEC_INDEX, BITVEC_INDEX-1);
587 
        fprintf(MPPRU_FP,");\n");
588 
 
589 
        BITVEC_INDEX = BITVEC_INDEX - 2;
590 
}
591 
 
592 
void signalsPPC()
593 
{
594 
        int i=0;
595 
 
596 
        fprintf(MPPRU_FP,"\n");
597 
 
598 
        for(i=1;i<=PPC_SIZE;i++)
599 
        {
600 
                fprintf(MPPRU_FP,"signal tip_we_%d: std_logic_vector(0 downto 0);\n",i);
601 
        }
602 
 
603 
        fprintf(MPPRU_FP,"\nbegin\n");
604 
 
605 
        fprintf(MPPRU_FP,"\ntip_we_1 <= tip_we;\n");
606 
 
607 
}
608 
 
609 
void end_file(FILE *fp)
610 
{
611 
        fprintf(fp,"\n\nend Behavioral;\n");
612 
}
613 
 
614 
 
615 
void entityMPEXT()
616 
{
617 
        fprintf(TOP_FP,"\n\n");
618 
        fprintf(TOP_FP,"entity MPEXT is\n");
619 
        fprintf(TOP_FP,"Port ( clk : in  STD_LOGIC;\n\n");
620 
        fprintf(TOP_FP,"       curSIZE : out  STD_LOGIC_VECTOR(15 downto 0);\n\n");
621 
 
622 
        fprintf(TOP_FP,"       tip_addr : in  STD_LOGIC_VECTOR(10 downto 0);\n");
623 
        fprintf(TOP_FP,"       tip_we : in  STD_LOGIC_VECTOR(0 downto 0);\n");
624 
        fprintf(TOP_FP,"       tip_din : in  STD_LOGIC_VECTOR(7 downto 0);\n");
625 
        fprintf(TOP_FP,"       sel_vec : in  STD_LOGIC_VECTOR(2 downto 0);\n");
626 
        fprintf(TOP_FP,"       addrA : in  STD_LOGIC_VECTOR(10 downto 0);\n");
627 
        fprintf(TOP_FP,"       addrB : in  STD_LOGIC_VECTOR(10 downto 0);\n");
628 
        fprintf(TOP_FP,"       addrC : in  STD_LOGIC_VECTOR(10 downto 0);\n");
629 
        fprintf(TOP_FP,"       addrD : in  STD_LOGIC_VECTOR(10 downto 0);\n");
630 
        fprintf(TOP_FP,"       WRCNTRL : in  STD_LOGIC_VECTOR(13 downto 0);\n");
631 
        fprintf(TOP_FP,"       POPCOUNT_val : out  STD_LOGIC_VECTOR(31 downto 0);\n\n");
632 
        fprintf(TOP_FP,"       score_rdaddr : in  STD_LOGIC_VECTOR(15 downto 0);\n");
633 
        fprintf(TOP_FP,"       score_rddout : out  STD_LOGIC_VECTOR(31 downto 0);\n");
634 
        fprintf(TOP_FP,"       score3_we : in  STD_LOGIC_VECTOR(0 downto 0);\n");
635 
        fprintf(TOP_FP,"       score3_addr : in  STD_LOGIC_VECTOR(15 downto 0);\n");
636 
        fprintf(TOP_FP,"       score3_din : in  STD_LOGIC_VECTOR(31 downto 0);\n\n");
637 
        fprintf(TOP_FP,"       sync_in : in  STD_LOGIC;\n");
638 
        fprintf(TOP_FP,"       sync_out : out  STD_LOGIC\n");
639 
        fprintf(TOP_FP,");\n");
640 
        fprintf(TOP_FP,"end MPEXT;\n");
641 
 
642 
}
643 
 
644 
void start_architectureMPEXT()
645 
{
646 
        fprintf(TOP_FP,"\n\n");
647 
        fprintf(TOP_FP,"architecture Behavioral of MPEXT is\n");
648 
}
649 
 
650 
void componentPPC()
651 
{
652 
        fprintf(TOP_FP,"\n\n");
653 
        fprintf(TOP_FP,"component PPC is\n");
654 
        fprintf(TOP_FP,"Port ( clk : in  STD_LOGIC;\n\n");
655 
 
656 
        fprintf(TOP_FP,"       tip_addr : in  STD_LOGIC_VECTOR(10 downto 0);\n");
657 
        fprintf(TOP_FP,"       tip_we : in  STD_LOGIC_VECTOR(0 downto 0);\n");
658 
        fprintf(TOP_FP,"       tip_din : in  STD_LOGIC_VECTOR(7 downto 0);\n");
659 
 
660 
        fprintf(TOP_FP,"       sel_vec : in  STD_LOGIC_VECTOR(2 downto 0);\n");
661 
        fprintf(TOP_FP,"       addrA : in  STD_LOGIC_VECTOR(10 downto 0);\n");
662 
        fprintf(TOP_FP,"       addrB : in  STD_LOGIC_VECTOR(10 downto 0);\n");
663 
        fprintf(TOP_FP,"       addrC : in  STD_LOGIC_VECTOR(10 downto 0);\n");
664 
        fprintf(TOP_FP,"       addrD : in  STD_LOGIC_VECTOR(10 downto 0);\n");
665 
        fprintf(TOP_FP,"       WRCNTRL : in  STD_LOGIC_VECTOR(13 downto 0);\n");
666 
        fprintf(TOP_FP,"       POPCOUNTvector : out  STD_LOGIC_VECTOR(%d downto 0)\n",INPUT_LOAD-1);
667 
        fprintf(TOP_FP,"  );\n");
668 
        fprintf(TOP_FP,"end component;\n");
669 
}
670 
 
671 
void componentPOPCOUNT()
672 
{
673 
        fprintf(TOP_FP,"\n");
674 
        fprintf(TOP_FP,"component POPCOUNT is\n");
675 
        fprintf(TOP_FP,"Port ( clk : in  STD_LOGIC;\n");
676 
        fprintf(TOP_FP,"       invec : in  STD_LOGIC_VECTOR(%d downto 0);\n",INPUT_LOAD-1);
677 
        fprintf(TOP_FP,"       value : out  STD_LOGIC_VECTOR(31 downto 0)\n");
678 
        fprintf(TOP_FP,");\n");
679 
        fprintf(TOP_FP,"end component;\n");
680 
}
681 
 
682 
void componentSCOREMEM()
683 
{
684 
        fprintf(TOP_FP,"\n\n");
685 
        fprintf(TOP_FP,"component MP_SCORE_MEM_V5 is\n");
686 
        fprintf(TOP_FP,"  port (\n");
687 
        fprintf(TOP_FP,"    ssrb : in STD_LOGIC := 'X';\n");
688 
        fprintf(TOP_FP,"    clka : in STD_LOGIC := 'X';\n");
689 
        fprintf(TOP_FP,"    clkb : in STD_LOGIC := 'X';\n");
690 
        fprintf(TOP_FP,"    wea : in STD_LOGIC_VECTOR(0 downto 0);\n");
691 
        fprintf(TOP_FP,"    addra : in STD_LOGIC_VECTOR(10 downto 0);\n");
692 
        fprintf(TOP_FP,"    addrb : in STD_LOGIC_VECTOR(10 downto 0);\n");
693 
        fprintf(TOP_FP,"    doutb : out STD_LOGIC_VECTOR(31 downto 0);\n");
694 
        fprintf(TOP_FP,"    dina : in STD_LOGIC_VECTOR(31 downto 0)\n");
695 
        fprintf(TOP_FP,"  );\n");
696 
        fprintf(TOP_FP,"end component;\n");
697 
}
698 
 
699 
 
700 
 
701 
void MPEXT_components()
702 
{
703 
        int i;
704 
 
705 
        componentPPC();
706 
        componentPOPCOUNT();
707 
        componentSCOREMEM();
708 
 
709 
 
710 
        fprintf(TOP_FP,"\n\nsignal sync_vec: std_logic_vector(%d downto 0);",LATENCY+6);
711 
 
712 
        fprintf(TOP_FP,"\n\nsignal bitvector_consig: std_logic_vector(%d downto 0);\n\n\nbegin\n\n",INPUT_LOAD-1);
713 
 
714 
        getbitvector((INPUT_LOAD/2)-2);
715 
}
716 
 
717 
void synchronize()
718 
{
719 
        int i;
720 
 
721 
        fprintf(TOP_FP,"\nsync_vec(0) <= sync_in;\nsync_out<=sync_vec(%d);\n\nprocess(clk)\nbegin\nif clk'event and clk='1' then\n",LATENCY+6);
722 
 
723 
        for (i=1;i<=LATENCY+6;i++)
724 
        {
725 
                fprintf(TOP_FP,"    sync_vec(%d) <= sync_vec(%d);\n",i,i-1);
726 
        }
727 
        fprintf(TOP_FP,"end if;\nend process;\n");
728 
 
729 
}
730 
 
731 
void instantiatePPC()
732 
{
733 
        fprintf(TOP_FP,"\n\n---------\n");
734 
        fprintf(TOP_FP,"-- PPC --\n");
735 
        fprintf(TOP_FP,"---------\n");
736 
        fprintf(TOP_FP,"\n");
737 
        fprintf(TOP_FP,"PPC_U: PPC Port Map\n");
738 
        fprintf(TOP_FP,"(\n");
739 
        fprintf(TOP_FP,"  clk => clk,\n\n");
740 
        fprintf(TOP_FP,"  tip_addr => tip_addr,\n");
741 
        fprintf(TOP_FP,"  tip_we => tip_we,\n");
742 
        fprintf(TOP_FP,"  tip_din => tip_din,\n");
743 
        fprintf(TOP_FP,"  sel_vec => sel_vec,\n");
744 
        fprintf(TOP_FP,"  addrA => addrA,\n");
745 
        fprintf(TOP_FP,"  addrB => addrB,\n");
746 
        fprintf(TOP_FP,"  addrC => addrC,\n");
747 
        fprintf(TOP_FP,"  addrD => addrD,\n");
748 
        fprintf(TOP_FP,"  WRCNTRL => WRCNTRL,\n");
749 
        fprintf(TOP_FP,"  POPCOUNTvector => bitvector_consig\n",INPUT_LOAD-1);
750 
        fprintf(TOP_FP,");\n");
751 
}
752 
 
753 
void instantiatePOPCOUNT()
754 
{
755 
        fprintf(TOP_FP,"\n\n--------------\n");
756 
        fprintf(TOP_FP,"-- POPCOUNT --\n");
757 
        fprintf(TOP_FP,"--------------\n");
758 
        fprintf(TOP_FP,"\n");
759 
        fprintf(TOP_FP,"POPCOUNT_U: POPCOUNT Port Map\n");
760 
        fprintf(TOP_FP,"(\n");
761 
        fprintf(TOP_FP,"  clk => clk,\n");
762 
        fprintf(TOP_FP,"  invec => bitvector_consig,\n");
763 
        fprintf(TOP_FP,"  value => POPCOUNT_val\n");
764 
        fprintf(TOP_FP,");\n");
765 
}
766 
 
767 
void instantiateSCOREMEM()
768 
{
769 
        fprintf(TOP_FP,"\n\n---------------\n");
770 
        fprintf(TOP_FP,"-- SCORE MEM --\n");
771 
        fprintf(TOP_FP,"---------------\n");
772 
        fprintf(TOP_FP,"\n");
773 
        fprintf(TOP_FP,"SCOREMEM_U: MP_SCORE_MEM_V5 Port Map\n");
774 
        fprintf(TOP_FP,"(\n");
775 
        fprintf(TOP_FP,"  ssrb => score_rdaddr(0),\n");
776 
        fprintf(TOP_FP,"  clka => clk,\n");
777 
        fprintf(TOP_FP,"  clkb => clk,\n");
778 
        fprintf(TOP_FP,"  wea => score3_we,\n");
779 
        fprintf(TOP_FP,"  addra => score3_addr(11 downto 1),\n");
780 
        fprintf(TOP_FP,"  addrb => score_rdaddr(11 downto 1),\n");
781 
        fprintf(TOP_FP,"  doutb => score_rddout,\n");
782 
        fprintf(TOP_FP,"  dina => score3_din\n");
783 
        fprintf(TOP_FP,");\n");
784 
}
785 
 
786 
void get_register_positions()
787 
{
788 
        int i;
789 
        int popcountstages = MAX_CODE;
790 
        int desiredlatency = LATENCY;
791 
        int registerstages = MAX_CODE/LATENCY;
792 
        int offset = MAX_CODE % LATENCY;
793 
        int loopposition = registerstages;
794 
        int loopoffset = offset;
795 
        registerpositions = (int *) malloc(sizeof(int)*LATENCY-1);
796 
 
797 
        registerpositions[0] =  loopposition;
798 
 
799 
        if(loopoffset!=0)
800 
        {
801 
                registerpositions[0]++;
802 
                loopoffset--;
803 
        }
804 
 
805 
        for(i=1;i<LATENCY-1;i++)
806 
        {
807 
                registerpositions[i] = registerpositions[i-1] + loopposition;
808 
                if(loopoffset!=0)
809 
                {
810 
                        registerpositions[i]++;
811 
                        loopoffset--;
812 
                }
813 
        }
814 
}
815 
 
816 
 
817 
int main()
818 
{
819 
        int i=0;
820 
        char temp;
821 
 
822 
        printf("\n1.  Number of Input Bits:");
823 
        scanf("%d",&INPUT_LOAD);
824 
 
825 
        if(INPUT_LOAD<=1)
826 
        {
827 
                printf("\n    Minimum Number of Input Bits = 2!\n\n");
828 
                INPUT_LOAD = 2;
829 
        }
830 
 
831 
        printf("\n2.  POPCOUNT Latency (# of Cycles):");
832 
        scanf("%d",&LATENCY);
833 
 
834 
        if (LATENCY<=0)
835 
        {
836 
                printf("\n    Minimum POPCOUNT Latency = 1 clock cycle!\n");
837 
                LATENCY = 1;
838 
        }
839 
 
840 
        ADDER_FP = fopen("POPCOUNT.vhd","w");
841 
 
842 
        preliminary_input(ADDER_FP);
843 
 
844 
        libraries(ADDER_FP);
845 
 
846 
        entityADDER();
847 
 
848 
        start_architectureADDER();
849 
 
850 
        processADDER(SIZE_MODE);
851 
 
852 
        ADD_CONFIG = (adder_config*)malloc(sizeof(adder_config)*ADDER_LOAD);
853 
        ADD_CONFIG_IND = 0;
854 
 
855 
        SIG_CONFIG = (signal_config*)malloc(sizeof(signal_config)*SIGNAL_LOAD);
856 
    SIG_CONFIG_IND = 0;
857 
 
858 
        processADDER(CONFIG_MODE);
859 
 
860 
        get_register_positions();
861 
 
862 
        processADDER(CREATE_MODE);
863 
 
864 
        for(i=1;i<MAX_CODE+1;i++)
865 
        {
866 
                create_short_adder(i,ADDER_FP);
867 
        }
868 
 
869 
        fclose(ADDER_FP);
870 
 
871 
 
872 
 
873 
        /* MPPRU_FP = fopen("PPC.vhd","w");
874 
 
875 
        PPC_SIZE = INPUT_LOAD / 2;
876 
 
877 
        BITVEC_INDEX = INPUT_LOAD - 1;
878 
 
879 
        preliminary_input(MPPRU_FP);
880 
 
881 
        libraries(MPPRU_FP);
882 
 
883 
        entityPPC();
884 
 
885 
        start_architecturePPC();
886 
 
887 
        componentPRU();
888 
 
889 
        signalsPPC();
890 
 
891 
        for(i=1;i<=PPC_SIZE;i++)
892 
        {
893 
                instantiatePRU(i);
894 
        }
895 
 
896 
        end_file(MPPRU_FP);
897 
 
898 
        fclose(MPPRU_FP);
899 
 
900 
 
901 
 
902 
 
903 
        TOP_FP = fopen("MP_EXT.vhd","w");
904 
 
905 
        preliminary_input(TOP_FP);
906 
 
907 
        libraries(TOP_FP);
908 
 
909 
        entityMPEXT();
910 
 
911 
        start_architectureMPEXT();
912 
 
913 
        MPEXT_components();
914 
 
915 
        synchronize();
916 
 
917 
        instantiatePPC();
918 
 
919 
        instantiatePOPCOUNT();
920 
 
921 
        instantiateSCOREMEM();
922 
 
923 
        end_file(TOP_FP);
924 
 
925 
        fclose(TOP_FP);
926 
        */
927 
 
928 
        printf("\n\n\n    A VHDL file has been successfully generated!\n\n\nPress Enter to Exit...\n");
929 
        scanf("%c",&temp);
930 
        scanf("%c",&temp);
931 
 
932 
        return 0;
933 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.