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//// Copyright (C) 2018 Authors and OPENCORES.ORG                 ////

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//////////////////////////////////////////////////////////////////////

module tb_top;

  import uvm_pkg::*;

  import tb_axis_video_frame_pkg::*;

  `include "uvm_macros.svh"

  // --------------------------------------------------------------------

  wire clk_100mhz;

  wire tb_clk = clk_100mhz;

  wire tb_rst;

  tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);

  // --------------------------------------------------------------------

  wire clk = clk_100mhz;

  wire reset = tb_rst;

  wire aclk = clk;

  wire aresetn = ~reset;

  // --------------------------------------------------------------------

  axis_if #(.N(AVF_N), .U(AVF_U)) dut_if(.*);

  // --------------------------------------------------------------------

  dut #(.N(AVF_N), .U(AVF_U)) dut(dut_if);

  // --------------------------------------------------------------------

  bind dut axis_checker #(.N(N), .U(U)) dut_b(.*);

  // --------------------------------------------------------------------

  tb_dut_config #(AVF_N, AVF_U) cfg_h = new(dut_if);

  initial

  begin

    cfg_h.init( .pixels_per_line(AVF_AW)

              , .lines_per_frame(AVF_AH)

              , .bits_per_pixel(AVF_B * 8)

              );

    uvm_config_db #(tb_dut_config #(AVF_N, AVF_U))::set(null, "*", "tb_dut_config", cfg_h);

    run_test("t_debug");

  end

// --------------------------------------------------------------------

endmodule