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[/] [qaz_libs/] [trunk/] [BFM/] [src/] [clock/] [clock_mult.v] - Blame information for rev 34

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1 34 qaztronic
//
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//
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//
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`timescale 1ps/1ps
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module clock_mult
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#(
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  parameter MULT = 7
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)
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(
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  input       clock_in,
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  output reg  clock_out,
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  output reg  clock_good,
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  input  reset
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);
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  // --------------------------------------------------------------------
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  //
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  time  clock_in_time_buffer;
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  time  clock_out_period;
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  wire enable = (reset === 1'b0) & ((clock_in === 1'b0) | (clock_in === 1'b1));
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  reg [(MULT - 1):0] delayed_clock_in = 0;
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  initial
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    begin
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      clock_out             <= 0;
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      clock_out_period      <= 0;
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      clock_good            <= 0;
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      wait( ~enable );
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      @(posedge clock_in);
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      clock_in_time_buffer  = $time;
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      @(posedge clock_in);
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      clock_out_period      = ($time - clock_in_time_buffer) / MULT;
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      @(posedge clock_in);
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      clock_good            = 1;
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    end
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  // --------------------------------------------------------------------
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  //
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  integer i;
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  always @( * )
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    for( i = 0; i < MULT; i = i + 1 )
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      delayed_clock_in[i] <= #(i * clock_out_period) clock_in;
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  // --------------------------------------------------------------------
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  //
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  integer j;
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  always @(posedge clock_in)
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    begin
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      if(clock_good)
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        begin
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          clock_out = 1'b1;
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          #(clock_out_period/2);
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          clock_out = 1'b0;
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          for( j = 1; j < MULT; j = j + 1 )
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            begin
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              @(posedge delayed_clock_in[j]);
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              clock_out = 1'b1;
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              #(clock_out_period/2);
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              clock_out = 1'b0;
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            end
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        end
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    end
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endmodule
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