OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [axi4_lib/] [sim/] [tests/] [debug_axi4_memory/] [the_test.sv] - Blame information for rev 31

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 31 qaztronic
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
4
////                                                              ////
5
//// This source file may be used and distributed without         ////
6
//// restriction provided that this copyright statement is not    ////
7
//// removed from the file and that any derivative work contains  ////
8
//// the original copyright notice and the associated disclaimer. ////
9
////                                                              ////
10
//// This source file is free software; you can redistribute it   ////
11
//// and/or modify it under the terms of the GNU Lesser General   ////
12
//// Public License as published by the Free Software Foundation; ////
13
//// either version 2.1 of the License, or (at your option) any   ////
14
//// later version.                                               ////
15
////                                                              ////
16
//// This source is distributed in the hope that it will be       ////
17
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
//// PURPOSE.  See the GNU Lesser General Public License for more ////
20
//// details.                                                     ////
21
////                                                              ////
22
//// You should have received a copy of the GNU Lesser General    ////
23
//// Public License along with this source; if not, download it   ////
24
//// from http://www.opencores.org/lgpl.shtml                     ////
25
////                                                              ////
26
//////////////////////////////////////////////////////////////////////
27
 
28
`timescale 1ps/1ps
29
 
30
 
31
module
32
  the_test(
33
            input tb_clk,
34
            input tb_rst
35
          );
36
 
37
  // --------------------------------------------------------------------
38
  //
39
  localparam A = tb_top.A;
40
  localparam N = tb_top.N;
41
 
42
 
43
  // --------------------------------------------------------------------
44
  //
45
  import axi4_transaction_pkg::*;
46
  axi4_payload_class payload_h;
47
 
48
 
49
  // --------------------------------------------------------------------
50
  //
51
  logic [(8*N)-1:0] data[];
52
  logic [1:0] resp;
53
 
54
  task run_the_test;
55
 
56
    // --------------------------------------------------------------------
57
    // insert test below
58
    // --------------------------------------------------------------------
59
    $display("^^^---------------------------------");
60
    $display("^^^ %16.t | Testbench begun.\n", $time);
61
    $display("^^^---------------------------------");
62
    // --------------------------------------------------------------------
63
 
64
    tb_top.tb.timeout_stop(10us);
65
 
66
 
67
    // --------------------------------------------------------------------
68
    wait(~tb_rst);
69
 
70
 
71
    // --------------------------------------------------------------------
72
    #100ns;
73
 
74
    // force tb_top.axi4_s.bready = 1;
75
 
76
    data = new[16];
77
    data[0] = 64'habba_beef_cafe_1a7e;
78
    tb_top.bfm.basic_write(32'h1234_0000, 0, data, resp);
79
 
80
    // --------------------------------------------------------------------
81
    #100ns;
82
 
83
    repeat(5)
84
    begin
85
      tb_top.bfm.basic_random_write_burst(resp);
86
    end
87
 
88
    // --------------------------------------------------------------------
89
    #100ns;
90
 
91
    repeat(5)
92
    begin
93
      tb_top.bfm.basic_random_read_burst(data, resp);
94
    end
95
 
96
    // // --------------------------------------------------------------------
97
    // #100ns;
98
 
99
    // repeat(5)
100
    // begin
101
      // tb_top.bfm.basic_read(32'h1234_0000, 3, data, resp);
102
 
103
      // foreach(data[i])
104
        // $display("^^^ %16.t | %d | 0x%016x |", $time, i, data[i]);
105
    // end
106
 
107
    // tb_top.bfm.basic_read(32'habcd_0000, 0, data, resp);
108
    // $display("^^^ %16.t | 0x%016x |", $time, data[0]);
109
 
110
 
111
    // // --------------------------------------------------------------------
112
    // tb_top.bfm.basic_read(32'habcd_0000, 0, data, resp);
113
    // $display("^^^ %16.t | 0x%016x |", $time, data[0]);
114
 
115
    // // --------------------------------------------------------------------
116
    // #100ns;
117
 
118
    // repeat(5)
119
    // begin
120
      // tb_top.bfm.basic_random_write(32'habcd_0000, 0, resp);
121
    // end
122
 
123
    // // --------------------------------------------------------------------
124
    // #100ns;
125
 
126
    // repeat(5)
127
    // begin
128
      // tb_top.bfm.basic_random_write(32'habcd_0000, 3, resp);
129
    // end
130
 
131
    // --------------------------------------------------------------------
132
    #100ns;
133
 
134
 
135
    // --------------------------------------------------------------------
136
    // insert test above
137
    // --------------------------------------------------------------------
138
 
139
  endtask
140
 
141
 
142
endmodule
143
 

powered by: WebSVN 2.1.0

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.