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[/] [qaz_libs/] [trunk/] [axi4_stream_lib/] [sim/] [src/] [tb_axis_upsizer.sv] - Blame information for rev 31

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1 31 qaztronic
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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module tb_top();
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  // --------------------------------------------------------------------
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  // test bench clock & reset
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  wire clk_200mhz;
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  wire tb_clk   = clk_200mhz;
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  wire tb_rst;
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  tb_base #(.PERIOD(5_000)) tb(clk_200mhz, tb_rst);
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  // --------------------------------------------------------------------
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  //
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  wire tb_rst_s;
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  wire aclk     = tb_clk;
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  wire aresetn  = ~tb_rst_s;
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  sync_reset
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    sync_reset_i(aclk, tb_rst, tb_rst_s);
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  // --------------------------------------------------------------------
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  //
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  import tb_axis_upsizer_class_pkg::*;
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  // --------------------------------------------------------------------
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  //
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  axis_if #(.N(AVF_N), .U(AVF_U)) axis_in(.*);
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  axis_if #(.N(AVF_N * S), .U(AVF_U * S)) axis_out(.*);
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  // --------------------------------------------------------------------
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  //
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  axis_upsizer
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    #(
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      .N(AVF_N),          // data bus width in bytes
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      .I(1),              // TID width
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      .D(1),              // TDEST width
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      .U(AVF_U),          // TUSER width
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      .S(S),              // tdata size multiplier
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      .USE_TSTRB(0),      //  set to 1 to enable, 0 to disable
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      .USE_TKEEP(0),      //  set to 1 to enable, 0 to disable
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      .BYTES_PER_TUSER(0) //  bytes per tuser bit. Set to 0 for transfer based.
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    )
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    dut(.*);
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  // --------------------------------------------------------------------
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  // sim models
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  //  |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
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  // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
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  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
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  // --------------------------------------------------------------------
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  //
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  axis_checker #(.N(AVF_N * S), .I(1), .D(1), .U(AVF_U))
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    axis_checker_i(.*);
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  // --------------------------------------------------------------------
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  //
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  axis_if #(.N(AVF_N * S), .U(AVF_U)) avf_axis_in_if(.*);
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  assign axis_out.tready = avf_axis_in_if.tready;
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  assign avf_axis_in_if.tvalid  = axis_out.tvalid;
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  assign avf_axis_in_if.tdata = axis_out.tdata;
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  assign avf_axis_in_if.tuser = {axis_out.tuser[(AVF_U*S)-1], axis_out.tuser[1:0]};
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  assign avf_axis_in_if.tlast = axis_out.tlast;
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  // --------------------------------------------------------------------
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  //
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  tb_axis_upsizer_class a_h;
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  initial
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    a_h = new(.avf_axis_in_if(avf_axis_in_if), .avf_axis_out_if(axis_in));
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  // --------------------------------------------------------------------
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  //
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  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
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  // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
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  //  |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
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  // sim models
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  // --------------------------------------------------------------------
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  // --------------------------------------------------------------------
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  //  debug wires
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  // --------------------------------------------------------------------
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  // test
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  the_test test( tb_clk, tb_rst );
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  initial
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    begin
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      test.run_the_test();
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      $display("^^^---------------------------------");
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      $display("^^^ %16.t | Testbench done.", $time);
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      $display("^^^---------------------------------");
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      $display("^^^---------------------------------");
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      $stop();
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    end
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endmodule
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