OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [axi4_stream_lib/] [sim/] [tests/] [legacy/] [tb_recursive_axis_switch/] [tb_recursive_axis_switch.sv] - Blame information for rev 50

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 50 qaztronic
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// Copyright (C) 2017 Authors and OPENCORES.ORG                 ////
4
////                                                              ////
5
//// This source file may be used and distributed without         ////
6
//// restriction provided that this copyright statement is not    ////
7
//// removed from the file and that any derivative work contains  ////
8
//// the original copyright notice and the associated disclaimer. ////
9
////                                                              ////
10
//// This source file is free software; you can redistribute it   ////
11
//// and/or modify it under the terms of the GNU Lesser General   ////
12
//// Public License as published by the Free Software Foundation; ////
13
//// either version 2.1 of the License, or (at your option) any   ////
14
//// later version.                                               ////
15
////                                                              ////
16
//// This source is distributed in the hope that it will be       ////
17
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
//// PURPOSE.  See the GNU Lesser General Public License for more ////
20
//// details.                                                     ////
21
////                                                              ////
22
//// You should have received a copy of the GNU Lesser General    ////
23
//// Public License along with this source; if not, download it   ////
24
//// from http://www.opencores.org/lgpl.shtml                     ////
25
////                                                              ////
26
//////////////////////////////////////////////////////////////////////
27
// ----------------------------------------------------------------------------
28
 
29
`timescale 1ps/1ps
30
 
31
module tb_top();
32
 
33
  // --------------------------------------------------------------------
34
  // test bench clock & reset
35
  wire clk_100mhz;
36
  wire tb_clk   = clk_100mhz;
37
  wire tb_rst;
38
 
39
  tb_base #(.PERIOD(10_000)) tb(clk_100mhz, tb_rst);
40
 
41
 
42
  // --------------------------------------------------------------------
43
  //
44
  wire tb_rst_s;
45
  wire aclk     = tb_clk;
46
  wire aresetn  = ~tb_rst_s;
47
  wire clk      = tb_clk;
48
  wire reset    = tb_rst_s;
49
 
50
  sync_reset sync_reset_i(tb_clk, tb_rst, tb_rst_s);
51
 
52
 
53
  // --------------------------------------------------------------------
54
  //
55
  import tb_recursive_axis_switch_pkg::*;
56
 
57
 
58
  // --------------------------------------------------------------------
59
  //
60
  axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_in(.*);
61
  axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_out[SD-1:0](.*);
62
 
63
 
64
  // --------------------------------------------------------------------
65
  //
66
  wire [SA-1:0] select = 0;
67
 
68
  recursive_axis_switch #(.N(N), .I(I), .D(D), .U(U), .SA(SA))
69
    dut(.*);
70
 
71
 
72
  // --------------------------------------------------------------------
73
  // sim models
74
  //  |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
75
  // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
76
  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
77
 
78
 
79
  // // --------------------------------------------------------------------
80
  // //
81
  // initial
82
    // axis_out.cb_s.tready <= 1;
83
 
84
 
85
  // --------------------------------------------------------------------
86
  //
87
  tb_recursive_axis_switch_class a_h;
88
 
89
  initial
90
    a_h = new(axis_in, axis_out);
91
 
92
 
93
 
94
  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
95
  // /|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\-/|\
96
  //  |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |   |
97
  // sim models
98
  // --------------------------------------------------------------------
99
 
100
 
101
  // --------------------------------------------------------------------
102
  //  debug wires
103
 
104
 
105
  // --------------------------------------------------------------------
106
  // test
107
  the_test test(tb_clk, tb_rst);
108
 
109
  initial
110
    begin
111
 
112
      test.run_the_test();
113
 
114
      $display("^^^---------------------------------");
115
      $display("^^^ %16.t | Testbench done.", $time);
116
      $display("^^^---------------------------------");
117
 
118
      $display("^^^---------------------------------");
119
 
120
      $stop();
121
 
122
    end
123
 
124
endmodule
125
 
126
 
127
 

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.