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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////

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//////////////////////////////////////////////////////////////////////

module

  axis_alias

  #(

    N = 8,          // data bus width in bytes

    I = 1,          // TID width

    D = 1,          // TDEST width

    U = 1,          // TUSER width

    USE_TSTRB = 0,  //  set to 1 to enable, 0 to disable

    USE_TKEEP = 0   //  set to 1 to enable, 0 to disable

  )

  (

    axis_if axis_in,

    axis_if axis_out

  );

  // --------------------------------------------------------------------

  //

  assign axis_in.tready = axis_out.tready;

  assign axis_out.tvalid = axis_in.tvalid;

  assign axis_out.tdata  = axis_in.tdata;

  assign axis_out.tstrb  = axis_in.tstrb;

  assign axis_out.tkeep  = axis_in.tkeep;

  assign axis_out.tlast  = axis_in.tlast;

  assign axis_out.tid    = axis_in.tid;

  assign axis_out.tdest  = axis_in.tdest;

  assign axis_out.tuser  = axis_in.tuser;

// --------------------------------------------------------------------

//

endmodule