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//////////////////////////////////////////////////////////////////////

module

  axis_catenate

  #(

    N, // data bus width in bytes

    I = 1, // TID width

    D = 1, // TDEST width

    U = 1, // TUSER width

    U_IS_EOP = -1

  )

  (

    axis_if axis_in [1:0],

    axis_if axis_out,

    input   aclk,

    input   aresetn

  );

  // --------------------------------------------------------------------

  //

  wire select;

  wire axis_eop;

  defparam axis_eop_mux_i.U_IS_EOP = U_IS_EOP; // why are needed these for recursive modules?

  defparam axis_eop_mux_i.MA = 1;

  axis_eop_mux

  // axis_eop_mux #(.U_IS_EOP(U_IS_EOP), .MA(1))

    axis_eop_mux_i(.axis_in(axis_in), .*);

  // --------------------------------------------------------------------

  //  state machine binary definitions

  enum reg [1:0]

    {

      HEAD  = 2'b01,

      TAIL  = 2'b10

    } state, next_state;

  // --------------------------------------------------------------------

  //  state machine flop

  always_ff @(posedge aclk)

    if(~aresetn)

      state <= HEAD;

    else

      state <= next_state;

  // --------------------------------------------------------------------

  //  state machine

  always_comb

    case(state)

      HEAD:     if(axis_eop)

                  next_state <= TAIL;

                else

                  next_state <= HEAD;

      TAIL:     if(axis_eop)

                  next_state <= HEAD;

                else

                  next_state <= TAIL;

      default:  next_state <= HEAD;

    endcase

  // --------------------------------------------------------------------

  //

  defparam axis_mux_i.N = N; // why are needed these for recursive modules?

  defparam axis_mux_i.I = I;

  defparam axis_mux_i.D = D;

  defparam axis_mux_i.U = U;

  axis_mux

  // axis_mux #(.N(N), .I(I), .D(D), .U(U))

    axis_mux_i(.axis_in(axis_in), .*);

  // --------------------------------------------------------------------

  //

  assign select = (state == HEAD) ? 0 : 1;

// --------------------------------------------------------------------

//

endmodule