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[/] [qaz_libs/] [trunk/] [axi4_stream_lib/] [src/] [axis_mux.sv] - Blame information for rev 36

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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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module
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  axis_mux
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  #(
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    N,      // data bus width in bytes
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    I = 1,  // TID width
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    D = 1,  // TDEST width
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    U = 1,  // TUSER width
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    USE_TSTRB = 0,  //  set to 1 to enable, 0 to disable
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    USE_TKEEP = 0   //  set to 1 to enable, 0 to disable
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  )
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  (
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    input   select,
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    axis_if axis_in[1:0],
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    axis_if axis_out,
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    input   aclk,
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    input   aresetn
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  );
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  // --------------------------------------------------------------------
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  //
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  axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_mux_out(.*);
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  assign axis_in[0].tready = select ? 0                   : axis_mux_out.tready;
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  assign axis_in[1].tready = select ? axis_mux_out.tready : 0;
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  assign axis_mux_out.tvalid = select ? axis_in[1].tvalid : axis_in[0].tvalid;
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  assign axis_mux_out.tdata  = select ? axis_in[1].tdata  : axis_in[0].tdata;
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  assign axis_mux_out.tstrb  = select ? axis_in[1].tstrb  : axis_in[0].tstrb;
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  assign axis_mux_out.tkeep  = select ? axis_in[1].tkeep  : axis_in[0].tkeep;
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  assign axis_mux_out.tlast  = select ? axis_in[1].tlast  : axis_in[0].tlast;
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  assign axis_mux_out.tid    = select ? axis_in[1].tid    : axis_in[0].tid;
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  assign axis_mux_out.tdest  = select ? axis_in[1].tdest  : axis_in[0].tdest;
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  assign axis_mux_out.tuser  = select ? axis_in[1].tuser  : axis_in[0].tuser;
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  // --------------------------------------------------------------------
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  //
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  axis_register_slice
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    #(
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      .N(N),
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      .I(I),
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      .D(D),
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      .U(U),
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      .USE_TSTRB(0),
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      .USE_TKEEP(0)
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    )
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    axis_register_slice_i
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    (
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      .axis_in(axis_mux_out), // slave
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      .axis_out(axis_out),    // master
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      .*
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    );
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// --------------------------------------------------------------------
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//
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endmodule
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