OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [basal/] [src/] [8b10b/] [encode_8b10b.v] - Blame information for rev 34

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 34 qaztronic
// Chuck Benz, Hollis, NH   Copyright (c)2002
2
//
3
// The information and description contained herein is the
4
// property of Chuck Benz.
5
//
6
// Permission is granted for any reuse of this information
7
// and description as long as this copyright notice is
8
// preserved.  Modifications may be made as long as this
9
// notice is preserved.
10
 
11
// per Widmer and Franaszek
12
 
13
module encode_8b10b (datain, dispin, dataout, dispout) ;
14
  input [8:0]   datain ;
15
  input         dispin ;  // 0 = neg disp; 1 = pos disp
16
  output [9:0]   dataout ;
17
  output        dispout ;
18
 
19
 
20
  wire ai = datain[0] ;
21
  wire bi = datain[1] ;
22
  wire ci = datain[2] ;
23
  wire di = datain[3] ;
24
  wire ei = datain[4] ;
25
  wire fi = datain[5] ;
26
  wire gi = datain[6] ;
27
  wire hi = datain[7] ;
28
  wire ki = datain[8] ;
29
 
30
  wire aeqb = (ai & bi) | (!ai & !bi) ;
31
  wire ceqd = (ci & di) | (!ci & !di) ;
32
  wire l22 = (ai & bi & !ci & !di) |
33
             (ci & di & !ai & !bi) |
34
             ( !aeqb & !ceqd) ;
35
  wire l40 = ai & bi & ci & di ;
36
  wire l04 = !ai & !bi & !ci & !di ;
37
  wire l13 = ( !aeqb & !ci & !di) |
38
             ( !ceqd & !ai & !bi) ;
39
  wire l31 = ( !aeqb & ci & di) |
40
             ( !ceqd & ai & bi) ;
41
 
42
  // The 5B/6B encoding
43
 
44
  wire ao = ai ;
45
  wire bo = (bi & !l40) | l04 ;
46
  wire co = l04 | ci | (ei & di & !ci & !bi & !ai) ;
47
  wire do = di & ! (ai & bi & ci) ;
48
  wire eo = (ei | l13) & ! (ei & di & !ci & !bi & !ai) ;
49
  wire io = (l22 & !ei) |
50
            (ei & !di & !ci & !(ai&bi)) |  // D16, D17, D18
51
            (ei & l40) |
52
            (ki & ei & di & ci & !bi & !ai) | // K.28
53
            (ei & !di & ci & !bi & !ai) ;
54
 
55
  // pds16 indicates cases where d-1 is assumed + to get our encoded value
56
  wire pd1s6 = (ei & di & !ci & !bi & !ai) | (!ei & !l22 & !l31) ;
57
  // nds16 indicates cases where d-1 is assumed - to get our encoded value
58
  wire nd1s6 = ki | (ei & !l22 & !l13) | (!ei & !di & ci & bi & ai) ;
59
 
60
  // ndos6 is pds16 cases where d-1 is + yields - disp out - all of them
61
  wire ndos6 = pd1s6 ;
62
  // pdos6 is nds16 cases where d-1 is - yields + disp out - all but one
63
  wire pdos6 = ki | (ei & !l22 & !l13) ;
64
 
65
 
66
  // some Dx.7 and all Kx.7 cases result in run length of 5 case unless
67
  // an alternate coding is used (referred to as Dx.A7, normal is Dx.P7)
68
  // specifically, D11, D13, D14, D17, D18, D19.
69
  wire alt7 = fi & gi & hi & (ki |
70
                              (dispin ? (!ei & di & l31) : (ei & !di & l13))) ;
71
 
72
 
73
  wire fo = fi & ! alt7 ;
74
  wire go = gi | (!fi & !gi & !hi) ;
75
  wire ho = hi ;
76
  wire jo = (!hi & (gi ^ fi)) | alt7 ;
77
 
78
  // nd1s4 is cases where d-1 is assumed - to get our encoded value
79
  wire nd1s4 = fi & gi ;
80
  // pd1s4 is cases where d-1 is assumed + to get our encoded value
81
  wire pd1s4 = (!fi & !gi) | (ki & ((fi & !gi) | (!fi & gi))) ;
82
 
83
  // ndos4 is pd1s4 cases where d-1 is + yields - disp out - just some
84
  wire ndos4 = (!fi & !gi) ;
85
  // pdos4 is nd1s4 cases where d-1 is - yields + disp out 
86
  wire pdos4 = fi & gi & hi ;
87
 
88
  // only legal K codes are K28.0->.7, K23/27/29/30.7
89
  //    K28.0->7 is ei=di=ci=1,bi=ai=0
90
  //    K23 is 10111
91
  //    K27 is 11011
92
  //    K29 is 11101
93
  //    K30 is 11110 - so K23/27/29/30 are ei & l31
94
  wire illegalk = ki &
95
                  (ai | bi | !ci | !di | !ei) & // not K28.0->7
96
                  (!fi | !gi | !hi | !ei | !l31) ; // not K23/27/29/30.7
97
 
98
  // now determine whether to do the complementing
99
  // complement if prev disp is - and pd1s6 is set, or + and nd1s6 is set
100
  wire compls6 = (pd1s6 & !dispin) | (nd1s6 & dispin) ;
101
 
102
  // disparity out of 5b6b is disp in with pdso6 and ndso6
103
  // pds16 indicates cases where d-1 is assumed + to get our encoded value
104
  // ndos6 is cases where d-1 is + yields - disp out
105
  // nds16 indicates cases where d-1 is assumed - to get our encoded value
106
  // pdos6 is cases where d-1 is - yields + disp out
107
  // disp toggles in all ndis16 cases, and all but that 1 nds16 case
108
 
109
  wire disp6 = dispin ^ (ndos6 | pdos6) ;
110
 
111
  wire compls4 = (pd1s4 & !disp6) | (nd1s4 & disp6) ;
112
  assign dispout = disp6 ^ (ndos4 | pdos4) ;
113
 
114
  assign dataout = {(jo ^ compls4), (ho ^ compls4),
115
                    (go ^ compls4), (fo ^ compls4),
116
                    (io ^ compls6), (eo ^ compls6),
117
                    (do ^ compls6), (co ^ compls6),
118
                    (bo ^ compls6), (ao ^ compls6)} ;
119
 
120
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.