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[/] [qaz_libs/] [trunk/] [basal/] [src/] [PRBS/] [pcie_scrambler.v] - Blame information for rev 34

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1 34 qaztronic
//-----------------------------------------------------------------------------
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// Copyright (C) 2009 OutputLogic.com 
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// This source file may be used and distributed without restriction 
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// provided that this copyright statement is not removed from the file 
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// and that any derivative work contains the original copyright notice 
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// and the associated disclaimer. 
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// 
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// THIS SOURCE FILE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS 
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// OR IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED 
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// WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. 
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//-----------------------------------------------------------------------------
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// scrambler module for data[7:0],   lfsr[15:0]=1+x^3+x^4+x^5+x^16;
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//-----------------------------------------------------------------------------
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module pcie_scrambler(
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  input [7:0] data_in,
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  input scram_en,
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  input scram_rst,
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  output reg [7:0] data_out,
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  input rst,
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  input clk);
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  reg [15:0] lfsr_q,lfsr_c;
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  reg [7:0] data_c;
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  always @( * ) begin
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    lfsr_c[0] = lfsr_q[8];
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    lfsr_c[1] = lfsr_q[9];
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    lfsr_c[2] = lfsr_q[10];
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    lfsr_c[3] = lfsr_q[8] ^ lfsr_q[11];
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    lfsr_c[4] = lfsr_q[8] ^ lfsr_q[9] ^ lfsr_q[12];
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    lfsr_c[5] = lfsr_q[8] ^ lfsr_q[9] ^ lfsr_q[10] ^ lfsr_q[13];
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    lfsr_c[6] = lfsr_q[9] ^ lfsr_q[10] ^ lfsr_q[11] ^ lfsr_q[14];
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    lfsr_c[7] = lfsr_q[10] ^ lfsr_q[11] ^ lfsr_q[12] ^ lfsr_q[15];
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    lfsr_c[8] = lfsr_q[0] ^ lfsr_q[11] ^ lfsr_q[12] ^ lfsr_q[13];
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    lfsr_c[9] = lfsr_q[1] ^ lfsr_q[12] ^ lfsr_q[13] ^ lfsr_q[14];
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    lfsr_c[10] = lfsr_q[2] ^ lfsr_q[13] ^ lfsr_q[14] ^ lfsr_q[15];
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    lfsr_c[11] = lfsr_q[3] ^ lfsr_q[14] ^ lfsr_q[15];
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    lfsr_c[12] = lfsr_q[4] ^ lfsr_q[15];
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    lfsr_c[13] = lfsr_q[5];
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    lfsr_c[14] = lfsr_q[6];
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    lfsr_c[15] = lfsr_q[7];
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    data_c[0] = data_in[0] ^ lfsr_q[15];
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    data_c[1] = data_in[1] ^ lfsr_q[14];
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    data_c[2] = data_in[2] ^ lfsr_q[13];
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    data_c[3] = data_in[3] ^ lfsr_q[12];
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    data_c[4] = data_in[4] ^ lfsr_q[11];
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    data_c[5] = data_in[5] ^ lfsr_q[10];
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    data_c[6] = data_in[6] ^ lfsr_q[9];
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    data_c[7] = data_in[7] ^ lfsr_q[8];
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  end // always
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  always @(posedge clk, posedge rst) begin
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    if(rst) begin
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      lfsr_q <= {16{1'b1}};
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      data_out <= {8{1'b0}};
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    end
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    else begin
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      lfsr_q <= scram_rst ? {16{1'b1}} : scram_en ? lfsr_c : lfsr_q;
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      data_out <= scram_en ? data_c : data_out;
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    end
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  end // always
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endmodule // scrambler
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