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[/] [qaz_libs/] [trunk/] [basal/] [src/] [gear_box/] [unbuffered_gear_box_fsm.v] - Blame information for rev 34

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Line No. Rev Author Line
1 34 qaztronic
// --------------------------------------------------------------------
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//
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// --------------------------------------------------------------------
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module
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  unbuffered_gear_box_fsm
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  (
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    input               ugb_enable,
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    output              adc_bus_bank_select,
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    output              adc_rd_en,
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    output      [3:0]   gear_select,
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    input               ugb_clock,
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    input               ugb_reset
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  );
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  // -----------------------------
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  //  state machine binary definitions
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  localparam STATE_13_IN_05_RESIDUE = 6'b0_1_0000;
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  localparam STATE_13_IN_10_RESIDUE = 6'b1_1_0001;
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  localparam STATE_00_IN_02_RESIDUE = 6'b0_0_0010;
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  localparam STATE_13_IN_07_RESIDUE = 6'b0_1_0011;
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  localparam STATE_13_IN_12_RESIDUE = 6'b1_1_0100;
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  localparam STATE_00_IN_04_RESIDUE = 6'b0_0_0101;
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  localparam STATE_13_IN_09_RESIDUE = 6'b0_1_0110;
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  localparam STATE_00_IN_01_RESIDUE = 6'b1_0_0111;
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  localparam STATE_13_IN_06_RESIDUE = 6'b1_1_1000;
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  localparam STATE_13_IN_11_RESIDUE = 6'b0_1_1001;
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  localparam STATE_00_IN_03_RESIDUE = 6'b1_0_1010;
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  localparam STATE_13_IN_08_RESIDUE = 6'b1_1_1011;
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  localparam STATE_00_IN_00_RESIDUE = 6'b0_0_1100;
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  // -----------------------------
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  //  state machine flop
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  reg [5:0] state;
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  reg [5:0] next_state;
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  always @(posedge ugb_clock)
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    if(ugb_reset)
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      state <= STATE_00_IN_00_RESIDUE;
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    else
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      state <= next_state;
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  // -----------------------------
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  //  state machine
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  always @( * )
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    case(state)
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      STATE_13_IN_05_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_10_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_05_RESIDUE;
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      STATE_13_IN_10_RESIDUE: if( ugb_enable )
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                                next_state = STATE_00_IN_02_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_10_RESIDUE;
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      STATE_00_IN_02_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_07_RESIDUE;
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                              else
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                                next_state = STATE_00_IN_02_RESIDUE;
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      STATE_13_IN_07_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_12_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_07_RESIDUE;
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      STATE_13_IN_12_RESIDUE: if( ugb_enable )
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                                next_state = STATE_00_IN_04_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_12_RESIDUE;
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      STATE_00_IN_04_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_09_RESIDUE;
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                              else
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                                next_state = STATE_00_IN_04_RESIDUE;
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      STATE_13_IN_09_RESIDUE: if( ugb_enable )
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                                next_state = STATE_00_IN_01_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_09_RESIDUE;
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      STATE_00_IN_01_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_06_RESIDUE;
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                              else
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                                next_state = STATE_00_IN_01_RESIDUE;
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      STATE_13_IN_06_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_11_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_06_RESIDUE;
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      STATE_13_IN_11_RESIDUE: if( ugb_enable )
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                                next_state = STATE_00_IN_03_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_11_RESIDUE;
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      STATE_00_IN_03_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_08_RESIDUE;
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                              else
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                                next_state = STATE_00_IN_03_RESIDUE;
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      STATE_13_IN_08_RESIDUE: if( ugb_enable )
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                                next_state = STATE_00_IN_00_RESIDUE;
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                              else
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                                next_state = STATE_13_IN_08_RESIDUE;
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      STATE_00_IN_00_RESIDUE: if( ugb_enable )
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                                next_state = STATE_13_IN_05_RESIDUE;
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                              else
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                                next_state = STATE_00_IN_00_RESIDUE;
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      default:                next_state   = STATE_00_IN_00_RESIDUE;
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    endcase
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  // --------------------------------------------------------------------
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  //  outputs
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  assign gear_select          = state[3:0];
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  assign adc_rd_en            = state[4];
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  assign adc_bus_bank_select  = state[5];
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endmodule
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