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1 34 qaztronic
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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module
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  recursive_mux
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  #(
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    A,  // mux select width
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    W, // data width
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    D = 2 ** A
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  )
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  (
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    input   [A-1:0] select,
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    input   [W-1:0] data_in [D-1:0],
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    output  [W-1:0] data_out
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  );
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  // --------------------------------------------------------------------
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  //
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  generate
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    if(A == 1)
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    begin: mux_gen
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        assign data_out = select ? data_in[1] : data_in[0];
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    end
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    else
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    begin: recurse_mux_gen
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      wire [W-1:0] data_out_lo, data_out_hi;
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      recursive_mux #(.A(A - 1), .W(W))
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        mux_lo
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        (
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          .select(select[A-2:0]),
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          .data_in(data_in[(D/2)-1:0]),
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          .data_out(data_out_lo)
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        );
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      recursive_mux #(.A(A - 1), .W(W))
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        mux_hi
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        (
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          .select(select[A-2:0]),
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          .data_in(data_in[D-1:(D/2)]),
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          .data_out(data_out_hi)
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        );
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      assign data_out = select[A-1] ? data_out_hi : data_out_lo;
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    end
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  endgenerate
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// --------------------------------------------------------------------
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//
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endmodule
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