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[/] [qaz_libs/] [trunk/] [camera_link/] [channel_link.v] - Blame information for rev 2

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1 2 qaztronic
//
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//
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//
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module channel_link
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(
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    input               clk_in,
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    input       [3:0]   data_in,
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    output  reg [27:0]  data_out,
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    input               reset
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);
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  // --------------------------------------------------------------------
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  //
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  wire [3:0]  clk_7x_index;
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  wire        clkout_7x;
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  camera_link_clk i_camera_link_clk
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  (
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    .clk_in(clk_in),
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    .clk_7x_index(clk_7x_index),
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    .clk_out_7x(clkout_7x),
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    .clock_good(),
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    .reset(reset)
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  );
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  // --------------------------------------------------------------------
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  //
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  reg payload [6:0] [3:0];
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  always @(negedge clkout_7x)
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    begin
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      payload[clk_7x_index][0] <= data_in[0];
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      payload[clk_7x_index][1] <= data_in[1];
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      payload[clk_7x_index][2] <= data_in[2];
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      payload[clk_7x_index][3] <= data_in[3];
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    end
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  // --------------------------------------------------------------------
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  //
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  always @(posedge clkout_7x)
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    if( clk_7x_index == 6 )
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      begin
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        data_out[0]   <= payload[6][0];
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        data_out[1]   <= payload[5][0];
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        data_out[2]   <= payload[4][0];
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        data_out[3]   <= payload[3][0];
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        data_out[4]   <= payload[2][0];
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        data_out[6]   <= payload[1][0];
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        data_out[7]   <= payload[0][0];
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        data_out[8]   <= payload[6][1];
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        data_out[9]   <= payload[5][1];
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        data_out[12]  <= payload[4][1];
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        data_out[13]  <= payload[3][1];
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        data_out[14]  <= payload[2][1];
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        data_out[15]  <= payload[1][1];
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        data_out[18]  <= payload[0][1];
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        data_out[19]  <= payload[6][2];
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        data_out[20]  <= payload[5][2];
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        data_out[21]  <= payload[4][2];
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        data_out[22]  <= payload[3][2];
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        data_out[24]  <= payload[2][2];
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        data_out[25]  <= payload[1][2];
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        data_out[26]  <= payload[0][2];
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        data_out[27]  <= payload[6][3];
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        data_out[5]   <= payload[5][3];
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        data_out[10]  <= payload[4][3];
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        data_out[11]  <= payload[3][3];
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        data_out[16]  <= payload[2][3];
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        data_out[17]  <= payload[1][3];
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        data_out[23]  <= payload[0][3];
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      end
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endmodule
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