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[/] [qaz_libs/] [trunk/] [camera_link/] [sim/] [src/] [tb_channel_link_rx_if.sv] - Blame information for rev 28

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1 28 qaztronic
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
27 27 qaztronic
 
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interface
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  tb_channel_link_rx_if
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  (
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    input [3:0]  p,
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    input [3:0]  n,
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    input [4:0]  invert_mux,
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    input        reset,
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    input        clk_p,
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    input        clk_n
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  );
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    // --------------------------------------------------------------------
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    //
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    timeunit 1ps / 1ps;
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    time clk_period = 0;
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    time clk_7x_period = 0;
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    time strobe_delay = 0;
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    // --------------------------------------------------------------------
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    //
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    int bit_index;
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    logic clk_7x;
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    wire tx_clk = invert_mux[4] ? ~clk_p : clk_p;
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    // --------------------------------------------------------------------
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    //
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    default clocking cb @(posedge tx_clk);
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      input p;
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      input n;
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      input reset;
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    endclocking
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    // --------------------------------------------------------------------
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    //
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    localparam B = 7;
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    // --------------------------------------------------------------------
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    //
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    task
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      generate_clocks
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      (
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        time clk_7x_period,
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        time strobe_delay
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      );
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        bit_index = 5;
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        forever
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          @(cb)
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          begin
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            #strobe_delay;
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            clk_7x <= 1;
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            generate_clk_7x_fork : fork
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            begin
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              repeat((B * 2) - 1)
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              begin
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                #(clk_7x_period / 2);
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                clk_7x <= ~clk_7x;
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                if(clk_7x == 1)
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                  if(bit_index == 6)
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                    bit_index = 0;
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                  else
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                    bit_index++;
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              end
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            end
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            join_none
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          end
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    endtask: generate_clocks
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    // --------------------------------------------------------------------
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    //
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    logic [6:0] rx_in [4];
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    always @(posedge clk_7x)
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    begin
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      rx_in[3][bit_index] <= invert_mux[3] ? ~p[3] : p[3];
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      rx_in[2][bit_index] <= invert_mux[2] ? ~p[2] : p[2];
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      rx_in[1][bit_index] <= invert_mux[1] ? ~p[1] : p[1];
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      rx_in[0][bit_index] <= invert_mux[0] ? ~p[0] : p[0];
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    end
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    // --------------------------------------------------------------------
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    //
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    logic [27:0] rx_data;
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    always @(posedge clk_7x)
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      if(bit_index == 6)
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      begin
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        //        6           5             4           3             2           1             0
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        {rx_data[27], rx_data[ 5], rx_data[10], rx_data[11], rx_data[16], rx_data[17], rx_data[23]} <= {invert_mux[3] ? ~p[3] : p[3], rx_in[3][5:0]};
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        {rx_data[19], rx_data[20], rx_data[21], rx_data[22], rx_data[24], rx_data[25], rx_data[26]} <= {invert_mux[2] ? ~p[2] : p[2], rx_in[2][5:0]};
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        {rx_data[ 8], rx_data[ 9], rx_data[12], rx_data[13], rx_data[14], rx_data[15], rx_data[18]} <= {invert_mux[1] ? ~p[1] : p[1], rx_in[1][5:0]};
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        {rx_data[ 0], rx_data[ 1], rx_data[ 2], rx_data[ 3], rx_data[ 4], rx_data[ 6], rx_data[ 7]} <= {invert_mux[0] ? ~p[0] : p[0], rx_in[0][5:0]};
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      end
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    // --------------------------------------------------------------------
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    //
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    wire        dval       = rx_data[26];
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    wire        fval       = rx_data[25];
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    wire        lval       = rx_data[24];
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    wire        spare      = rx_data[23];
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    wire [7:0]  port_a_d_g = {rx_data[5],      rx_data[27],    rx_data[6], rx_data[4:0]};
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    wire [7:0]  port_b_e_h = {rx_data[11],     rx_data[10],    rx_data[14:12], rx_data[9:7]};
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    wire [7:0]  port_c_f   = {rx_data[17:16],  rx_data[22:18], rx_data[15]};
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    // --------------------------------------------------------------------
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    //
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    task
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      init_clocks;
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        time clk_rise_t;
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        @(cb iff ~reset);
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        clk_rise_t = $time;
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        @(cb iff ~reset);
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        clk_period  = $time - clk_rise_t;
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        clk_7x_period = clk_period / B;
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        strobe_delay = clk_7x_period / 2;
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        $display("^^^ %16.t | %m | clk_period     = %t, ", $time, clk_period);
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        $display("^^^ %16.t | %m | clk_7x_period  = %t", $time, clk_7x_period);
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        $display("^^^ %16.t | %m | strobe_delay   = %t", $time, strobe_delay);
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        generate_clocks_fork : fork
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          generate_clocks(clk_7x_period, strobe_delay);
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        join_none
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    endtask: init_clocks
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    // --------------------------------------------------------------------
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    //
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    initial
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    begin
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      wait(~reset);
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      #500ns;
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      init_clocks();
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    end
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    // --------------------------------------------------------------------
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    //
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endinterface
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