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[/] [qaz_libs/] [trunk/] [camera_link/] [src/] [channel_link_if.sv] - Blame information for rev 27

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1 27 qaztronic
//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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interface
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  channel_link_if;
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    wire [3:0]  p;
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    wire [3:0]  n;
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    wire        clk_p;
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    wire        clk_n;
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  // --------------------------------------------------------------------
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  //
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  default clocking cb @(posedge clk_p);
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    inout p;
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    inout n;
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  endclocking
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  // --------------------------------------------------------------------
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  //
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  modport
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    out
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    (
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      output    p,
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      output    n,
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      clocking  cb
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    );
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  // --------------------------------------------------------------------
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  //
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  modport
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    in
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    (
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      input     p,
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      input     n,
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      clocking  cb
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    );
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  // --------------------------------------------------------------------
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  //
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endinterface
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