OpenCores
URL https://opencores.org/ocsvn/qaz_libs/qaz_libs/trunk

Subversion Repositories qaz_libs

[/] [qaz_libs/] [trunk/] [scripts/] [sim_procs.do] - Blame information for rev 31

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 23 qaztronic
# //////////////////////////////////////////////////////////////////////
2
# ////                                                              ////
3
# //// Copyright (C) 2015 Authors and OPENCORES.ORG                 ////
4
# ////                                                              ////
5
# //// This source file may be used and distributed without         ////
6
# //// restriction provided that this copyright statement is not    ////
7
# //// removed from the file and that any derivative work contains  ////
8
# //// the original copyright notice and the associated disclaimer. ////
9
# ////                                                              ////
10
# //// This source file is free software; you can redistribute it   ////
11
# //// and/or modify it under the terms of the GNU Lesser General   ////
12
# //// Public License as published by the Free Software Foundation; ////
13
# //// either version 2.1 of the License, or (at your option) any   ////
14
# //// later version.                                               ////
15
# ////                                                              ////
16
# //// This source is distributed in the hope that it will be       ////
17
# //// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
# //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
# //// PURPOSE.  See the GNU Lesser General Public License for more ////
20
# //// details.                                                     ////
21
# ////                                                              ////
22
# //// You should have received a copy of the GNU Lesser General    ////
23
# //// Public License along with this source; if not, download it   ////
24
# //// from http://www.opencores.org/lgpl.shtml                     ////
25
# ////                                                              ////
26
# //////////////////////////////////////////////////////////////////////
27
 
28
 
29
# ------------------------------------
30
#
31 31 qaztronic
proc sim_compile_lib {lib target} {
32
 
33
  global env
34
 
35
  echo "INFO: compiling $target rtl"
36
 
37
  foreach filename [glob -nocomplain -directory ${lib}/sim/libs/${target}_verilog/ *.f] {
38
    echo "INFO: compiling $filename"
39
    vlog -f $filename
40
  }
41
 
42
  foreach filename [glob -nocomplain -directory ${lib}/sim/libs/${target}_VHDL/ *.f] {
43
    echo "INFO: compiling $filename"
44
    vcom -explicit -f $filename
45
  }
46
}
47
 
48
 
49
# ------------------------------------
50
#
51 23 qaztronic
proc sim_compile_all { target } {
52
 
53
  global env
54
 
55
  echo "INFO: compiling $target rtl"
56
 
57
  foreach filename [glob -nocomplain -directory ../../libs/${target}_verilog/ *.f] {
58
    echo "INFO: compiling $filename"
59
    vlog -f $filename
60
  }
61
 
62
  foreach filename [glob -nocomplain -directory ../../libs/${target}_VHDL/ *.f] {
63
    echo "INFO: compiling $filename"
64
    vcom -explicit -f $filename
65
  }
66
}
67
 
68
 
69
# ------------------------------------
70
#
71
proc sim_run_sim {  } {
72
 
73
  if {[file exists ./sim.do]} {
74
    do ./sim.do
75
  } elseif {[file exists ../../libs/sim.do]} {
76
    do ../../libs/sim.do
77
  } elseif {[file exists ../../libs/altera_sim.f]} {
78
    vsim -novopt -f ../../libs/altera_sim.f -l transcript.txt work.tb_top
79
  } elseif {[file exists ../../libs/xilinx_sim.f]} {
80
    vsim -novopt -f ../../libs/xilinx_sim.f -l transcript.txt work.tb_top work.glbl
81
  }
82
 
83
  if { [file exists ./wave.do] } {
84
    do ./wave.do
85
  }
86
}
87
 
88
 
89
# ------------------------------------
90
#
91
proc sim_run_test {  } {
92
 
93
  global env
94
 
95
  # unique setup
96
  if { [file exists ./setup_test.do] } {
97
    do ./setup_test.do
98
  }
99
 
100
  if { [info exists env(MAKEFILE_TEST_RUN)] } {
101
    vlog +define+MAKEFILE_TEST_RUN ../../src/tb_top.v
102
  } else {
103
    sim_run_sim
104
  }
105
 
106
  run -all
107
}
108
 
109
 
110
# ------------------------------------
111
#
112
proc sim_restart {  } {
113
 
114
  global env
115
 
116
  # work in progress files to compile
117
  if { [file exists ./wip.do] } {
118
    echo "INFO: found ./wip.do"
119
    do ./wip.do
120
  }
121
 
122
  if { [string equal nodesign [runStatus]] } {
123
    sim_run_sim
124
  } else {
125
    restart -force
126
  }
127
 
128
  run -all
129
}
130
 
131
 
132
# ------------------------------------
133
#
134
proc make_lib { lib {rebuild 0} } {
135
 
136
  if {[file exists $lib/_info]} {
137
    echo "INFO: Simulation library $lib already exists"
138
 
139
    if { $rebuild != 0 } {
140
      echo "INFO: Rebuilding library. Deleting ./$lib and recompiling all"
141
      quit -sim
142
      file delete -force ./$lib
143
      vlib $lib
144
      vmap $lib $lib
145
    }
146
 
147
  } else {
148
      vlib $lib
149
      vmap $lib $lib
150
  }
151
}

powered by: WebSVN 2.1.0

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.