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[/] [qaz_libs/] [trunk/] [zed_board/] [src/] [zedboard_master_XDC_RevC_D_v2.xdc] - Blame information for rev 15

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1 15 qaztronic
# ----------------------------------------------------------------------------
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#     _____
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#    /     \
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#   /____   \____
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#  / \===\   \==/
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# /___\===\___\/  AVNET Design Resource Center
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#      \======/         www.em.avnet.com/drc
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#       \====/
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# ----------------------------------------------------------------------------
10
#
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#  Created With Avnet UCF Generator V0.4.0
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#     Date: Saturday, June 30, 2012
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#     Time: 12:18:55 AM
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#
15
#  This design is the property of Avnet.  Publication of this
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#  design is not authorized without written consent from Avnet.
17
#
18
#  Please direct any questions to:
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#     ZedBoard.org Community Forums
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#     http://www.zedboard.org
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#
22
#  Disclaimer:
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#     Avnet, Inc. makes no warranty for the use of this code or design.
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#     This code is provided  "As Is". Avnet, Inc assumes no responsibility for
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#     any errors, which may appear in this code, nor does it make a commitment
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#     to update the information contained herein. Avnet, Inc specifically
27
#     disclaims any implied warranties of fitness for a particular purpose.
28
#                      Copyright(c) 2012 Avnet, Inc.
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#                              All rights reserved.
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#
31
# ----------------------------------------------------------------------------
32
#
33
#  Notes:
34
#
35
#  10 August 2012
36
#     IO standards based upon Bank 34 and Bank 35 Vcco supply options of 1.8V,
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#     2.5V, or 3.3V are possible based upon the Vadj jumper (J18) settings.
38
#     By default, Vadj is expected to be set to 1.8V but if a different
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#     voltage is used for a particular design, then the corresponding IO
40
#     standard within this UCF should also be updated to reflect the actual
41
#     Vadj jumper selection.
42
#
43
#  09 September 2012
44
#     Net names are not allowed to contain hyphen characters '-' since this
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#     is not a legal VHDL87 or Verilog character within an identifier.
46
#     HDL net names are adjusted to contain no hyphen characters '-' but
47
#     rather use underscore '_' characters.  Comment net name with the hyphen
48
#     characters will remain in place since these are intended to match the
49
#     schematic net names in order to better enable schematic search.
50
#
51
#  17 April 2014
52
#     Pin constraint for toggle switch SW7 was corrected to M15 location.
53
#
54
#  16 April 2015
55
#     Corrected the way that entire banks are assigned to a particular IO
56
#     standard so that it works with more recent versions of Vivado Design
57
#     Suite and moved the IO standard constraints to the end of the file
58
#     along with some better organization and notes like we do with our SOMs.
59
#
60
# ----------------------------------------------------------------------------
61
 
62
# ----------------------------------------------------------------------------
63
# Audio Codec - Bank 13
64
# ----------------------------------------------------------------------------
65
set_property PACKAGE_PIN AB1 [get_ports {AC_ADR0}];  # "AC-ADR0"
66
set_property PACKAGE_PIN Y5  [get_ports {AC_ADR1}];  # "AC-ADR1"
67
set_property PACKAGE_PIN Y8  [get_ports {AC_GPIO0}];  # "AC-GPIO0"
68
set_property PACKAGE_PIN AA7 [get_ports {AC_GPIO1}];  # "AC-GPIO1"
69
set_property PACKAGE_PIN AA6 [get_ports {AC_GPIO2}];  # "AC-GPIO2"
70
set_property PACKAGE_PIN Y6  [get_ports {AC_GPIO3}];  # "AC-GPIO3"
71
set_property PACKAGE_PIN AB2 [get_ports {AC_MCLK}];  # "AC-MCLK"
72
set_property PACKAGE_PIN AB4 [get_ports {AC_SCK}];  # "AC-SCK"
73
set_property PACKAGE_PIN AB5 [get_ports {AC_SDA}];  # "AC-SDA"
74
 
75
# ----------------------------------------------------------------------------
76
# Clock Source - Bank 13
77
# ----------------------------------------------------------------------------
78
set_property PACKAGE_PIN Y9 [get_ports {GCLK}];  # "GCLK"
79
 
80
# ----------------------------------------------------------------------------
81
# JA Pmod - Bank 13
82
# ----------------------------------------------------------------------------
83
set_property PACKAGE_PIN Y11  [get_ports {JA1}];  # "JA1"
84
set_property PACKAGE_PIN AA8  [get_ports {JA10}];  # "JA10"
85
set_property PACKAGE_PIN AA11 [get_ports {JA2}];  # "JA2"
86
set_property PACKAGE_PIN Y10  [get_ports {JA3}];  # "JA3"
87
set_property PACKAGE_PIN AA9  [get_ports {JA4}];  # "JA4"
88
set_property PACKAGE_PIN AB11 [get_ports {JA7}];  # "JA7"
89
set_property PACKAGE_PIN AB10 [get_ports {JA8}];  # "JA8"
90
set_property PACKAGE_PIN AB9  [get_ports {JA9}];  # "JA9"
91
 
92
 
93
# ----------------------------------------------------------------------------
94
# JB Pmod - Bank 13
95
# ----------------------------------------------------------------------------
96
set_property PACKAGE_PIN W12 [get_ports {JB1}];  # "JB1"
97
set_property PACKAGE_PIN V8 [get_ports {JB10}];  # "JB10"
98
set_property PACKAGE_PIN W11 [get_ports {JB2}];  # "JB2"
99
set_property PACKAGE_PIN V10 [get_ports {JB3}];  # "JB3"
100
set_property PACKAGE_PIN W8 [get_ports {JB4}];  # "JB4"
101
set_property PACKAGE_PIN V12 [get_ports {JB7}];  # "JB7"
102
set_property PACKAGE_PIN W10 [get_ports {JB8}];  # "JB8"
103
set_property PACKAGE_PIN V9 [get_ports {JB9}];  # "JB9"
104
 
105
# ----------------------------------------------------------------------------
106
# JC Pmod - Bank 13
107
# ----------------------------------------------------------------------------
108
set_property PACKAGE_PIN AB6 [get_ports {JC1_N}];  # "JC1_N"
109
set_property PACKAGE_PIN AB7 [get_ports {JC1_P}];  # "JC1_P"
110
set_property PACKAGE_PIN AA4 [get_ports {JC2_N}];  # "JC2_N"
111
set_property PACKAGE_PIN Y4  [get_ports {JC2_P}];  # "JC2_P"
112
set_property PACKAGE_PIN T6  [get_ports {JC3_N}];  # "JC3_N"
113
set_property PACKAGE_PIN R6  [get_ports {JC3_P}];  # "JC3_P"
114
set_property PACKAGE_PIN U4  [get_ports {JC4_N}];  # "JC4_N"
115
set_property PACKAGE_PIN T4  [get_ports {JC4_P}];  # "JC4_P"
116
 
117
# ----------------------------------------------------------------------------
118
# JA Pmod - Bank 13
119
# ----------------------------------------------------------------------------
120
set_property PACKAGE_PIN W7 [get_ports {JD1_N}];  # "JD1_N"
121
set_property PACKAGE_PIN V7 [get_ports {JD1_P}];  # "JD1_P"
122
set_property PACKAGE_PIN V4 [get_ports {JD2_N}];  # "JD2_N"
123
set_property PACKAGE_PIN V5 [get_ports {JD2_P}];  # "JD2_P"
124
set_property PACKAGE_PIN W5 [get_ports {JD3_N}];  # "JD3_N"
125
set_property PACKAGE_PIN W6 [get_ports {JD3_P}];  # "JD3_P"
126
set_property PACKAGE_PIN U5 [get_ports {JD4_N}];  # "JD4_N"
127
set_property PACKAGE_PIN U6 [get_ports {JD4_P}];  # "JD4_P"
128
 
129
# ----------------------------------------------------------------------------
130
# OLED Display - Bank 13
131
# ----------------------------------------------------------------------------
132
set_property PACKAGE_PIN U10  [get_ports {OLED_DC}];  # "OLED-DC"
133
set_property PACKAGE_PIN U9   [get_ports {OLED_RES}];  # "OLED-RES"
134
set_property PACKAGE_PIN AB12 [get_ports {OLED_SCLK}];  # "OLED-SCLK"
135
set_property PACKAGE_PIN AA12 [get_ports {OLED_SDIN}];  # "OLED-SDIN"
136
set_property PACKAGE_PIN U11  [get_ports {OLED_VBAT}];  # "OLED-VBAT"
137
set_property PACKAGE_PIN U12  [get_ports {OLED_VDD}];  # "OLED-VDD"
138
 
139
# ----------------------------------------------------------------------------
140
# HDMI Output - Bank 33
141
# ----------------------------------------------------------------------------
142
set_property PACKAGE_PIN W18  [get_ports {HD_CLK}];  # "HD-CLK"
143
set_property PACKAGE_PIN Y13  [get_ports {HD_D0}];  # "HD-D0"
144
set_property PACKAGE_PIN AA13 [get_ports {HD_D1}];  # "HD-D1"
145
set_property PACKAGE_PIN W13  [get_ports {HD_D10}];  # "HD-D10"
146
set_property PACKAGE_PIN W15  [get_ports {HD_D11}];  # "HD-D11"
147
set_property PACKAGE_PIN V15  [get_ports {HD_D12}];  # "HD-D12"
148
set_property PACKAGE_PIN U17  [get_ports {HD_D13}];  # "HD-D13"
149
set_property PACKAGE_PIN V14  [get_ports {HD_D14}];  # "HD-D14"
150
set_property PACKAGE_PIN V13  [get_ports {HS_D15}];  # "HD-D15"
151
set_property PACKAGE_PIN AA14 [get_ports {HD_D2}];  # "HD-D2"
152
set_property PACKAGE_PIN Y14  [get_ports {HD_D3}];  # "HD-D3"
153
set_property PACKAGE_PIN AB15 [get_ports {HD_D4}];  # "HD-D4"
154
set_property PACKAGE_PIN AB16 [get_ports {HD_D5}];  # "HD-D5"
155
set_property PACKAGE_PIN AA16 [get_ports {HD_D6}];  # "HD-D6"
156
set_property PACKAGE_PIN AB17 [get_ports {HD_D7}];  # "HD-D7"
157
set_property PACKAGE_PIN AA17 [get_ports {HD_D8}];  # "HD-D8"
158
set_property PACKAGE_PIN Y15  [get_ports {HD_D9}];  # "HD-D9"
159
set_property PACKAGE_PIN U16  [get_ports {HD_DE}];  # "HD-DE"
160
set_property PACKAGE_PIN V17  [get_ports {HD_HSYNC}];  # "HD-HSYNC"
161
set_property PACKAGE_PIN W16  [get_ports {HD_INT}];  # "HD-INT"
162
set_property PACKAGE_PIN AA18 [get_ports {HD_SCL}];  # "HD-SCL"
163
set_property PACKAGE_PIN Y16  [get_ports {HD_SDA}];  # "HD-SDA"
164
set_property PACKAGE_PIN U15  [get_ports {HD_SPDIF}];  # "HD-SPDIF"
165
set_property PACKAGE_PIN Y18  [get_ports {HD_SPDIFO}];  # "HD-SPDIFO"
166
set_property PACKAGE_PIN W17  [get_ports {HD_VSYNC}];  # "HD-VSYNC"
167
 
168
# ----------------------------------------------------------------------------
169
# User LEDs - Bank 33
170
# ----------------------------------------------------------------------------
171
set_property PACKAGE_PIN T22 [get_ports {LD0}];  # "LD0"
172
set_property PACKAGE_PIN T21 [get_ports {LD1}];  # "LD1"
173
set_property PACKAGE_PIN U22 [get_ports {LD2}];  # "LD2"
174
set_property PACKAGE_PIN U21 [get_ports {LD3}];  # "LD3"
175
set_property PACKAGE_PIN V22 [get_ports {LD4}];  # "LD4"
176
set_property PACKAGE_PIN W22 [get_ports {LD5}];  # "LD5"
177
set_property PACKAGE_PIN U19 [get_ports {LD6}];  # "LD6"
178
set_property PACKAGE_PIN U14 [get_ports {LD7}];  # "LD7"
179
 
180
# ----------------------------------------------------------------------------
181
# VGA Output - Bank 33
182
# ----------------------------------------------------------------------------
183
set_property PACKAGE_PIN Y21  [get_ports {VGA_B1}];  # "VGA-B1"
184
set_property PACKAGE_PIN Y20  [get_ports {VGA_B2}];  # "VGA-B2"
185
set_property PACKAGE_PIN AB20 [get_ports {VGA_B3}];  # "VGA-B3"
186
set_property PACKAGE_PIN AB19 [get_ports {VGA_B4}];  # "VGA-B4"
187
set_property PACKAGE_PIN AB22 [get_ports {VGA_G1}];  # "VGA-G1"
188
set_property PACKAGE_PIN AA22 [get_ports {VGA_G2}];  # "VGA-G2"
189
set_property PACKAGE_PIN AB21 [get_ports {VGA_G3}];  # "VGA-G3"
190
set_property PACKAGE_PIN AA21 [get_ports {VGA_G4}];  # "VGA-G4"
191
set_property PACKAGE_PIN AA19 [get_ports {VGA_HS}];  # "VGA-HS"
192
set_property PACKAGE_PIN V20  [get_ports {VGA_R1}];  # "VGA-R1"
193
set_property PACKAGE_PIN U20  [get_ports {VGA_R2}];  # "VGA-R2"
194
set_property PACKAGE_PIN V19  [get_ports {VGA_R3}];  # "VGA-R3"
195
set_property PACKAGE_PIN V18  [get_ports {VGA_R4}];  # "VGA-R4"
196
set_property PACKAGE_PIN Y19  [get_ports {VGA_VS}];  # "VGA-VS"
197
 
198
# ----------------------------------------------------------------------------
199
# User Push Buttons - Bank 34
200
# ----------------------------------------------------------------------------
201
set_property PACKAGE_PIN P16 [get_ports {BTNC}];  # "BTNC"
202
set_property PACKAGE_PIN R16 [get_ports {BTND}];  # "BTND"
203
set_property PACKAGE_PIN N15 [get_ports {BTNL}];  # "BTNL"
204
set_property PACKAGE_PIN R18 [get_ports {BTNR}];  # "BTNR"
205
set_property PACKAGE_PIN T18 [get_ports {BTNU}];  # "BTNU"
206
 
207
# ----------------------------------------------------------------------------
208
# USB OTG Reset - Bank 34
209
# ----------------------------------------------------------------------------
210
set_property PACKAGE_PIN L16 [get_ports {OTG_VBUSOC}];  # "OTG-VBUSOC"
211
 
212
# # ----------------------------------------------------------------------------
213
# # XADC GIO - Bank 34
214
# # ----------------------------------------------------------------------------
215
# set_property PACKAGE_PIN H15 [get_ports {XADC_GIO0}];  # "XADC-GIO0"
216
# set_property PACKAGE_PIN R15 [get_ports {XADC_GIO1}];  # "XADC-GIO1"
217
# set_property PACKAGE_PIN K15 [get_ports {XADC_GIO2}];  # "XADC-GIO2"
218
# set_property PACKAGE_PIN J15 [get_ports {XADC_GIO3}];  # "XADC-GIO3"
219
 
220
# ----------------------------------------------------------------------------
221
# Miscellaneous - Bank 34
222
# ----------------------------------------------------------------------------
223
set_property PACKAGE_PIN K16 [get_ports {PUDC_B}];  # "PUDC_B"
224
 
225
# ----------------------------------------------------------------------------
226
# USB OTG Reset - Bank 35
227
# ----------------------------------------------------------------------------
228
set_property PACKAGE_PIN G17 [get_ports {OTG_RESETN}];  # "OTG-RESETN"
229
 
230
# ----------------------------------------------------------------------------
231
# User DIP Switches - Bank 35
232
# ----------------------------------------------------------------------------
233
set_property PACKAGE_PIN F22 [get_ports {SW0}];  # "SW0"
234
set_property PACKAGE_PIN G22 [get_ports {SW1}];  # "SW1"
235
set_property PACKAGE_PIN H22 [get_ports {SW2}];  # "SW2"
236
set_property PACKAGE_PIN F21 [get_ports {SW3}];  # "SW3"
237
set_property PACKAGE_PIN H19 [get_ports {SW4}];  # "SW4"
238
set_property PACKAGE_PIN H18 [get_ports {SW5}];  # "SW5"
239
set_property PACKAGE_PIN H17 [get_ports {SW6}];  # "SW6"
240
set_property PACKAGE_PIN M15 [get_ports {SW7}];  # "SW7"
241
 
242
# # ----------------------------------------------------------------------------
243
# # XADC AD Channels - Bank 35
244
# # ----------------------------------------------------------------------------
245
# set_property PACKAGE_PIN E16 [get_ports {AD0N_R}];  # "XADC-AD0N-R"
246
# set_property PACKAGE_PIN F16 [get_ports {AD0P_R}];  # "XADC-AD0P-R"
247
# set_property PACKAGE_PIN D17 [get_ports {AD8N_N}];  # "XADC-AD8N-R"
248
# set_property PACKAGE_PIN D16 [get_ports {AD8P_R}];  # "XADC-AD8P-R"
249
 
250
# ----------------------------------------------------------------------------
251
# FMC Expansion Connector - Bank 13
252
# ----------------------------------------------------------------------------
253
set_property PACKAGE_PIN R7 [get_ports {FMC_SCL}];  # "FMC-SCL"
254
set_property PACKAGE_PIN U7 [get_ports {FMC_SDA}];  # "FMC-SDA"
255
 
256
# ----------------------------------------------------------------------------
257
# FMC Expansion Connector - Bank 33
258
# ----------------------------------------------------------------------------
259
set_property PACKAGE_PIN AB14 [get_ports {FMC_PRSNT}];  # "FMC-PRSNT"
260
 
261
# ----------------------------------------------------------------------------
262
# FMC Expansion Connector - Bank 34
263
# ----------------------------------------------------------------------------
264
set_property PACKAGE_PIN L19 [get_ports {FMC_CLK0_N}];  # "FMC-CLK0_N"
265
set_property PACKAGE_PIN L18 [get_ports {FMC_CLK0_P}];  # "FMC-CLK0_P"
266
set_property PACKAGE_PIN M20 [get_ports {FMC_LA00_CC_N}];  # "FMC-LA00_CC_N"
267
set_property PACKAGE_PIN M19 [get_ports {FMC_LA00_CC_P}];  # "FMC-LA00_CC_P"
268
set_property PACKAGE_PIN N20 [get_ports {FMC_LA01_CC_N}];  # "FMC-LA01_CC_N"
269
set_property PACKAGE_PIN N19 [get_ports {FMC_LA01_CC_P}];  # "FMC-LA01_CC_P"
270
set_property PACKAGE_PIN P18 [get_ports {FMC_LA02_N}];  # "FMC-LA02_N"
271
set_property PACKAGE_PIN P17 [get_ports {FMC_LA02_P}];  # "FMC-LA02_P"
272
set_property PACKAGE_PIN P22 [get_ports {FMC_LA03_N}];  # "FMC-LA03_N"
273
set_property PACKAGE_PIN N22 [get_ports {FMC_LA03_P}];  # "FMC-LA03_P"
274
set_property PACKAGE_PIN M22 [get_ports {FMC_LA04_N}];  # "FMC-LA04_N"
275
set_property PACKAGE_PIN M21 [get_ports {FMC_LA04_P}];  # "FMC-LA04_P"
276
set_property PACKAGE_PIN K18 [get_ports {FMC_LA05_N}];  # "FMC-LA05_N"
277
set_property PACKAGE_PIN J18 [get_ports {FMC_LA05_P}];  # "FMC-LA05_P"
278
set_property PACKAGE_PIN L22 [get_ports {FMC_LA06_N}];  # "FMC-LA06_N"
279
set_property PACKAGE_PIN L21 [get_ports {FMC_LA06_P}];  # "FMC-LA06_P"
280
set_property PACKAGE_PIN T17 [get_ports {FMC_LA07_N}];  # "FMC-LA07_N"
281
set_property PACKAGE_PIN T16 [get_ports {FMC_LA07_P}];  # "FMC-LA07_P"
282
set_property PACKAGE_PIN J22 [get_ports {FMC_LA08_N}];  # "FMC-LA08_N"
283
set_property PACKAGE_PIN J21 [get_ports {FMC_LA08_P}];  # "FMC-LA08_P"
284
set_property PACKAGE_PIN R21 [get_ports {FMC_LA09_N}];  # "FMC-LA09_N"
285
set_property PACKAGE_PIN R20 [get_ports {FMC_LA09_P}];  # "FMC-LA09_P"
286
set_property PACKAGE_PIN T19 [get_ports {FMC_LA10_N}];  # "FMC-LA10_N"
287
set_property PACKAGE_PIN R19 [get_ports {FMC_LA10_P}];  # "FMC-LA10_P"
288
set_property PACKAGE_PIN N18 [get_ports {FMC_LA11_N}];  # "FMC-LA11_N"
289
set_property PACKAGE_PIN N17 [get_ports {FMC_LA11_P}];  # "FMC-LA11_P"
290
set_property PACKAGE_PIN P21 [get_ports {FMC_LA12_N}];  # "FMC-LA12_N"
291
set_property PACKAGE_PIN P20 [get_ports {FMC_LA12_P}];  # "FMC-LA12_P"
292
set_property PACKAGE_PIN M17 [get_ports {FMC_LA13_N}];  # "FMC-LA13_N"
293
set_property PACKAGE_PIN L17 [get_ports {FMC_LA13_P}];  # "FMC-LA13_P"
294
set_property PACKAGE_PIN K20 [get_ports {FMC_LA14_N}];  # "FMC-LA14_N"
295
set_property PACKAGE_PIN K19 [get_ports {FMC_LA14_P}];  # "FMC-LA14_P"
296
set_property PACKAGE_PIN J17 [get_ports {FMC_LA15_N}];  # "FMC-LA15_N"
297
set_property PACKAGE_PIN J16 [get_ports {FMC_LA15_P}];  # "FMC-LA15_P"
298
set_property PACKAGE_PIN K21 [get_ports {FMC_LA16_N}];  # "FMC-LA16_N"
299
set_property PACKAGE_PIN J20 [get_ports {FMC_LA16_P}];  # "FMC-LA16_P"
300
 
301
# ----------------------------------------------------------------------------
302
# FMC Expansion Connector - Bank 35
303
# ----------------------------------------------------------------------------
304
set_property PACKAGE_PIN C19 [get_ports {FMC_CLK1_N}];  # "FMC-CLK1_N"
305
set_property PACKAGE_PIN D18 [get_ports {FMC_CLK1_P}];  # "FMC-CLK1_P"
306
set_property PACKAGE_PIN B20 [get_ports {FMC_LA17_CC_N}];  # "FMC-LA17_CC_N"
307
set_property PACKAGE_PIN B19 [get_ports {FMC_LA17_CC_P}];  # "FMC-LA17_CC_P"
308
set_property PACKAGE_PIN C20 [get_ports {FMC_LA18_CC_N}];  # "FMC-LA18_CC_N"
309
set_property PACKAGE_PIN D20 [get_ports {FMC_LA18_CC_P}];  # "FMC-LA18_CC_P"
310
set_property PACKAGE_PIN G16 [get_ports {FMC_LA19_N}];  # "FMC-LA19_N"
311
set_property PACKAGE_PIN G15 [get_ports {FMC_LA19_P}];  # "FMC-LA19_P"
312
set_property PACKAGE_PIN G21 [get_ports {FMC_LA20_N}];  # "FMC-LA20_N"
313
set_property PACKAGE_PIN G20 [get_ports {FMC_LA20_P}];  # "FMC-LA20_P"
314
set_property PACKAGE_PIN E20 [get_ports {FMC_LA21_N}];  # "FMC-LA21_N"
315
set_property PACKAGE_PIN E19 [get_ports {FMC_LA21_P}];  # "FMC-LA21_P"
316
set_property PACKAGE_PIN F19 [get_ports {FMC_LA22_N}];  # "FMC-LA22_N"
317
set_property PACKAGE_PIN G19 [get_ports {FMC_LA22_P}];  # "FMC-LA22_P"
318
set_property PACKAGE_PIN D15 [get_ports {FMC_LA23_N}];  # "FMC-LA23_N"
319
set_property PACKAGE_PIN E15 [get_ports {FMC_LA23_P}];  # "FMC-LA23_P"
320
set_property PACKAGE_PIN A19 [get_ports {FMC_LA24_N}];  # "FMC-LA24_N"
321
set_property PACKAGE_PIN A18 [get_ports {FMC_LA24_P}];  # "FMC-LA24_P"
322
set_property PACKAGE_PIN C22 [get_ports {FMC_LA25_N}];  # "FMC-LA25_N"
323
set_property PACKAGE_PIN D22 [get_ports {FMC_LA25_P}];  # "FMC-LA25_P"
324
set_property PACKAGE_PIN E18 [get_ports {FMC_LA26_N}];  # "FMC-LA26_N"
325
set_property PACKAGE_PIN F18 [get_ports {FMC_LA26_P}];  # "FMC-LA26_P"
326
set_property PACKAGE_PIN D21 [get_ports {FMC_LA27_N}];  # "FMC-LA27_N"
327
set_property PACKAGE_PIN E21 [get_ports {FMC_LA27_P}];  # "FMC-LA27_P"
328
set_property PACKAGE_PIN A17 [get_ports {FMC_LA28_N}];  # "FMC-LA28_N"
329
set_property PACKAGE_PIN A16 [get_ports {FMC_LA28_P}];  # "FMC-LA28_P"
330
set_property PACKAGE_PIN C18 [get_ports {FMC_LA29_N}];  # "FMC-LA29_N"
331
set_property PACKAGE_PIN C17 [get_ports {FMC_LA29_P}];  # "FMC-LA29_P"
332
set_property PACKAGE_PIN B15 [get_ports {FMC_LA30_N}];  # "FMC-LA30_N"
333
set_property PACKAGE_PIN C15 [get_ports {FMC_LA30_P}];  # "FMC-LA30_P"
334
set_property PACKAGE_PIN B17 [get_ports {FMC_LA31_N}];  # "FMC-LA31_N"
335
set_property PACKAGE_PIN B16 [get_ports {FMC_LA31_P}];  # "FMC-LA31_P"
336
set_property PACKAGE_PIN A22 [get_ports {FMC_LA32_N}];  # "FMC-LA32_N"
337
set_property PACKAGE_PIN A21 [get_ports {FMC_LA32_P}];  # "FMC-LA32_P"
338
set_property PACKAGE_PIN B22 [get_ports {FMC_LA33_N}];  # "FMC-LA33_N"
339
set_property PACKAGE_PIN B21 [get_ports {FMC_LA33_P}];  # "FMC-LA33_P"
340
 
341
 
342
# ----------------------------------------------------------------------------
343
# IOSTANDARD Constraints
344
#
345
# Note that these IOSTANDARD constraints are applied to all IOs currently
346
# assigned within an I/O bank.  If these IOSTANDARD constraints are
347
# evaluated prior to other PACKAGE_PIN constraints being applied, then
348
# the IOSTANDARD specified will likely not be applied properly to those
349
# pins.  Therefore, bank wide IOSTANDARD constraints should be placed
350
# within the XDC file in a location that is evaluated AFTER all
351
# PACKAGE_PIN constraints within the target bank have been evaluated.
352
#
353
# Un-comment one or more of the following IOSTANDARD constraints according to
354
# the bank pin assignments that are required within a design.
355
# ----------------------------------------------------------------------------
356
 
357
# Note that the bank voltage for IO Bank 33 is fixed to 3.3V on ZedBoard.
358
set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 33]];
359
 
360
# Set the bank voltage for IO Bank 34 to 1.8V by default.
361
# set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 34]];
362
# set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 34]];
363
set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 34]];
364
 
365
# Set the bank voltage for IO Bank 35 to 1.8V by default.
366
# set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 35]];
367
# set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 35]];
368
set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 35]];
369
 
370
# Note that the bank voltage for IO Bank 13 is fixed to 3.3V on ZedBoard.
371
set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 13]];
372
 
373
 
374
set_property CFGBVS VCCO [current_design]
375
set_property CONFIG_VOLTAGE 3.3 [current_design]
376
 
377
 
378
 

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