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[/] [qaz_libs/] [trunk/] [zed_board/] [syn/] [axi_lite_to_wb/] [axi_lite_to_wb.sdk/] [hello/] [src/] [lscript.ld] - Blame information for rev 27

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Line No. Rev Author Line
1 27 qaztronic
/*******************************************************************/
2
/*                                                                 */
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/* This file is automatically generated by linker script generator.*/
4
/*                                                                 */
5
/* Version:                                 */
6
/*                                                                 */
7
/* Copyright (c) 2010-2016 Xilinx, Inc.  All rights reserved.      */
8
/*                                                                 */
9
/* Description : Cortex-A9 Linker Script                          */
10
/*                                                                 */
11
/*******************************************************************/
12
 
13
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x2000;
14
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x2000;
15
 
16
_ABORT_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024;
17
_SUPERVISOR_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048;
18
_IRQ_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024;
19
_FIQ_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024;
20
_UNDEF_STACK_SIZE = DEFINED(_UNDEF_STACK_SIZE) ? _UNDEF_STACK_SIZE : 1024;
21
 
22
/* Define Memories in the system */
23
 
24
MEMORY
25
{
26
   ps7_ddr_0_S_AXI_BASEADDR : ORIGIN = 0x100000, LENGTH = 0x1FF00000
27
   ps7_qspi_linear_0_S_AXI_BASEADDR : ORIGIN = 0xFC000000, LENGTH = 0x1000000
28
   ps7_ram_0_S_AXI_BASEADDR : ORIGIN = 0x0, LENGTH = 0x30000
29
   ps7_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0xFE00
30
}
31
 
32
/* Specify the default entry point to the program */
33
 
34
ENTRY(_vector_table)
35
 
36
/* Define the sections, and where they are mapped in memory */
37
 
38
SECTIONS
39
{
40
.text : {
41
   KEEP (*(.vectors))
42
   *(.boot)
43
   *(.text)
44
   *(.text.*)
45
   *(.gnu.linkonce.t.*)
46
   *(.plt)
47
   *(.gnu_warning)
48
   *(.gcc_execpt_table)
49
   *(.glue_7)
50
   *(.glue_7t)
51
   *(.vfp11_veneer)
52
   *(.ARM.extab)
53
   *(.gnu.linkonce.armextab.*)
54
} > ps7_ddr_0_S_AXI_BASEADDR
55
 
56
.init : {
57
   KEEP (*(.init))
58
} > ps7_ddr_0_S_AXI_BASEADDR
59
 
60
.fini : {
61
   KEEP (*(.fini))
62
} > ps7_ddr_0_S_AXI_BASEADDR
63
 
64
.rodata : {
65
   __rodata_start = .;
66
   *(.rodata)
67
   *(.rodata.*)
68
   *(.gnu.linkonce.r.*)
69
   __rodata_end = .;
70
} > ps7_ddr_0_S_AXI_BASEADDR
71
 
72
.rodata1 : {
73
   __rodata1_start = .;
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   *(.rodata1)
75
   *(.rodata1.*)
76
   __rodata1_end = .;
77
} > ps7_ddr_0_S_AXI_BASEADDR
78
 
79
.sdata2 : {
80
   __sdata2_start = .;
81
   *(.sdata2)
82
   *(.sdata2.*)
83
   *(.gnu.linkonce.s2.*)
84
   __sdata2_end = .;
85
} > ps7_ddr_0_S_AXI_BASEADDR
86
 
87
.sbss2 : {
88
   __sbss2_start = .;
89
   *(.sbss2)
90
   *(.sbss2.*)
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   *(.gnu.linkonce.sb2.*)
92
   __sbss2_end = .;
93
} > ps7_ddr_0_S_AXI_BASEADDR
94
 
95
.data : {
96
   __data_start = .;
97
   *(.data)
98
   *(.data.*)
99
   *(.gnu.linkonce.d.*)
100
   *(.jcr)
101
   *(.got)
102
   *(.got.plt)
103
   __data_end = .;
104
} > ps7_ddr_0_S_AXI_BASEADDR
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106
.data1 : {
107
   __data1_start = .;
108
   *(.data1)
109
   *(.data1.*)
110
   __data1_end = .;
111
} > ps7_ddr_0_S_AXI_BASEADDR
112
 
113
.got : {
114
   *(.got)
115
} > ps7_ddr_0_S_AXI_BASEADDR
116
 
117
.ctors : {
118
   __CTOR_LIST__ = .;
119
   ___CTORS_LIST___ = .;
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   KEEP (*crtbegin.o(.ctors))
121
   KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
122
   KEEP (*(SORT(.ctors.*)))
123
   KEEP (*(.ctors))
124
   __CTOR_END__ = .;
125
   ___CTORS_END___ = .;
126
} > ps7_ddr_0_S_AXI_BASEADDR
127
 
128
.dtors : {
129
   __DTOR_LIST__ = .;
130
   ___DTORS_LIST___ = .;
131
   KEEP (*crtbegin.o(.dtors))
132
   KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
133
   KEEP (*(SORT(.dtors.*)))
134
   KEEP (*(.dtors))
135
   __DTOR_END__ = .;
136
   ___DTORS_END___ = .;
137
} > ps7_ddr_0_S_AXI_BASEADDR
138
 
139
.fixup : {
140
   __fixup_start = .;
141
   *(.fixup)
142
   __fixup_end = .;
143
} > ps7_ddr_0_S_AXI_BASEADDR
144
 
145
.eh_frame : {
146
   *(.eh_frame)
147
} > ps7_ddr_0_S_AXI_BASEADDR
148
 
149
.eh_framehdr : {
150
   __eh_framehdr_start = .;
151
   *(.eh_framehdr)
152
   __eh_framehdr_end = .;
153
} > ps7_ddr_0_S_AXI_BASEADDR
154
 
155
.gcc_except_table : {
156
   *(.gcc_except_table)
157
} > ps7_ddr_0_S_AXI_BASEADDR
158
 
159
.mmu_tbl (ALIGN(16384)) : {
160
   __mmu_tbl_start = .;
161
   *(.mmu_tbl)
162
   __mmu_tbl_end = .;
163
} > ps7_ddr_0_S_AXI_BASEADDR
164
 
165
.ARM.exidx : {
166
   __exidx_start = .;
167
   *(.ARM.exidx*)
168
   *(.gnu.linkonce.armexidix.*.*)
169
   __exidx_end = .;
170
} > ps7_ddr_0_S_AXI_BASEADDR
171
 
172
.preinit_array : {
173
   __preinit_array_start = .;
174
   KEEP (*(SORT(.preinit_array.*)))
175
   KEEP (*(.preinit_array))
176
   __preinit_array_end = .;
177
} > ps7_ddr_0_S_AXI_BASEADDR
178
 
179
.init_array : {
180
   __init_array_start = .;
181
   KEEP (*(SORT(.init_array.*)))
182
   KEEP (*(.init_array))
183
   __init_array_end = .;
184
} > ps7_ddr_0_S_AXI_BASEADDR
185
 
186
.fini_array : {
187
   __fini_array_start = .;
188
   KEEP (*(SORT(.fini_array.*)))
189
   KEEP (*(.fini_array))
190
   __fini_array_end = .;
191
} > ps7_ddr_0_S_AXI_BASEADDR
192
 
193
.ARM.attributes : {
194
   __ARM.attributes_start = .;
195
   *(.ARM.attributes)
196
   __ARM.attributes_end = .;
197
} > ps7_ddr_0_S_AXI_BASEADDR
198
 
199
.sdata : {
200
   __sdata_start = .;
201
   *(.sdata)
202
   *(.sdata.*)
203
   *(.gnu.linkonce.s.*)
204
   __sdata_end = .;
205
} > ps7_ddr_0_S_AXI_BASEADDR
206
 
207
.sbss (NOLOAD) : {
208
   __sbss_start = .;
209
   *(.sbss)
210
   *(.sbss.*)
211
   *(.gnu.linkonce.sb.*)
212
   __sbss_end = .;
213
} > ps7_ddr_0_S_AXI_BASEADDR
214
 
215
.tdata : {
216
   __tdata_start = .;
217
   *(.tdata)
218
   *(.tdata.*)
219
   *(.gnu.linkonce.td.*)
220
   __tdata_end = .;
221
} > ps7_ddr_0_S_AXI_BASEADDR
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223
.tbss : {
224
   __tbss_start = .;
225
   *(.tbss)
226
   *(.tbss.*)
227
   *(.gnu.linkonce.tb.*)
228
   __tbss_end = .;
229
} > ps7_ddr_0_S_AXI_BASEADDR
230
 
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.bss (NOLOAD) : {
232
   __bss_start = .;
233
   *(.bss)
234
   *(.bss.*)
235
   *(.gnu.linkonce.b.*)
236
   *(COMMON)
237
   __bss_end = .;
238
} > ps7_ddr_0_S_AXI_BASEADDR
239
 
240
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
241
 
242
_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
243
 
244
/* Generate Stack and Heap definitions */
245
 
246
.heap (NOLOAD) : {
247
   . = ALIGN(16);
248
   _heap = .;
249
   HeapBase = .;
250
   _heap_start = .;
251
   . += _HEAP_SIZE;
252
   _heap_end = .;
253
   HeapLimit = .;
254
} > ps7_ddr_0_S_AXI_BASEADDR
255
 
256
.stack (NOLOAD) : {
257
   . = ALIGN(16);
258
   _stack_end = .;
259
   . += _STACK_SIZE;
260
   . = ALIGN(16);
261
   _stack = .;
262
   __stack = _stack;
263
   . = ALIGN(16);
264
   _irq_stack_end = .;
265
   . += _IRQ_STACK_SIZE;
266
   . = ALIGN(16);
267
   __irq_stack = .;
268
   _supervisor_stack_end = .;
269
   . += _SUPERVISOR_STACK_SIZE;
270
   . = ALIGN(16);
271
   __supervisor_stack = .;
272
   _abort_stack_end = .;
273
   . += _ABORT_STACK_SIZE;
274
   . = ALIGN(16);
275
   __abort_stack = .;
276
   _fiq_stack_end = .;
277
   . += _FIQ_STACK_SIZE;
278
   . = ALIGN(16);
279
   __fiq_stack = .;
280
   _undef_stack_end = .;
281
   . += _UNDEF_STACK_SIZE;
282
   . = ALIGN(16);
283
   __undef_stack = .;
284
} > ps7_ddr_0_S_AXI_BASEADDR
285
 
286
_end = .;
287
}
288
 

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