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[/] [radiohdl/] [trunk/] [base/] [test/] [cdf_dir/] [tree/] [hdlbuildset/] [hdl_buildset_unb1.cfg] - Blame information for rev 2

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Line No. Rev Author Line
1 2 danv
# Uniboardd 1 configuration
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buildset_name             = unb1
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technology_names          = ip_stratixiv
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family_names              = stratixiv
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block_design_names        = sopc
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sim_tool_name             = modelsim
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sim_tool_version          = 6.6c
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synth_tool_name           = quartus
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synth_tool_version        = 11.1sp2
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lib_root_dir              = $RADIOHDL
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build_dir                 = $HDL_BUILD_DIR
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quartus_dir               = /home/software/Altera/
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model_tech_altera_lib     = /home/software/modelsim_altera_libs/
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model_tech_dir            = /home/software/Mentor//modeltech
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vsim_dir                  = /linux_x86_64
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modelsim_search_libraries =
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    # stratixiv only
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    altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
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    altera     lpm     sgate     altera_mf     altera_lnsim     stratixiv     stratixiv_hssi     stratixiv_pcie_hip

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