OpenCores
URL https://opencores.org/ocsvn/ram_wb/ram_wb/trunk

Subversion Repositories ram_wb

[/] [ram_wb/] [trunk/] [rtl/] [verilog/] [ram_wb_sc_dw_32x1024.vm] - Blame information for rev 7

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 7 unneback 
//
2 
// Written by Synplify
3 
// Product Version "Version 9.6A"
4 
// Program "Synplify", Mapper "9.4.2, Build 069R"
5 
// Wed Apr 29 11:28:25 2009
6 
//
7 
// Source file index table:
8 
// Object locations will have the form :
9 
// file 0 "noname"
10 
// file 1 "\c:\actel\libero_v8.5\synplify\synplify_96a\lib\proasic\proasic3.v "
11 
// file 2 "\l:\work\ocsvn\ram_wb\trunk\rtl\verilog\ram_wb_sc_dw.v "
12 
 
13 
`timescale 100 ps/100 ps
14 
module ram_sc_dw (
15 
  d_a,
16 
  q_a,
17 
  adr_a,
18 
  we_a,
19 
  q_b,
20 
  adr_b,
21 
  d_b,
22 
  we_b,
23 
  clk
24 
)
25 
;
26 
input [31:0] d_a ;
27 
output [31:0] q_a ;
28 
input [10:0] adr_a ;
29 
input we_a ;
30 
output [31:0] q_b ;
31 
input [10:0] adr_b ;
32 
input [31:0] d_b ;
33 
input we_b ;
34 
input clk ;
35 
wire we_a ;
36 
wire we_b ;
37 
wire clk ;
38 
wire [8:2] \ram_tile_14.DOUT0_SIG ;
39 
wire [8:2] \ram_tile_14.DOUT1_SIG ;
40 
wire [8:2] \ram_tile_13.DOUT0_SIG ;
41 
wire [8:2] \ram_tile_13.DOUT1_SIG ;
42 
wire [8:2] \ram_tile_12.DOUT0_SIG ;
43 
wire [8:2] \ram_tile_12.DOUT1_SIG ;
44 
wire [8:2] \ram_tile_11.DOUT0_SIG ;
45 
wire [8:2] \ram_tile_11.DOUT1_SIG ;
46 
wire [8:2] \ram_tile_10.DOUT0_SIG ;
47 
wire [8:2] \ram_tile_10.DOUT1_SIG ;
48 
wire [8:2] \ram_tile_9.DOUT0_SIG ;
49 
wire [8:2] \ram_tile_9.DOUT1_SIG ;
50 
wire [8:2] \ram_tile_8.DOUT0_SIG ;
51 
wire [8:2] \ram_tile_8.DOUT1_SIG ;
52 
wire [8:2] \ram_tile_7.DOUT0_SIG ;
53 
wire [8:2] \ram_tile_7.DOUT1_SIG ;
54 
wire [8:2] \ram_tile_6.DOUT0_SIG ;
55 
wire [8:2] \ram_tile_6.DOUT1_SIG ;
56 
wire [8:2] \ram_tile_5.DOUT0_SIG ;
57 
wire [8:2] \ram_tile_5.DOUT1_SIG ;
58 
wire [8:2] \ram_tile_4.DOUT0_SIG ;
59 
wire [8:2] \ram_tile_4.DOUT1_SIG ;
60 
wire [8:2] \ram_tile_3.DOUT0_SIG ;
61 
wire [8:2] \ram_tile_3.DOUT1_SIG ;
62 
wire [8:2] \ram_tile_2.DOUT0_SIG ;
63 
wire [8:2] \ram_tile_2.DOUT1_SIG ;
64 
wire [8:2] \ram_tile_1.DOUT0_SIG ;
65 
wire [8:2] \ram_tile_1.DOUT1_SIG ;
66 
wire [8:2] \ram_tile_0.DOUT0_SIG ;
67 
wire [8:2] \ram_tile_0.DOUT1_SIG ;
68 
wire [8:2] \ram_tile.DOUT0_SIG ;
69 
wire [8:2] \ram_tile.DOUT1_SIG ;
70 
wire VCC ;
71 
wire N_1 ;
72 
wire N_2 ;
73 
wire N_3 ;
74 
wire N_4 ;
75 
wire N_5 ;
76 
wire N_6 ;
77 
wire N_7 ;
78 
wire N_8 ;
79 
wire N_9 ;
80 
wire N_10 ;
81 
wire N_11 ;
82 
wire N_12 ;
83 
wire N_13 ;
84 
wire N_14 ;
85 
wire N_15 ;
86 
wire N_16 ;
87 
wire N_17 ;
88 
wire N_18 ;
89 
wire N_19 ;
90 
wire N_20 ;
91 
wire N_21 ;
92 
wire N_22 ;
93 
wire GND ;
94 
wire we_b_i ;
95 
wire we_a_i ;
96 
wire GND_Z ;
97 
wire VCC_Z ;
98 
  INV we_a_RNIA08 (
99 
        .Y(we_a_i),
100 
        .A(we_a)
101 
);
102 
  INV we_b_RNIB08 (
103 
        .Y(we_b_i),
104 
        .A(we_b)
105 
);
106 
//@2:26
107 
//@2:26
108 
//@2:26
109 
//@2:26
110 
//@2:26
111 
//@2:26
112 
//@2:26
113 
//@2:26
114 
//@2:26
115 
//@2:26
116 
//@2:26
117 
//@2:26
118 
//@2:26
119 
//@2:26
120 
//@2:26
121 
//@2:26
122 
//@2:26
123 
//@2:26
124 
//@2:26
125 
//@2:26
126 
//@2:26
127 
//@2:26
128 
// @2:26
129 
  RAM4K9 \ram_tile_14.I_1  (
130 
        .DOUTA0(q_b[30]),
131 
        .DOUTA1(q_b[31]),
132 
        .DOUTA2(\ram_tile_14.DOUT0_SIG [2]),
133 
        .DOUTA3(\ram_tile_14.DOUT0_SIG [3]),
134 
        .DOUTA4(\ram_tile_14.DOUT0_SIG [4]),
135 
        .DOUTA5(\ram_tile_14.DOUT0_SIG [5]),
136 
        .DOUTA6(\ram_tile_14.DOUT0_SIG [6]),
137 
        .DOUTA7(\ram_tile_14.DOUT0_SIG [7]),
138 
        .DOUTA8(\ram_tile_14.DOUT0_SIG [8]),
139 
        .DOUTB0(q_a[30]),
140 
        .DOUTB1(q_a[31]),
141 
        .DOUTB2(\ram_tile_14.DOUT1_SIG [2]),
142 
        .DOUTB3(\ram_tile_14.DOUT1_SIG [3]),
143 
        .DOUTB4(\ram_tile_14.DOUT1_SIG [4]),
144 
        .DOUTB5(\ram_tile_14.DOUT1_SIG [5]),
145 
        .DOUTB6(\ram_tile_14.DOUT1_SIG [6]),
146 
        .DOUTB7(\ram_tile_14.DOUT1_SIG [7]),
147 
        .DOUTB8(\ram_tile_14.DOUT1_SIG [8]),
148 
        .ADDRA0(adr_b[0]),
149 
        .ADDRA1(adr_b[1]),
150 
        .ADDRA2(adr_b[2]),
151 
        .ADDRA3(adr_b[3]),
152 
        .ADDRA4(adr_b[4]),
153 
        .ADDRA5(adr_b[5]),
154 
        .ADDRA6(adr_b[6]),
155 
        .ADDRA7(adr_b[7]),
156 
        .ADDRA8(adr_b[8]),
157 
        .ADDRA9(adr_b[9]),
158 
        .ADDRA10(adr_b[10]),
159 
        .ADDRA11(GND),
160 
        .ADDRB0(adr_a[0]),
161 
        .ADDRB1(adr_a[1]),
162 
        .ADDRB2(adr_a[2]),
163 
        .ADDRB3(adr_a[3]),
164 
        .ADDRB4(adr_a[4]),
165 
        .ADDRB5(adr_a[5]),
166 
        .ADDRB6(adr_a[6]),
167 
        .ADDRB7(adr_a[7]),
168 
        .ADDRB8(adr_a[8]),
169 
        .ADDRB9(adr_a[9]),
170 
        .ADDRB10(adr_a[10]),
171 
        .ADDRB11(GND),
172 
        .BLKA(GND),
173 
        .BLKB(GND),
174 
        .CLKA(clk),
175 
        .CLKB(clk),
176 
        .DINA0(d_b[30]),
177 
        .DINA1(d_b[31]),
178 
        .DINA2(GND),
179 
        .DINA3(GND),
180 
        .DINA4(GND),
181 
        .DINA5(GND),
182 
        .DINA6(GND),
183 
        .DINA7(GND),
184 
        .DINA8(GND),
185 
        .DINB0(d_a[30]),
186 
        .DINB1(d_a[31]),
187 
        .DINB2(GND),
188 
        .DINB3(GND),
189 
        .DINB4(GND),
190 
        .DINB5(GND),
191 
        .DINB6(GND),
192 
        .DINB7(GND),
193 
        .DINB8(GND),
194 
        .PIPEA(GND),
195 
        .PIPEB(GND),
196 
        .RESET(VCC),
197 
        .WENA(we_b_i),
198 
        .WENB(we_a_i),
199 
        .WIDTHA1(GND),
200 
        .WIDTHA0(VCC),
201 
        .WIDTHB1(GND),
202 
        .WIDTHB0(VCC),
203 
        .WMODEA(GND),
204 
        .WMODEB(GND)
205 
);
206 
// @2:26
207 
  RAM4K9 \ram_tile_13.I_1  (
208 
        .DOUTA0(q_b[28]),
209 
        .DOUTA1(q_b[29]),
210 
        .DOUTA2(\ram_tile_13.DOUT0_SIG [2]),
211 
        .DOUTA3(\ram_tile_13.DOUT0_SIG [3]),
212 
        .DOUTA4(\ram_tile_13.DOUT0_SIG [4]),
213 
        .DOUTA5(\ram_tile_13.DOUT0_SIG [5]),
214 
        .DOUTA6(\ram_tile_13.DOUT0_SIG [6]),
215 
        .DOUTA7(\ram_tile_13.DOUT0_SIG [7]),
216 
        .DOUTA8(\ram_tile_13.DOUT0_SIG [8]),
217 
        .DOUTB0(q_a[28]),
218 
        .DOUTB1(q_a[29]),
219 
        .DOUTB2(\ram_tile_13.DOUT1_SIG [2]),
220 
        .DOUTB3(\ram_tile_13.DOUT1_SIG [3]),
221 
        .DOUTB4(\ram_tile_13.DOUT1_SIG [4]),
222 
        .DOUTB5(\ram_tile_13.DOUT1_SIG [5]),
223 
        .DOUTB6(\ram_tile_13.DOUT1_SIG [6]),
224 
        .DOUTB7(\ram_tile_13.DOUT1_SIG [7]),
225 
        .DOUTB8(\ram_tile_13.DOUT1_SIG [8]),
226 
        .ADDRA0(adr_b[0]),
227 
        .ADDRA1(adr_b[1]),
228 
        .ADDRA2(adr_b[2]),
229 
        .ADDRA3(adr_b[3]),
230 
        .ADDRA4(adr_b[4]),
231 
        .ADDRA5(adr_b[5]),
232 
        .ADDRA6(adr_b[6]),
233 
        .ADDRA7(adr_b[7]),
234 
        .ADDRA8(adr_b[8]),
235 
        .ADDRA9(adr_b[9]),
236 
        .ADDRA10(adr_b[10]),
237 
        .ADDRA11(GND),
238 
        .ADDRB0(adr_a[0]),
239 
        .ADDRB1(adr_a[1]),
240 
        .ADDRB2(adr_a[2]),
241 
        .ADDRB3(adr_a[3]),
242 
        .ADDRB4(adr_a[4]),
243 
        .ADDRB5(adr_a[5]),
244 
        .ADDRB6(adr_a[6]),
245 
        .ADDRB7(adr_a[7]),
246 
        .ADDRB8(adr_a[8]),
247 
        .ADDRB9(adr_a[9]),
248 
        .ADDRB10(adr_a[10]),
249 
        .ADDRB11(GND),
250 
        .BLKA(GND),
251 
        .BLKB(GND),
252 
        .CLKA(clk),
253 
        .CLKB(clk),
254 
        .DINA0(d_b[28]),
255 
        .DINA1(d_b[29]),
256 
        .DINA2(GND),
257 
        .DINA3(GND),
258 
        .DINA4(GND),
259 
        .DINA5(GND),
260 
        .DINA6(GND),
261 
        .DINA7(GND),
262 
        .DINA8(GND),
263 
        .DINB0(d_a[28]),
264 
        .DINB1(d_a[29]),
265 
        .DINB2(GND),
266 
        .DINB3(GND),
267 
        .DINB4(GND),
268 
        .DINB5(GND),
269 
        .DINB6(GND),
270 
        .DINB7(GND),
271 
        .DINB8(GND),
272 
        .PIPEA(GND),
273 
        .PIPEB(GND),
274 
        .RESET(VCC),
275 
        .WENA(we_b_i),
276 
        .WENB(we_a_i),
277 
        .WIDTHA1(GND),
278 
        .WIDTHA0(VCC),
279 
        .WIDTHB1(GND),
280 
        .WIDTHB0(VCC),
281 
        .WMODEA(GND),
282 
        .WMODEB(GND)
283 
);
284 
// @2:26
285 
  RAM4K9 \ram_tile_12.I_1  (
286 
        .DOUTA0(q_b[26]),
287 
        .DOUTA1(q_b[27]),
288 
        .DOUTA2(\ram_tile_12.DOUT0_SIG [2]),
289 
        .DOUTA3(\ram_tile_12.DOUT0_SIG [3]),
290 
        .DOUTA4(\ram_tile_12.DOUT0_SIG [4]),
291 
        .DOUTA5(\ram_tile_12.DOUT0_SIG [5]),
292 
        .DOUTA6(\ram_tile_12.DOUT0_SIG [6]),
293 
        .DOUTA7(\ram_tile_12.DOUT0_SIG [7]),
294 
        .DOUTA8(\ram_tile_12.DOUT0_SIG [8]),
295 
        .DOUTB0(q_a[26]),
296 
        .DOUTB1(q_a[27]),
297 
        .DOUTB2(\ram_tile_12.DOUT1_SIG [2]),
298 
        .DOUTB3(\ram_tile_12.DOUT1_SIG [3]),
299 
        .DOUTB4(\ram_tile_12.DOUT1_SIG [4]),
300 
        .DOUTB5(\ram_tile_12.DOUT1_SIG [5]),
301 
        .DOUTB6(\ram_tile_12.DOUT1_SIG [6]),
302 
        .DOUTB7(\ram_tile_12.DOUT1_SIG [7]),
303 
        .DOUTB8(\ram_tile_12.DOUT1_SIG [8]),
304 
        .ADDRA0(adr_b[0]),
305 
        .ADDRA1(adr_b[1]),
306 
        .ADDRA2(adr_b[2]),
307 
        .ADDRA3(adr_b[3]),
308 
        .ADDRA4(adr_b[4]),
309 
        .ADDRA5(adr_b[5]),
310 
        .ADDRA6(adr_b[6]),
311 
        .ADDRA7(adr_b[7]),
312 
        .ADDRA8(adr_b[8]),
313 
        .ADDRA9(adr_b[9]),
314 
        .ADDRA10(adr_b[10]),
315 
        .ADDRA11(GND),
316 
        .ADDRB0(adr_a[0]),
317 
        .ADDRB1(adr_a[1]),
318 
        .ADDRB2(adr_a[2]),
319 
        .ADDRB3(adr_a[3]),
320 
        .ADDRB4(adr_a[4]),
321 
        .ADDRB5(adr_a[5]),
322 
        .ADDRB6(adr_a[6]),
323 
        .ADDRB7(adr_a[7]),
324 
        .ADDRB8(adr_a[8]),
325 
        .ADDRB9(adr_a[9]),
326 
        .ADDRB10(adr_a[10]),
327 
        .ADDRB11(GND),
328 
        .BLKA(GND),
329 
        .BLKB(GND),
330 
        .CLKA(clk),
331 
        .CLKB(clk),
332 
        .DINA0(d_b[26]),
333 
        .DINA1(d_b[27]),
334 
        .DINA2(GND),
335 
        .DINA3(GND),
336 
        .DINA4(GND),
337 
        .DINA5(GND),
338 
        .DINA6(GND),
339 
        .DINA7(GND),
340 
        .DINA8(GND),
341 
        .DINB0(d_a[26]),
342 
        .DINB1(d_a[27]),
343 
        .DINB2(GND),
344 
        .DINB3(GND),
345 
        .DINB4(GND),
346 
        .DINB5(GND),
347 
        .DINB6(GND),
348 
        .DINB7(GND),
349 
        .DINB8(GND),
350 
        .PIPEA(GND),
351 
        .PIPEB(GND),
352 
        .RESET(VCC),
353 
        .WENA(we_b_i),
354 
        .WENB(we_a_i),
355 
        .WIDTHA1(GND),
356 
        .WIDTHA0(VCC),
357 
        .WIDTHB1(GND),
358 
        .WIDTHB0(VCC),
359 
        .WMODEA(GND),
360 
        .WMODEB(GND)
361 
);
362 
// @2:26
363 
  RAM4K9 \ram_tile_11.I_1  (
364 
        .DOUTA0(q_b[24]),
365 
        .DOUTA1(q_b[25]),
366 
        .DOUTA2(\ram_tile_11.DOUT0_SIG [2]),
367 
        .DOUTA3(\ram_tile_11.DOUT0_SIG [3]),
368 
        .DOUTA4(\ram_tile_11.DOUT0_SIG [4]),
369 
        .DOUTA5(\ram_tile_11.DOUT0_SIG [5]),
370 
        .DOUTA6(\ram_tile_11.DOUT0_SIG [6]),
371 
        .DOUTA7(\ram_tile_11.DOUT0_SIG [7]),
372 
        .DOUTA8(\ram_tile_11.DOUT0_SIG [8]),
373 
        .DOUTB0(q_a[24]),
374 
        .DOUTB1(q_a[25]),
375 
        .DOUTB2(\ram_tile_11.DOUT1_SIG [2]),
376 
        .DOUTB3(\ram_tile_11.DOUT1_SIG [3]),
377 
        .DOUTB4(\ram_tile_11.DOUT1_SIG [4]),
378 
        .DOUTB5(\ram_tile_11.DOUT1_SIG [5]),
379 
        .DOUTB6(\ram_tile_11.DOUT1_SIG [6]),
380 
        .DOUTB7(\ram_tile_11.DOUT1_SIG [7]),
381 
        .DOUTB8(\ram_tile_11.DOUT1_SIG [8]),
382 
        .ADDRA0(adr_b[0]),
383 
        .ADDRA1(adr_b[1]),
384 
        .ADDRA2(adr_b[2]),
385 
        .ADDRA3(adr_b[3]),
386 
        .ADDRA4(adr_b[4]),
387 
        .ADDRA5(adr_b[5]),
388 
        .ADDRA6(adr_b[6]),
389 
        .ADDRA7(adr_b[7]),
390 
        .ADDRA8(adr_b[8]),
391 
        .ADDRA9(adr_b[9]),
392 
        .ADDRA10(adr_b[10]),
393 
        .ADDRA11(GND),
394 
        .ADDRB0(adr_a[0]),
395 
        .ADDRB1(adr_a[1]),
396 
        .ADDRB2(adr_a[2]),
397 
        .ADDRB3(adr_a[3]),
398 
        .ADDRB4(adr_a[4]),
399 
        .ADDRB5(adr_a[5]),
400 
        .ADDRB6(adr_a[6]),
401 
        .ADDRB7(adr_a[7]),
402 
        .ADDRB8(adr_a[8]),
403 
        .ADDRB9(adr_a[9]),
404 
        .ADDRB10(adr_a[10]),
405 
        .ADDRB11(GND),
406 
        .BLKA(GND),
407 
        .BLKB(GND),
408 
        .CLKA(clk),
409 
        .CLKB(clk),
410 
        .DINA0(d_b[24]),
411 
        .DINA1(d_b[25]),
412 
        .DINA2(GND),
413 
        .DINA3(GND),
414 
        .DINA4(GND),
415 
        .DINA5(GND),
416 
        .DINA6(GND),
417 
        .DINA7(GND),
418 
        .DINA8(GND),
419 
        .DINB0(d_a[24]),
420 
        .DINB1(d_a[25]),
421 
        .DINB2(GND),
422 
        .DINB3(GND),
423 
        .DINB4(GND),
424 
        .DINB5(GND),
425 
        .DINB6(GND),
426 
        .DINB7(GND),
427 
        .DINB8(GND),
428 
        .PIPEA(GND),
429 
        .PIPEB(GND),
430 
        .RESET(VCC),
431 
        .WENA(we_b_i),
432 
        .WENB(we_a_i),
433 
        .WIDTHA1(GND),
434 
        .WIDTHA0(VCC),
435 
        .WIDTHB1(GND),
436 
        .WIDTHB0(VCC),
437 
        .WMODEA(GND),
438 
        .WMODEB(GND)
439 
);
440 
// @2:26
441 
  RAM4K9 \ram_tile_10.I_1  (
442 
        .DOUTA0(q_b[22]),
443 
        .DOUTA1(q_b[23]),
444 
        .DOUTA2(\ram_tile_10.DOUT0_SIG [2]),
445 
        .DOUTA3(\ram_tile_10.DOUT0_SIG [3]),
446 
        .DOUTA4(\ram_tile_10.DOUT0_SIG [4]),
447 
        .DOUTA5(\ram_tile_10.DOUT0_SIG [5]),
448 
        .DOUTA6(\ram_tile_10.DOUT0_SIG [6]),
449 
        .DOUTA7(\ram_tile_10.DOUT0_SIG [7]),
450 
        .DOUTA8(\ram_tile_10.DOUT0_SIG [8]),
451 
        .DOUTB0(q_a[22]),
452 
        .DOUTB1(q_a[23]),
453 
        .DOUTB2(\ram_tile_10.DOUT1_SIG [2]),
454 
        .DOUTB3(\ram_tile_10.DOUT1_SIG [3]),
455 
        .DOUTB4(\ram_tile_10.DOUT1_SIG [4]),
456 
        .DOUTB5(\ram_tile_10.DOUT1_SIG [5]),
457 
        .DOUTB6(\ram_tile_10.DOUT1_SIG [6]),
458 
        .DOUTB7(\ram_tile_10.DOUT1_SIG [7]),
459 
        .DOUTB8(\ram_tile_10.DOUT1_SIG [8]),
460 
        .ADDRA0(adr_b[0]),
461 
        .ADDRA1(adr_b[1]),
462 
        .ADDRA2(adr_b[2]),
463 
        .ADDRA3(adr_b[3]),
464 
        .ADDRA4(adr_b[4]),
465 
        .ADDRA5(adr_b[5]),
466 
        .ADDRA6(adr_b[6]),
467 
        .ADDRA7(adr_b[7]),
468 
        .ADDRA8(adr_b[8]),
469 
        .ADDRA9(adr_b[9]),
470 
        .ADDRA10(adr_b[10]),
471 
        .ADDRA11(GND),
472 
        .ADDRB0(adr_a[0]),
473 
        .ADDRB1(adr_a[1]),
474 
        .ADDRB2(adr_a[2]),
475 
        .ADDRB3(adr_a[3]),
476 
        .ADDRB4(adr_a[4]),
477 
        .ADDRB5(adr_a[5]),
478 
        .ADDRB6(adr_a[6]),
479 
        .ADDRB7(adr_a[7]),
480 
        .ADDRB8(adr_a[8]),
481 
        .ADDRB9(adr_a[9]),
482 
        .ADDRB10(adr_a[10]),
483 
        .ADDRB11(GND),
484 
        .BLKA(GND),
485 
        .BLKB(GND),
486 
        .CLKA(clk),
487 
        .CLKB(clk),
488 
        .DINA0(d_b[22]),
489 
        .DINA1(d_b[23]),
490 
        .DINA2(GND),
491 
        .DINA3(GND),
492 
        .DINA4(GND),
493 
        .DINA5(GND),
494 
        .DINA6(GND),
495 
        .DINA7(GND),
496 
        .DINA8(GND),
497 
        .DINB0(d_a[22]),
498 
        .DINB1(d_a[23]),
499 
        .DINB2(GND),
500 
        .DINB3(GND),
501 
        .DINB4(GND),
502 
        .DINB5(GND),
503 
        .DINB6(GND),
504 
        .DINB7(GND),
505 
        .DINB8(GND),
506 
        .PIPEA(GND),
507 
        .PIPEB(GND),
508 
        .RESET(VCC),
509 
        .WENA(we_b_i),
510 
        .WENB(we_a_i),
511 
        .WIDTHA1(GND),
512 
        .WIDTHA0(VCC),
513 
        .WIDTHB1(GND),
514 
        .WIDTHB0(VCC),
515 
        .WMODEA(GND),
516 
        .WMODEB(GND)
517 
);
518 
// @2:26
519 
  RAM4K9 \ram_tile_9.I_1  (
520 
        .DOUTA0(q_b[20]),
521 
        .DOUTA1(q_b[21]),
522 
        .DOUTA2(\ram_tile_9.DOUT0_SIG [2]),
523 
        .DOUTA3(\ram_tile_9.DOUT0_SIG [3]),
524 
        .DOUTA4(\ram_tile_9.DOUT0_SIG [4]),
525 
        .DOUTA5(\ram_tile_9.DOUT0_SIG [5]),
526 
        .DOUTA6(\ram_tile_9.DOUT0_SIG [6]),
527 
        .DOUTA7(\ram_tile_9.DOUT0_SIG [7]),
528 
        .DOUTA8(\ram_tile_9.DOUT0_SIG [8]),
529 
        .DOUTB0(q_a[20]),
530 
        .DOUTB1(q_a[21]),
531 
        .DOUTB2(\ram_tile_9.DOUT1_SIG [2]),
532 
        .DOUTB3(\ram_tile_9.DOUT1_SIG [3]),
533 
        .DOUTB4(\ram_tile_9.DOUT1_SIG [4]),
534 
        .DOUTB5(\ram_tile_9.DOUT1_SIG [5]),
535 
        .DOUTB6(\ram_tile_9.DOUT1_SIG [6]),
536 
        .DOUTB7(\ram_tile_9.DOUT1_SIG [7]),
537 
        .DOUTB8(\ram_tile_9.DOUT1_SIG [8]),
538 
        .ADDRA0(adr_b[0]),
539 
        .ADDRA1(adr_b[1]),
540 
        .ADDRA2(adr_b[2]),
541 
        .ADDRA3(adr_b[3]),
542 
        .ADDRA4(adr_b[4]),
543 
        .ADDRA5(adr_b[5]),
544 
        .ADDRA6(adr_b[6]),
545 
        .ADDRA7(adr_b[7]),
546 
        .ADDRA8(adr_b[8]),
547 
        .ADDRA9(adr_b[9]),
548 
        .ADDRA10(adr_b[10]),
549 
        .ADDRA11(GND),
550 
        .ADDRB0(adr_a[0]),
551 
        .ADDRB1(adr_a[1]),
552 
        .ADDRB2(adr_a[2]),
553 
        .ADDRB3(adr_a[3]),
554 
        .ADDRB4(adr_a[4]),
555 
        .ADDRB5(adr_a[5]),
556 
        .ADDRB6(adr_a[6]),
557 
        .ADDRB7(adr_a[7]),
558 
        .ADDRB8(adr_a[8]),
559 
        .ADDRB9(adr_a[9]),
560 
        .ADDRB10(adr_a[10]),
561 
        .ADDRB11(GND),
562 
        .BLKA(GND),
563 
        .BLKB(GND),
564 
        .CLKA(clk),
565 
        .CLKB(clk),
566 
        .DINA0(d_b[20]),
567 
        .DINA1(d_b[21]),
568 
        .DINA2(GND),
569 
        .DINA3(GND),
570 
        .DINA4(GND),
571 
        .DINA5(GND),
572 
        .DINA6(GND),
573 
        .DINA7(GND),
574 
        .DINA8(GND),
575 
        .DINB0(d_a[20]),
576 
        .DINB1(d_a[21]),
577 
        .DINB2(GND),
578 
        .DINB3(GND),
579 
        .DINB4(GND),
580 
        .DINB5(GND),
581 
        .DINB6(GND),
582 
        .DINB7(GND),
583 
        .DINB8(GND),
584 
        .PIPEA(GND),
585 
        .PIPEB(GND),
586 
        .RESET(VCC),
587 
        .WENA(we_b_i),
588 
        .WENB(we_a_i),
589 
        .WIDTHA1(GND),
590 
        .WIDTHA0(VCC),
591 
        .WIDTHB1(GND),
592 
        .WIDTHB0(VCC),
593 
        .WMODEA(GND),
594 
        .WMODEB(GND)
595 
);
596 
// @2:26
597 
  RAM4K9 \ram_tile_8.I_1  (
598 
        .DOUTA0(q_b[18]),
599 
        .DOUTA1(q_b[19]),
600 
        .DOUTA2(\ram_tile_8.DOUT0_SIG [2]),
601 
        .DOUTA3(\ram_tile_8.DOUT0_SIG [3]),
602 
        .DOUTA4(\ram_tile_8.DOUT0_SIG [4]),
603 
        .DOUTA5(\ram_tile_8.DOUT0_SIG [5]),
604 
        .DOUTA6(\ram_tile_8.DOUT0_SIG [6]),
605 
        .DOUTA7(\ram_tile_8.DOUT0_SIG [7]),
606 
        .DOUTA8(\ram_tile_8.DOUT0_SIG [8]),
607 
        .DOUTB0(q_a[18]),
608 
        .DOUTB1(q_a[19]),
609 
        .DOUTB2(\ram_tile_8.DOUT1_SIG [2]),
610 
        .DOUTB3(\ram_tile_8.DOUT1_SIG [3]),
611 
        .DOUTB4(\ram_tile_8.DOUT1_SIG [4]),
612 
        .DOUTB5(\ram_tile_8.DOUT1_SIG [5]),
613 
        .DOUTB6(\ram_tile_8.DOUT1_SIG [6]),
614 
        .DOUTB7(\ram_tile_8.DOUT1_SIG [7]),
615 
        .DOUTB8(\ram_tile_8.DOUT1_SIG [8]),
616 
        .ADDRA0(adr_b[0]),
617 
        .ADDRA1(adr_b[1]),
618 
        .ADDRA2(adr_b[2]),
619 
        .ADDRA3(adr_b[3]),
620 
        .ADDRA4(adr_b[4]),
621 
        .ADDRA5(adr_b[5]),
622 
        .ADDRA6(adr_b[6]),
623 
        .ADDRA7(adr_b[7]),
624 
        .ADDRA8(adr_b[8]),
625 
        .ADDRA9(adr_b[9]),
626 
        .ADDRA10(adr_b[10]),
627 
        .ADDRA11(GND),
628 
        .ADDRB0(adr_a[0]),
629 
        .ADDRB1(adr_a[1]),
630 
        .ADDRB2(adr_a[2]),
631 
        .ADDRB3(adr_a[3]),
632 
        .ADDRB4(adr_a[4]),
633 
        .ADDRB5(adr_a[5]),
634 
        .ADDRB6(adr_a[6]),
635 
        .ADDRB7(adr_a[7]),
636 
        .ADDRB8(adr_a[8]),
637 
        .ADDRB9(adr_a[9]),
638 
        .ADDRB10(adr_a[10]),
639 
        .ADDRB11(GND),
640 
        .BLKA(GND),
641 
        .BLKB(GND),
642 
        .CLKA(clk),
643 
        .CLKB(clk),
644 
        .DINA0(d_b[18]),
645 
        .DINA1(d_b[19]),
646 
        .DINA2(GND),
647 
        .DINA3(GND),
648 
        .DINA4(GND),
649 
        .DINA5(GND),
650 
        .DINA6(GND),
651 
        .DINA7(GND),
652 
        .DINA8(GND),
653 
        .DINB0(d_a[18]),
654 
        .DINB1(d_a[19]),
655 
        .DINB2(GND),
656 
        .DINB3(GND),
657 
        .DINB4(GND),
658 
        .DINB5(GND),
659 
        .DINB6(GND),
660 
        .DINB7(GND),
661 
        .DINB8(GND),
662 
        .PIPEA(GND),
663 
        .PIPEB(GND),
664 
        .RESET(VCC),
665 
        .WENA(we_b_i),
666 
        .WENB(we_a_i),
667 
        .WIDTHA1(GND),
668 
        .WIDTHA0(VCC),
669 
        .WIDTHB1(GND),
670 
        .WIDTHB0(VCC),
671 
        .WMODEA(GND),
672 
        .WMODEB(GND)
673 
);
674 
// @2:26
675 
  RAM4K9 \ram_tile_7.I_1  (
676 
        .DOUTA0(q_b[16]),
677 
        .DOUTA1(q_b[17]),
678 
        .DOUTA2(\ram_tile_7.DOUT0_SIG [2]),
679 
        .DOUTA3(\ram_tile_7.DOUT0_SIG [3]),
680 
        .DOUTA4(\ram_tile_7.DOUT0_SIG [4]),
681 
        .DOUTA5(\ram_tile_7.DOUT0_SIG [5]),
682 
        .DOUTA6(\ram_tile_7.DOUT0_SIG [6]),
683 
        .DOUTA7(\ram_tile_7.DOUT0_SIG [7]),
684 
        .DOUTA8(\ram_tile_7.DOUT0_SIG [8]),
685 
        .DOUTB0(q_a[16]),
686 
        .DOUTB1(q_a[17]),
687 
        .DOUTB2(\ram_tile_7.DOUT1_SIG [2]),
688 
        .DOUTB3(\ram_tile_7.DOUT1_SIG [3]),
689 
        .DOUTB4(\ram_tile_7.DOUT1_SIG [4]),
690 
        .DOUTB5(\ram_tile_7.DOUT1_SIG [5]),
691 
        .DOUTB6(\ram_tile_7.DOUT1_SIG [6]),
692 
        .DOUTB7(\ram_tile_7.DOUT1_SIG [7]),
693 
        .DOUTB8(\ram_tile_7.DOUT1_SIG [8]),
694 
        .ADDRA0(adr_b[0]),
695 
        .ADDRA1(adr_b[1]),
696 
        .ADDRA2(adr_b[2]),
697 
        .ADDRA3(adr_b[3]),
698 
        .ADDRA4(adr_b[4]),
699 
        .ADDRA5(adr_b[5]),
700 
        .ADDRA6(adr_b[6]),
701 
        .ADDRA7(adr_b[7]),
702 
        .ADDRA8(adr_b[8]),
703 
        .ADDRA9(adr_b[9]),
704 
        .ADDRA10(adr_b[10]),
705 
        .ADDRA11(GND),
706 
        .ADDRB0(adr_a[0]),
707 
        .ADDRB1(adr_a[1]),
708 
        .ADDRB2(adr_a[2]),
709 
        .ADDRB3(adr_a[3]),
710 
        .ADDRB4(adr_a[4]),
711 
        .ADDRB5(adr_a[5]),
712 
        .ADDRB6(adr_a[6]),
713 
        .ADDRB7(adr_a[7]),
714 
        .ADDRB8(adr_a[8]),
715 
        .ADDRB9(adr_a[9]),
716 
        .ADDRB10(adr_a[10]),
717 
        .ADDRB11(GND),
718 
        .BLKA(GND),
719 
        .BLKB(GND),
720 
        .CLKA(clk),
721 
        .CLKB(clk),
722 
        .DINA0(d_b[16]),
723 
        .DINA1(d_b[17]),
724 
        .DINA2(GND),
725 
        .DINA3(GND),
726 
        .DINA4(GND),
727 
        .DINA5(GND),
728 
        .DINA6(GND),
729 
        .DINA7(GND),
730 
        .DINA8(GND),
731 
        .DINB0(d_a[16]),
732 
        .DINB1(d_a[17]),
733 
        .DINB2(GND),
734 
        .DINB3(GND),
735 
        .DINB4(GND),
736 
        .DINB5(GND),
737 
        .DINB6(GND),
738 
        .DINB7(GND),
739 
        .DINB8(GND),
740 
        .PIPEA(GND),
741 
        .PIPEB(GND),
742 
        .RESET(VCC),
743 
        .WENA(we_b_i),
744 
        .WENB(we_a_i),
745 
        .WIDTHA1(GND),
746 
        .WIDTHA0(VCC),
747 
        .WIDTHB1(GND),
748 
        .WIDTHB0(VCC),
749 
        .WMODEA(GND),
750 
        .WMODEB(GND)
751 
);
752 
// @2:26
753 
  RAM4K9 \ram_tile_6.I_1  (
754 
        .DOUTA0(q_b[14]),
755 
        .DOUTA1(q_b[15]),
756 
        .DOUTA2(\ram_tile_6.DOUT0_SIG [2]),
757 
        .DOUTA3(\ram_tile_6.DOUT0_SIG [3]),
758 
        .DOUTA4(\ram_tile_6.DOUT0_SIG [4]),
759 
        .DOUTA5(\ram_tile_6.DOUT0_SIG [5]),
760 
        .DOUTA6(\ram_tile_6.DOUT0_SIG [6]),
761 
        .DOUTA7(\ram_tile_6.DOUT0_SIG [7]),
762 
        .DOUTA8(\ram_tile_6.DOUT0_SIG [8]),
763 
        .DOUTB0(q_a[14]),
764 
        .DOUTB1(q_a[15]),
765 
        .DOUTB2(\ram_tile_6.DOUT1_SIG [2]),
766 
        .DOUTB3(\ram_tile_6.DOUT1_SIG [3]),
767 
        .DOUTB4(\ram_tile_6.DOUT1_SIG [4]),
768 
        .DOUTB5(\ram_tile_6.DOUT1_SIG [5]),
769 
        .DOUTB6(\ram_tile_6.DOUT1_SIG [6]),
770 
        .DOUTB7(\ram_tile_6.DOUT1_SIG [7]),
771 
        .DOUTB8(\ram_tile_6.DOUT1_SIG [8]),
772 
        .ADDRA0(adr_b[0]),
773 
        .ADDRA1(adr_b[1]),
774 
        .ADDRA2(adr_b[2]),
775 
        .ADDRA3(adr_b[3]),
776 
        .ADDRA4(adr_b[4]),
777 
        .ADDRA5(adr_b[5]),
778 
        .ADDRA6(adr_b[6]),
779 
        .ADDRA7(adr_b[7]),
780 
        .ADDRA8(adr_b[8]),
781 
        .ADDRA9(adr_b[9]),
782 
        .ADDRA10(adr_b[10]),
783 
        .ADDRA11(GND),
784 
        .ADDRB0(adr_a[0]),
785 
        .ADDRB1(adr_a[1]),
786 
        .ADDRB2(adr_a[2]),
787 
        .ADDRB3(adr_a[3]),
788 
        .ADDRB4(adr_a[4]),
789 
        .ADDRB5(adr_a[5]),
790 
        .ADDRB6(adr_a[6]),
791 
        .ADDRB7(adr_a[7]),
792 
        .ADDRB8(adr_a[8]),
793 
        .ADDRB9(adr_a[9]),
794 
        .ADDRB10(adr_a[10]),
795 
        .ADDRB11(GND),
796 
        .BLKA(GND),
797 
        .BLKB(GND),
798 
        .CLKA(clk),
799 
        .CLKB(clk),
800 
        .DINA0(d_b[14]),
801 
        .DINA1(d_b[15]),
802 
        .DINA2(GND),
803 
        .DINA3(GND),
804 
        .DINA4(GND),
805 
        .DINA5(GND),
806 
        .DINA6(GND),
807 
        .DINA7(GND),
808 
        .DINA8(GND),
809 
        .DINB0(d_a[14]),
810 
        .DINB1(d_a[15]),
811 
        .DINB2(GND),
812 
        .DINB3(GND),
813 
        .DINB4(GND),
814 
        .DINB5(GND),
815 
        .DINB6(GND),
816 
        .DINB7(GND),
817 
        .DINB8(GND),
818 
        .PIPEA(GND),
819 
        .PIPEB(GND),
820 
        .RESET(VCC),
821 
        .WENA(we_b_i),
822 
        .WENB(we_a_i),
823 
        .WIDTHA1(GND),
824 
        .WIDTHA0(VCC),
825 
        .WIDTHB1(GND),
826 
        .WIDTHB0(VCC),
827 
        .WMODEA(GND),
828 
        .WMODEB(GND)
829 
);
830 
// @2:26
831 
  RAM4K9 \ram_tile_5.I_1  (
832 
        .DOUTA0(q_b[12]),
833 
        .DOUTA1(q_b[13]),
834 
        .DOUTA2(\ram_tile_5.DOUT0_SIG [2]),
835 
        .DOUTA3(\ram_tile_5.DOUT0_SIG [3]),
836 
        .DOUTA4(\ram_tile_5.DOUT0_SIG [4]),
837 
        .DOUTA5(\ram_tile_5.DOUT0_SIG [5]),
838 
        .DOUTA6(\ram_tile_5.DOUT0_SIG [6]),
839 
        .DOUTA7(\ram_tile_5.DOUT0_SIG [7]),
840 
        .DOUTA8(\ram_tile_5.DOUT0_SIG [8]),
841 
        .DOUTB0(q_a[12]),
842 
        .DOUTB1(q_a[13]),
843 
        .DOUTB2(\ram_tile_5.DOUT1_SIG [2]),
844 
        .DOUTB3(\ram_tile_5.DOUT1_SIG [3]),
845 
        .DOUTB4(\ram_tile_5.DOUT1_SIG [4]),
846 
        .DOUTB5(\ram_tile_5.DOUT1_SIG [5]),
847 
        .DOUTB6(\ram_tile_5.DOUT1_SIG [6]),
848 
        .DOUTB7(\ram_tile_5.DOUT1_SIG [7]),
849 
        .DOUTB8(\ram_tile_5.DOUT1_SIG [8]),
850 
        .ADDRA0(adr_b[0]),
851 
        .ADDRA1(adr_b[1]),
852 
        .ADDRA2(adr_b[2]),
853 
        .ADDRA3(adr_b[3]),
854 
        .ADDRA4(adr_b[4]),
855 
        .ADDRA5(adr_b[5]),
856 
        .ADDRA6(adr_b[6]),
857 
        .ADDRA7(adr_b[7]),
858 
        .ADDRA8(adr_b[8]),
859 
        .ADDRA9(adr_b[9]),
860 
        .ADDRA10(adr_b[10]),
861 
        .ADDRA11(GND),
862 
        .ADDRB0(adr_a[0]),
863 
        .ADDRB1(adr_a[1]),
864 
        .ADDRB2(adr_a[2]),
865 
        .ADDRB3(adr_a[3]),
866 
        .ADDRB4(adr_a[4]),
867 
        .ADDRB5(adr_a[5]),
868 
        .ADDRB6(adr_a[6]),
869 
        .ADDRB7(adr_a[7]),
870 
        .ADDRB8(adr_a[8]),
871 
        .ADDRB9(adr_a[9]),
872 
        .ADDRB10(adr_a[10]),
873 
        .ADDRB11(GND),
874 
        .BLKA(GND),
875 
        .BLKB(GND),
876 
        .CLKA(clk),
877 
        .CLKB(clk),
878 
        .DINA0(d_b[12]),
879 
        .DINA1(d_b[13]),
880 
        .DINA2(GND),
881 
        .DINA3(GND),
882 
        .DINA4(GND),
883 
        .DINA5(GND),
884 
        .DINA6(GND),
885 
        .DINA7(GND),
886 
        .DINA8(GND),
887 
        .DINB0(d_a[12]),
888 
        .DINB1(d_a[13]),
889 
        .DINB2(GND),
890 
        .DINB3(GND),
891 
        .DINB4(GND),
892 
        .DINB5(GND),
893 
        .DINB6(GND),
894 
        .DINB7(GND),
895 
        .DINB8(GND),
896 
        .PIPEA(GND),
897 
        .PIPEB(GND),
898 
        .RESET(VCC),
899 
        .WENA(we_b_i),
900 
        .WENB(we_a_i),
901 
        .WIDTHA1(GND),
902 
        .WIDTHA0(VCC),
903 
        .WIDTHB1(GND),
904 
        .WIDTHB0(VCC),
905 
        .WMODEA(GND),
906 
        .WMODEB(GND)
907 
);
908 
// @2:26
909 
  RAM4K9 \ram_tile_4.I_1  (
910 
        .DOUTA0(q_b[10]),
911 
        .DOUTA1(q_b[11]),
912 
        .DOUTA2(\ram_tile_4.DOUT0_SIG [2]),
913 
        .DOUTA3(\ram_tile_4.DOUT0_SIG [3]),
914 
        .DOUTA4(\ram_tile_4.DOUT0_SIG [4]),
915 
        .DOUTA5(\ram_tile_4.DOUT0_SIG [5]),
916 
        .DOUTA6(\ram_tile_4.DOUT0_SIG [6]),
917 
        .DOUTA7(\ram_tile_4.DOUT0_SIG [7]),
918 
        .DOUTA8(\ram_tile_4.DOUT0_SIG [8]),
919 
        .DOUTB0(q_a[10]),
920 
        .DOUTB1(q_a[11]),
921 
        .DOUTB2(\ram_tile_4.DOUT1_SIG [2]),
922 
        .DOUTB3(\ram_tile_4.DOUT1_SIG [3]),
923 
        .DOUTB4(\ram_tile_4.DOUT1_SIG [4]),
924 
        .DOUTB5(\ram_tile_4.DOUT1_SIG [5]),
925 
        .DOUTB6(\ram_tile_4.DOUT1_SIG [6]),
926 
        .DOUTB7(\ram_tile_4.DOUT1_SIG [7]),
927 
        .DOUTB8(\ram_tile_4.DOUT1_SIG [8]),
928 
        .ADDRA0(adr_b[0]),
929 
        .ADDRA1(adr_b[1]),
930 
        .ADDRA2(adr_b[2]),
931 
        .ADDRA3(adr_b[3]),
932 
        .ADDRA4(adr_b[4]),
933 
        .ADDRA5(adr_b[5]),
934 
        .ADDRA6(adr_b[6]),
935 
        .ADDRA7(adr_b[7]),
936 
        .ADDRA8(adr_b[8]),
937 
        .ADDRA9(adr_b[9]),
938 
        .ADDRA10(adr_b[10]),
939 
        .ADDRA11(GND),
940 
        .ADDRB0(adr_a[0]),
941 
        .ADDRB1(adr_a[1]),
942 
        .ADDRB2(adr_a[2]),
943 
        .ADDRB3(adr_a[3]),
944 
        .ADDRB4(adr_a[4]),
945 
        .ADDRB5(adr_a[5]),
946 
        .ADDRB6(adr_a[6]),
947 
        .ADDRB7(adr_a[7]),
948 
        .ADDRB8(adr_a[8]),
949 
        .ADDRB9(adr_a[9]),
950 
        .ADDRB10(adr_a[10]),
951 
        .ADDRB11(GND),
952 
        .BLKA(GND),
953 
        .BLKB(GND),
954 
        .CLKA(clk),
955 
        .CLKB(clk),
956 
        .DINA0(d_b[10]),
957 
        .DINA1(d_b[11]),
958 
        .DINA2(GND),
959 
        .DINA3(GND),
960 
        .DINA4(GND),
961 
        .DINA5(GND),
962 
        .DINA6(GND),
963 
        .DINA7(GND),
964 
        .DINA8(GND),
965 
        .DINB0(d_a[10]),
966 
        .DINB1(d_a[11]),
967 
        .DINB2(GND),
968 
        .DINB3(GND),
969 
        .DINB4(GND),
970 
        .DINB5(GND),
971 
        .DINB6(GND),
972 
        .DINB7(GND),
973 
        .DINB8(GND),
974 
        .PIPEA(GND),
975 
        .PIPEB(GND),
976 
        .RESET(VCC),
977 
        .WENA(we_b_i),
978 
        .WENB(we_a_i),
979 
        .WIDTHA1(GND),
980 
        .WIDTHA0(VCC),
981 
        .WIDTHB1(GND),
982 
        .WIDTHB0(VCC),
983 
        .WMODEA(GND),
984 
        .WMODEB(GND)
985 
);
986 
// @2:26
987 
  RAM4K9 \ram_tile_3.I_1  (
988 
        .DOUTA0(q_b[8]),
989 
        .DOUTA1(q_b[9]),
990 
        .DOUTA2(\ram_tile_3.DOUT0_SIG [2]),
991 
        .DOUTA3(\ram_tile_3.DOUT0_SIG [3]),
992 
        .DOUTA4(\ram_tile_3.DOUT0_SIG [4]),
993 
        .DOUTA5(\ram_tile_3.DOUT0_SIG [5]),
994 
        .DOUTA6(\ram_tile_3.DOUT0_SIG [6]),
995 
        .DOUTA7(\ram_tile_3.DOUT0_SIG [7]),
996 
        .DOUTA8(\ram_tile_3.DOUT0_SIG [8]),
997 
        .DOUTB0(q_a[8]),
998 
        .DOUTB1(q_a[9]),
999 
        .DOUTB2(\ram_tile_3.DOUT1_SIG [2]),
1000 
        .DOUTB3(\ram_tile_3.DOUT1_SIG [3]),
1001 
        .DOUTB4(\ram_tile_3.DOUT1_SIG [4]),
1002 
        .DOUTB5(\ram_tile_3.DOUT1_SIG [5]),
1003 
        .DOUTB6(\ram_tile_3.DOUT1_SIG [6]),
1004 
        .DOUTB7(\ram_tile_3.DOUT1_SIG [7]),
1005 
        .DOUTB8(\ram_tile_3.DOUT1_SIG [8]),
1006 
        .ADDRA0(adr_b[0]),
1007 
        .ADDRA1(adr_b[1]),
1008 
        .ADDRA2(adr_b[2]),
1009 
        .ADDRA3(adr_b[3]),
1010 
        .ADDRA4(adr_b[4]),
1011 
        .ADDRA5(adr_b[5]),
1012 
        .ADDRA6(adr_b[6]),
1013 
        .ADDRA7(adr_b[7]),
1014 
        .ADDRA8(adr_b[8]),
1015 
        .ADDRA9(adr_b[9]),
1016 
        .ADDRA10(adr_b[10]),
1017 
        .ADDRA11(GND),
1018 
        .ADDRB0(adr_a[0]),
1019 
        .ADDRB1(adr_a[1]),
1020 
        .ADDRB2(adr_a[2]),
1021 
        .ADDRB3(adr_a[3]),
1022 
        .ADDRB4(adr_a[4]),
1023 
        .ADDRB5(adr_a[5]),
1024 
        .ADDRB6(adr_a[6]),
1025 
        .ADDRB7(adr_a[7]),
1026 
        .ADDRB8(adr_a[8]),
1027 
        .ADDRB9(adr_a[9]),
1028 
        .ADDRB10(adr_a[10]),
1029 
        .ADDRB11(GND),
1030 
        .BLKA(GND),
1031 
        .BLKB(GND),
1032 
        .CLKA(clk),
1033 
        .CLKB(clk),
1034 
        .DINA0(d_b[8]),
1035 
        .DINA1(d_b[9]),
1036 
        .DINA2(GND),
1037 
        .DINA3(GND),
1038 
        .DINA4(GND),
1039 
        .DINA5(GND),
1040 
        .DINA6(GND),
1041 
        .DINA7(GND),
1042 
        .DINA8(GND),
1043 
        .DINB0(d_a[8]),
1044 
        .DINB1(d_a[9]),
1045 
        .DINB2(GND),
1046 
        .DINB3(GND),
1047 
        .DINB4(GND),
1048 
        .DINB5(GND),
1049 
        .DINB6(GND),
1050 
        .DINB7(GND),
1051 
        .DINB8(GND),
1052 
        .PIPEA(GND),
1053 
        .PIPEB(GND),
1054 
        .RESET(VCC),
1055 
        .WENA(we_b_i),
1056 
        .WENB(we_a_i),
1057 
        .WIDTHA1(GND),
1058 
        .WIDTHA0(VCC),
1059 
        .WIDTHB1(GND),
1060 
        .WIDTHB0(VCC),
1061 
        .WMODEA(GND),
1062 
        .WMODEB(GND)
1063 
);
1064 
// @2:26
1065 
  RAM4K9 \ram_tile_2.I_1  (
1066 
        .DOUTA0(q_b[6]),
1067 
        .DOUTA1(q_b[7]),
1068 
        .DOUTA2(\ram_tile_2.DOUT0_SIG [2]),
1069 
        .DOUTA3(\ram_tile_2.DOUT0_SIG [3]),
1070 
        .DOUTA4(\ram_tile_2.DOUT0_SIG [4]),
1071 
        .DOUTA5(\ram_tile_2.DOUT0_SIG [5]),
1072 
        .DOUTA6(\ram_tile_2.DOUT0_SIG [6]),
1073 
        .DOUTA7(\ram_tile_2.DOUT0_SIG [7]),
1074 
        .DOUTA8(\ram_tile_2.DOUT0_SIG [8]),
1075 
        .DOUTB0(q_a[6]),
1076 
        .DOUTB1(q_a[7]),
1077 
        .DOUTB2(\ram_tile_2.DOUT1_SIG [2]),
1078 
        .DOUTB3(\ram_tile_2.DOUT1_SIG [3]),
1079 
        .DOUTB4(\ram_tile_2.DOUT1_SIG [4]),
1080 
        .DOUTB5(\ram_tile_2.DOUT1_SIG [5]),
1081 
        .DOUTB6(\ram_tile_2.DOUT1_SIG [6]),
1082 
        .DOUTB7(\ram_tile_2.DOUT1_SIG [7]),
1083 
        .DOUTB8(\ram_tile_2.DOUT1_SIG [8]),
1084 
        .ADDRA0(adr_b[0]),
1085 
        .ADDRA1(adr_b[1]),
1086 
        .ADDRA2(adr_b[2]),
1087 
        .ADDRA3(adr_b[3]),
1088 
        .ADDRA4(adr_b[4]),
1089 
        .ADDRA5(adr_b[5]),
1090 
        .ADDRA6(adr_b[6]),
1091 
        .ADDRA7(adr_b[7]),
1092 
        .ADDRA8(adr_b[8]),
1093 
        .ADDRA9(adr_b[9]),
1094 
        .ADDRA10(adr_b[10]),
1095 
        .ADDRA11(GND),
1096 
        .ADDRB0(adr_a[0]),
1097 
        .ADDRB1(adr_a[1]),
1098 
        .ADDRB2(adr_a[2]),
1099 
        .ADDRB3(adr_a[3]),
1100 
        .ADDRB4(adr_a[4]),
1101 
        .ADDRB5(adr_a[5]),
1102 
        .ADDRB6(adr_a[6]),
1103 
        .ADDRB7(adr_a[7]),
1104 
        .ADDRB8(adr_a[8]),
1105 
        .ADDRB9(adr_a[9]),
1106 
        .ADDRB10(adr_a[10]),
1107 
        .ADDRB11(GND),
1108 
        .BLKA(GND),
1109 
        .BLKB(GND),
1110 
        .CLKA(clk),
1111 
        .CLKB(clk),
1112 
        .DINA0(d_b[6]),
1113 
        .DINA1(d_b[7]),
1114 
        .DINA2(GND),
1115 
        .DINA3(GND),
1116 
        .DINA4(GND),
1117 
        .DINA5(GND),
1118 
        .DINA6(GND),
1119 
        .DINA7(GND),
1120 
        .DINA8(GND),
1121 
        .DINB0(d_a[6]),
1122 
        .DINB1(d_a[7]),
1123 
        .DINB2(GND),
1124 
        .DINB3(GND),
1125 
        .DINB4(GND),
1126 
        .DINB5(GND),
1127 
        .DINB6(GND),
1128 
        .DINB7(GND),
1129 
        .DINB8(GND),
1130 
        .PIPEA(GND),
1131 
        .PIPEB(GND),
1132 
        .RESET(VCC),
1133 
        .WENA(we_b_i),
1134 
        .WENB(we_a_i),
1135 
        .WIDTHA1(GND),
1136 
        .WIDTHA0(VCC),
1137 
        .WIDTHB1(GND),
1138 
        .WIDTHB0(VCC),
1139 
        .WMODEA(GND),
1140 
        .WMODEB(GND)
1141 
);
1142 
// @2:26
1143 
  RAM4K9 \ram_tile_1.I_1  (
1144 
        .DOUTA0(q_b[4]),
1145 
        .DOUTA1(q_b[5]),
1146 
        .DOUTA2(\ram_tile_1.DOUT0_SIG [2]),
1147 
        .DOUTA3(\ram_tile_1.DOUT0_SIG [3]),
1148 
        .DOUTA4(\ram_tile_1.DOUT0_SIG [4]),
1149 
        .DOUTA5(\ram_tile_1.DOUT0_SIG [5]),
1150 
        .DOUTA6(\ram_tile_1.DOUT0_SIG [6]),
1151 
        .DOUTA7(\ram_tile_1.DOUT0_SIG [7]),
1152 
        .DOUTA8(\ram_tile_1.DOUT0_SIG [8]),
1153 
        .DOUTB0(q_a[4]),
1154 
        .DOUTB1(q_a[5]),
1155 
        .DOUTB2(\ram_tile_1.DOUT1_SIG [2]),
1156 
        .DOUTB3(\ram_tile_1.DOUT1_SIG [3]),
1157 
        .DOUTB4(\ram_tile_1.DOUT1_SIG [4]),
1158 
        .DOUTB5(\ram_tile_1.DOUT1_SIG [5]),
1159 
        .DOUTB6(\ram_tile_1.DOUT1_SIG [6]),
1160 
        .DOUTB7(\ram_tile_1.DOUT1_SIG [7]),
1161 
        .DOUTB8(\ram_tile_1.DOUT1_SIG [8]),
1162 
        .ADDRA0(adr_b[0]),
1163 
        .ADDRA1(adr_b[1]),
1164 
        .ADDRA2(adr_b[2]),
1165 
        .ADDRA3(adr_b[3]),
1166 
        .ADDRA4(adr_b[4]),
1167 
        .ADDRA5(adr_b[5]),
1168 
        .ADDRA6(adr_b[6]),
1169 
        .ADDRA7(adr_b[7]),
1170 
        .ADDRA8(adr_b[8]),
1171 
        .ADDRA9(adr_b[9]),
1172 
        .ADDRA10(adr_b[10]),
1173 
        .ADDRA11(GND),
1174 
        .ADDRB0(adr_a[0]),
1175 
        .ADDRB1(adr_a[1]),
1176 
        .ADDRB2(adr_a[2]),
1177 
        .ADDRB3(adr_a[3]),
1178 
        .ADDRB4(adr_a[4]),
1179 
        .ADDRB5(adr_a[5]),
1180 
        .ADDRB6(adr_a[6]),
1181 
        .ADDRB7(adr_a[7]),
1182 
        .ADDRB8(adr_a[8]),
1183 
        .ADDRB9(adr_a[9]),
1184 
        .ADDRB10(adr_a[10]),
1185 
        .ADDRB11(GND),
1186 
        .BLKA(GND),
1187 
        .BLKB(GND),
1188 
        .CLKA(clk),
1189 
        .CLKB(clk),
1190 
        .DINA0(d_b[4]),
1191 
        .DINA1(d_b[5]),
1192 
        .DINA2(GND),
1193 
        .DINA3(GND),
1194 
        .DINA4(GND),
1195 
        .DINA5(GND),
1196 
        .DINA6(GND),
1197 
        .DINA7(GND),
1198 
        .DINA8(GND),
1199 
        .DINB0(d_a[4]),
1200 
        .DINB1(d_a[5]),
1201 
        .DINB2(GND),
1202 
        .DINB3(GND),
1203 
        .DINB4(GND),
1204 
        .DINB5(GND),
1205 
        .DINB6(GND),
1206 
        .DINB7(GND),
1207 
        .DINB8(GND),
1208 
        .PIPEA(GND),
1209 
        .PIPEB(GND),
1210 
        .RESET(VCC),
1211 
        .WENA(we_b_i),
1212 
        .WENB(we_a_i),
1213 
        .WIDTHA1(GND),
1214 
        .WIDTHA0(VCC),
1215 
        .WIDTHB1(GND),
1216 
        .WIDTHB0(VCC),
1217 
        .WMODEA(GND),
1218 
        .WMODEB(GND)
1219 
);
1220 
// @2:26
1221 
  RAM4K9 \ram_tile_0.I_1  (
1222 
        .DOUTA0(q_b[2]),
1223 
        .DOUTA1(q_b[3]),
1224 
        .DOUTA2(\ram_tile_0.DOUT0_SIG [2]),
1225 
        .DOUTA3(\ram_tile_0.DOUT0_SIG [3]),
1226 
        .DOUTA4(\ram_tile_0.DOUT0_SIG [4]),
1227 
        .DOUTA5(\ram_tile_0.DOUT0_SIG [5]),
1228 
        .DOUTA6(\ram_tile_0.DOUT0_SIG [6]),
1229 
        .DOUTA7(\ram_tile_0.DOUT0_SIG [7]),
1230 
        .DOUTA8(\ram_tile_0.DOUT0_SIG [8]),
1231 
        .DOUTB0(q_a[2]),
1232 
        .DOUTB1(q_a[3]),
1233 
        .DOUTB2(\ram_tile_0.DOUT1_SIG [2]),
1234 
        .DOUTB3(\ram_tile_0.DOUT1_SIG [3]),
1235 
        .DOUTB4(\ram_tile_0.DOUT1_SIG [4]),
1236 
        .DOUTB5(\ram_tile_0.DOUT1_SIG [5]),
1237 
        .DOUTB6(\ram_tile_0.DOUT1_SIG [6]),
1238 
        .DOUTB7(\ram_tile_0.DOUT1_SIG [7]),
1239 
        .DOUTB8(\ram_tile_0.DOUT1_SIG [8]),
1240 
        .ADDRA0(adr_b[0]),
1241 
        .ADDRA1(adr_b[1]),
1242 
        .ADDRA2(adr_b[2]),
1243 
        .ADDRA3(adr_b[3]),
1244 
        .ADDRA4(adr_b[4]),
1245 
        .ADDRA5(adr_b[5]),
1246 
        .ADDRA6(adr_b[6]),
1247 
        .ADDRA7(adr_b[7]),
1248 
        .ADDRA8(adr_b[8]),
1249 
        .ADDRA9(adr_b[9]),
1250 
        .ADDRA10(adr_b[10]),
1251 
        .ADDRA11(GND),
1252 
        .ADDRB0(adr_a[0]),
1253 
        .ADDRB1(adr_a[1]),
1254 
        .ADDRB2(adr_a[2]),
1255 
        .ADDRB3(adr_a[3]),
1256 
        .ADDRB4(adr_a[4]),
1257 
        .ADDRB5(adr_a[5]),
1258 
        .ADDRB6(adr_a[6]),
1259 
        .ADDRB7(adr_a[7]),
1260 
        .ADDRB8(adr_a[8]),
1261 
        .ADDRB9(adr_a[9]),
1262 
        .ADDRB10(adr_a[10]),
1263 
        .ADDRB11(GND),
1264 
        .BLKA(GND),
1265 
        .BLKB(GND),
1266 
        .CLKA(clk),
1267 
        .CLKB(clk),
1268 
        .DINA0(d_b[2]),
1269 
        .DINA1(d_b[3]),
1270 
        .DINA2(GND),
1271 
        .DINA3(GND),
1272 
        .DINA4(GND),
1273 
        .DINA5(GND),
1274 
        .DINA6(GND),
1275 
        .DINA7(GND),
1276 
        .DINA8(GND),
1277 
        .DINB0(d_a[2]),
1278 
        .DINB1(d_a[3]),
1279 
        .DINB2(GND),
1280 
        .DINB3(GND),
1281 
        .DINB4(GND),
1282 
        .DINB5(GND),
1283 
        .DINB6(GND),
1284 
        .DINB7(GND),
1285 
        .DINB8(GND),
1286 
        .PIPEA(GND),
1287 
        .PIPEB(GND),
1288 
        .RESET(VCC),
1289 
        .WENA(we_b_i),
1290 
        .WENB(we_a_i),
1291 
        .WIDTHA1(GND),
1292 
        .WIDTHA0(VCC),
1293 
        .WIDTHB1(GND),
1294 
        .WIDTHB0(VCC),
1295 
        .WMODEA(GND),
1296 
        .WMODEB(GND)
1297 
);
1298 
// @2:26
1299 
  RAM4K9 \ram_tile.I_1  (
1300 
        .DOUTA0(q_b[0]),
1301 
        .DOUTA1(q_b[1]),
1302 
        .DOUTA2(\ram_tile.DOUT0_SIG [2]),
1303 
        .DOUTA3(\ram_tile.DOUT0_SIG [3]),
1304 
        .DOUTA4(\ram_tile.DOUT0_SIG [4]),
1305 
        .DOUTA5(\ram_tile.DOUT0_SIG [5]),
1306 
        .DOUTA6(\ram_tile.DOUT0_SIG [6]),
1307 
        .DOUTA7(\ram_tile.DOUT0_SIG [7]),
1308 
        .DOUTA8(\ram_tile.DOUT0_SIG [8]),
1309 
        .DOUTB0(q_a[0]),
1310 
        .DOUTB1(q_a[1]),
1311 
        .DOUTB2(\ram_tile.DOUT1_SIG [2]),
1312 
        .DOUTB3(\ram_tile.DOUT1_SIG [3]),
1313 
        .DOUTB4(\ram_tile.DOUT1_SIG [4]),
1314 
        .DOUTB5(\ram_tile.DOUT1_SIG [5]),
1315 
        .DOUTB6(\ram_tile.DOUT1_SIG [6]),
1316 
        .DOUTB7(\ram_tile.DOUT1_SIG [7]),
1317 
        .DOUTB8(\ram_tile.DOUT1_SIG [8]),
1318 
        .ADDRA0(adr_b[0]),
1319 
        .ADDRA1(adr_b[1]),
1320 
        .ADDRA2(adr_b[2]),
1321 
        .ADDRA3(adr_b[3]),
1322 
        .ADDRA4(adr_b[4]),
1323 
        .ADDRA5(adr_b[5]),
1324 
        .ADDRA6(adr_b[6]),
1325 
        .ADDRA7(adr_b[7]),
1326 
        .ADDRA8(adr_b[8]),
1327 
        .ADDRA9(adr_b[9]),
1328 
        .ADDRA10(adr_b[10]),
1329 
        .ADDRA11(GND),
1330 
        .ADDRB0(adr_a[0]),
1331 
        .ADDRB1(adr_a[1]),
1332 
        .ADDRB2(adr_a[2]),
1333 
        .ADDRB3(adr_a[3]),
1334 
        .ADDRB4(adr_a[4]),
1335 
        .ADDRB5(adr_a[5]),
1336 
        .ADDRB6(adr_a[6]),
1337 
        .ADDRB7(adr_a[7]),
1338 
        .ADDRB8(adr_a[8]),
1339 
        .ADDRB9(adr_a[9]),
1340 
        .ADDRB10(adr_a[10]),
1341 
        .ADDRB11(GND),
1342 
        .BLKA(GND),
1343 
        .BLKB(GND),
1344 
        .CLKA(clk),
1345 
        .CLKB(clk),
1346 
        .DINA0(d_b[0]),
1347 
        .DINA1(d_b[1]),
1348 
        .DINA2(GND),
1349 
        .DINA3(GND),
1350 
        .DINA4(GND),
1351 
        .DINA5(GND),
1352 
        .DINA6(GND),
1353 
        .DINA7(GND),
1354 
        .DINA8(GND),
1355 
        .DINB0(d_a[0]),
1356 
        .DINB1(d_a[1]),
1357 
        .DINB2(GND),
1358 
        .DINB3(GND),
1359 
        .DINB4(GND),
1360 
        .DINB5(GND),
1361 
        .DINB6(GND),
1362 
        .DINB7(GND),
1363 
        .DINB8(GND),
1364 
        .PIPEA(GND),
1365 
        .PIPEB(GND),
1366 
        .RESET(VCC),
1367 
        .WENA(we_b_i),
1368 
        .WENB(we_a_i),
1369 
        .WIDTHA1(GND),
1370 
        .WIDTHA0(VCC),
1371 
        .WIDTHB1(GND),
1372 
        .WIDTHB0(VCC),
1373 
        .WMODEA(GND),
1374 
        .WMODEB(GND)
1375 
);
1376 
// @2:26
1377 
  VCC VCC_i (
1378 
        .Y(VCC)
1379 
);
1380 
// @2:26
1381 
  GND GND_i (
1382 
        .Y(GND)
1383 
);
1384 
  assign GND_Z = 1'b0;
1385 
  assign VCC_Z = 1'b1;
1386 
endmodule /* ram_sc_dw */
1387 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.